media: imx7-media-csi: Use u32 for storing register reads
The CSI registers are 32-bit, so using u32 type is more suitable for storing the values from register reads. Switch from 'unsigned long' to 'u32' type. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
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@ -217,9 +217,9 @@ static void imx7_csi_hw_reset(struct imx7_csi *csi)
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imx7_csi_reg_write(csi, CSICR3_RESET_VAL, CSI_CSICR3);
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}
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static unsigned long imx7_csi_irq_clear(struct imx7_csi *csi)
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static u32 imx7_csi_irq_clear(struct imx7_csi *csi)
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{
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unsigned long isr;
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u32 isr;
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isr = imx7_csi_reg_read(csi, CSI_CSISR);
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imx7_csi_reg_write(csi, isr, CSI_CSISR);
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@ -245,7 +245,7 @@ static void imx7_csi_init_interface(struct imx7_csi *csi)
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static void imx7_csi_hw_enable_irq(struct imx7_csi *csi)
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{
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unsigned long cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);
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u32 cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);
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cr1 |= BIT_SOF_INTEN;
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cr1 |= BIT_RFF_OR_INT;
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@ -261,7 +261,7 @@ static void imx7_csi_hw_enable_irq(struct imx7_csi *csi)
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static void imx7_csi_hw_disable_irq(struct imx7_csi *csi)
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{
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unsigned long cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);
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u32 cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);
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cr1 &= ~BIT_SOF_INTEN;
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cr1 &= ~BIT_RFF_OR_INT;
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@ -274,7 +274,7 @@ static void imx7_csi_hw_disable_irq(struct imx7_csi *csi)
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static void imx7_csi_hw_enable(struct imx7_csi *csi)
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{
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unsigned long cr = imx7_csi_reg_read(csi, CSI_CSICR18);
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u32 cr = imx7_csi_reg_read(csi, CSI_CSICR18);
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cr |= BIT_CSI_HW_ENABLE;
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@ -283,7 +283,7 @@ static void imx7_csi_hw_enable(struct imx7_csi *csi)
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static void imx7_csi_hw_disable(struct imx7_csi *csi)
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{
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unsigned long cr = imx7_csi_reg_read(csi, CSI_CSICR18);
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u32 cr = imx7_csi_reg_read(csi, CSI_CSICR18);
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cr &= ~BIT_CSI_HW_ENABLE;
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@ -292,7 +292,7 @@ static void imx7_csi_hw_disable(struct imx7_csi *csi)
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static void imx7_csi_dma_reflash(struct imx7_csi *csi)
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{
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unsigned long cr3 = imx7_csi_reg_read(csi, CSI_CSICR18);
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u32 cr3 = imx7_csi_reg_read(csi, CSI_CSICR18);
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cr3 = imx7_csi_reg_read(csi, CSI_CSICR3);
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cr3 |= BIT_DMA_REFLASH_RFF;
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@ -301,7 +301,7 @@ static void imx7_csi_dma_reflash(struct imx7_csi *csi)
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static void imx7_csi_rx_fifo_clear(struct imx7_csi *csi)
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{
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unsigned long cr1;
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u32 cr1;
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cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);
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imx7_csi_reg_write(csi, cr1 & ~BIT_FCC, CSI_CSICR1);
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@ -319,7 +319,7 @@ static void imx7_csi_buf_stride_set(struct imx7_csi *csi, u32 stride)
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static void imx7_csi_deinterlace_enable(struct imx7_csi *csi, bool enable)
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{
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unsigned long cr18 = imx7_csi_reg_read(csi, CSI_CSICR18);
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u32 cr18 = imx7_csi_reg_read(csi, CSI_CSICR18);
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if (enable)
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cr18 |= BIT_DEINTERLACE_EN;
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@ -331,8 +331,8 @@ static void imx7_csi_deinterlace_enable(struct imx7_csi *csi, bool enable)
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static void imx7_csi_dmareq_rff_enable(struct imx7_csi *csi)
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{
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unsigned long cr3 = imx7_csi_reg_read(csi, CSI_CSICR3);
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unsigned long cr2 = imx7_csi_reg_read(csi, CSI_CSICR2);
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u32 cr3 = imx7_csi_reg_read(csi, CSI_CSICR3);
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u32 cr2 = imx7_csi_reg_read(csi, CSI_CSICR2);
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/* Burst Type of DMA Transfer from RxFIFO. INCR16 */
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cr2 |= 0xC0000000;
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@ -348,7 +348,7 @@ static void imx7_csi_dmareq_rff_enable(struct imx7_csi *csi)
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static void imx7_csi_dmareq_rff_disable(struct imx7_csi *csi)
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{
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unsigned long cr3 = imx7_csi_reg_read(csi, CSI_CSICR3);
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u32 cr3 = imx7_csi_reg_read(csi, CSI_CSICR3);
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cr3 &= ~BIT_DMA_REQ_EN_RFF;
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cr3 &= ~BIT_HRESP_ERR_EN;
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@ -647,7 +647,7 @@ static void imx7_csi_vb2_buf_done(struct imx7_csi *csi)
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static irqreturn_t imx7_csi_irq_handler(int irq, void *data)
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{
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struct imx7_csi *csi = data;
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unsigned long status;
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u32 status;
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spin_lock(&csi->irqlock);
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