spi: imx: Add loopback mode support
Loopback mode can be activated by setting bit LBC (LoopBack Control) of register ECSPI_TESTREG. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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8005c49d9a
Коммит
9f6aa42bbb
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@ -244,6 +244,9 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
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#define MX51_ECSPI_STAT 0x18
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#define MX51_ECSPI_STAT_RR (1 << 3)
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#define MX51_ECSPI_TESTREG 0x20
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#define MX51_ECSPI_TESTREG_LBC BIT(31)
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/* MX51 eCSPI */
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static unsigned int mx51_ecspi_clkdiv(unsigned int fin, unsigned int fspi,
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unsigned int *fres)
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@ -313,7 +316,7 @@ static int __maybe_unused mx51_ecspi_config(struct spi_imx_data *spi_imx,
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{
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u32 ctrl = MX51_ECSPI_CTRL_ENABLE, cfg = 0, dma = 0;
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u32 tx_wml_cfg, rx_wml_cfg, rxt_wml_cfg;
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u32 clk = config->speed_hz, delay;
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u32 clk = config->speed_hz, delay, reg;
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/*
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* The hardware seems to have a race condition when changing modes. The
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@ -351,6 +354,13 @@ static int __maybe_unused mx51_ecspi_config(struct spi_imx_data *spi_imx,
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else
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cfg &= ~MX51_ECSPI_CONFIG_SSBPOL(config->cs);
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reg = readl(spi_imx->base + MX51_ECSPI_TESTREG);
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if (config->mode & SPI_LOOP)
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reg |= MX51_ECSPI_TESTREG_LBC;
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else
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reg &= ~MX51_ECSPI_TESTREG_LBC;
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writel(reg, spi_imx->base + MX51_ECSPI_TESTREG);
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writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
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writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG);
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@ -1141,7 +1151,8 @@ static int spi_imx_probe(struct platform_device *pdev)
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spi_imx->bitbang.master->cleanup = spi_imx_cleanup;
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spi_imx->bitbang.master->prepare_message = spi_imx_prepare_message;
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spi_imx->bitbang.master->unprepare_message = spi_imx_unprepare_message;
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spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
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spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |
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SPI_LOOP;
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init_completion(&spi_imx->xfer_done);
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