Second round of fixes for meson clocks targeted for v5.1:

- clk-pll: fix rate rounding fixing meson8b boot failure
 - vid-pll-div: fix recal_rate warning and return when invalid setting
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Merge tag 'meson-clk-fixes-for-5.1-v2' of https://github.com/BayLibre/clk-meson into clk-fixes

Pull more fixes for meson clocks from Neil Armstrong:
 - clk-pll: fix rate rounding fixing meson8b boot failure
 - vid-pll-div: fix recal_rate warning and return when invalid setting

* tag 'meson-clk-fixes-for-5.1-v2' of https://github.com/BayLibre/clk-meson:
  clk: meson: vid-pll-div: remove warning and return 0 on invalid config
  clk: meson: pll: fix rounding and setting a rate that matches precisely

drivers/clk/meson/clk-pll.c

@@ -120,7 +120,7 @@ static bool meson_clk_pll_is_better(unsigned long rate,
 			return true;
 	} else {
 		/* Round down */
-		if (now < rate && best < now)
+		if (now <= rate && best < now)
 			return true;
 	}
 

drivers/clk/meson/vid-pll-div.c

@@ -82,8 +82,8 @@ static unsigned long meson_vid_pll_div_recalc_rate(struct clk_hw *hw,
 	div = _get_table_val(meson_parm_read(clk->map, &pll_div->val),
 			     meson_parm_read(clk->map, &pll_div->sel));
 	if (!div || !div->divider) {
-		pr_info("%s: Invalid config value for vid_pll_div\n", __func__);
-		return parent_rate;
+		pr_debug("%s: Invalid config value for vid_pll_div\n", __func__);
+		return 0;
 	}
 
 	return DIV_ROUND_UP_ULL(parent_rate * div->multiplier, div->divider);