drm/i915: Extract the GuC interrupt handlers
Pull the GuC interrupt handlers out of i915_irq.c. They now use the GT interrupt facilities rather than the central dispatch. Based on a patch by Chris Wilson. Signed-off-by: Andi Shyti <andi.shyti@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20191024211642.7688-2-chris@chris-wilson.co.uk
This commit is contained in:
Andi Shyti
Chris Wilson
Родитель
3e7abf8141
Коммит
9fb94522dd
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@ -4,6 +4,8 @@
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*/
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#include "gt/intel_gt.h"
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#include "gt/intel_gt_irq.h"
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#include "gt/intel_gt_pm_irq.h"
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#include "intel_guc.h"
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#include "intel_guc_ads.h"
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#include "intel_guc_submission.h"
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@ -77,6 +79,93 @@ void intel_guc_init_send_regs(struct intel_guc *guc)
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guc->send_regs.fw_domains = fw_domains;
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}
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static void gen9_reset_guc_interrupts(struct intel_guc *guc)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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assert_rpm_wakelock_held(>->i915->runtime_pm);
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spin_lock_irq(>->irq_lock);
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gen6_gt_pm_reset_iir(gt, gt->pm_guc_events);
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spin_unlock_irq(>->irq_lock);
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}
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static void gen9_enable_guc_interrupts(struct intel_guc *guc)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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assert_rpm_wakelock_held(>->i915->runtime_pm);
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spin_lock_irq(>->irq_lock);
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if (!guc->interrupts.enabled) {
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WARN_ON_ONCE(intel_uncore_read(gt->uncore, GEN8_GT_IIR(2)) &
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gt->pm_guc_events);
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guc->interrupts.enabled = true;
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gen6_gt_pm_enable_irq(gt, gt->pm_guc_events);
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}
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spin_unlock_irq(>->irq_lock);
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}
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static void gen9_disable_guc_interrupts(struct intel_guc *guc)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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assert_rpm_wakelock_held(>->i915->runtime_pm);
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spin_lock_irq(>->irq_lock);
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guc->interrupts.enabled = false;
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gen6_gt_pm_disable_irq(gt, gt->pm_guc_events);
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spin_unlock_irq(>->irq_lock);
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intel_synchronize_irq(gt->i915);
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gen9_reset_guc_interrupts(guc);
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}
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static void gen11_reset_guc_interrupts(struct intel_guc *guc)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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spin_lock_irq(>->irq_lock);
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gen11_gt_reset_one_iir(gt, 0, GEN11_GUC);
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spin_unlock_irq(>->irq_lock);
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}
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static void gen11_enable_guc_interrupts(struct intel_guc *guc)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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spin_lock_irq(>->irq_lock);
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if (!guc->interrupts.enabled) {
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u32 events = REG_FIELD_PREP(ENGINE1_MASK, GUC_INTR_GUC2HOST);
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WARN_ON_ONCE(gen11_gt_reset_one_iir(gt, 0, GEN11_GUC));
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intel_uncore_write(gt->uncore,
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GEN11_GUC_SG_INTR_ENABLE, events);
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intel_uncore_write(gt->uncore,
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GEN11_GUC_SG_INTR_MASK, ~events);
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guc->interrupts.enabled = true;
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}
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spin_unlock_irq(>->irq_lock);
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}
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static void gen11_disable_guc_interrupts(struct intel_guc *guc)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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spin_lock_irq(>->irq_lock);
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guc->interrupts.enabled = false;
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intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_MASK, ~0);
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intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_ENABLE, 0);
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spin_unlock_irq(>->irq_lock);
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intel_synchronize_irq(gt->i915);
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gen11_reset_guc_interrupts(guc);
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}
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void intel_guc_init_early(struct intel_guc *guc)
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{
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struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
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@ -321,99 +321,6 @@ void ilk_update_display_irq(struct drm_i915_private *dev_priv,
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}
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}
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static i915_reg_t gen6_pm_iir(struct drm_i915_private *dev_priv)
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{
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WARN_ON_ONCE(INTEL_GEN(dev_priv) >= 11);
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return INTEL_GEN(dev_priv) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR;
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}
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void gen9_reset_guc_interrupts(struct intel_guc *guc)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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assert_rpm_wakelock_held(gt->uncore->rpm);
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spin_lock_irq(>->irq_lock);
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gen6_gt_pm_reset_iir(gt, gt->pm_guc_events);
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spin_unlock_irq(>->irq_lock);
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}
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void gen9_enable_guc_interrupts(struct intel_guc *guc)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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assert_rpm_wakelock_held(gt->uncore->rpm);
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spin_lock_irq(>->irq_lock);
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if (!guc->interrupts.enabled) {
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WARN_ON_ONCE(intel_uncore_read(gt->uncore,
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gen6_pm_iir(gt->i915)) &
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gt->pm_guc_events);
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guc->interrupts.enabled = true;
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gen6_gt_pm_enable_irq(gt, gt->pm_guc_events);
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}
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spin_unlock_irq(>->irq_lock);
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}
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void gen9_disable_guc_interrupts(struct intel_guc *guc)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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assert_rpm_wakelock_held(gt->uncore->rpm);
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spin_lock_irq(>->irq_lock);
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guc->interrupts.enabled = false;
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gen6_gt_pm_disable_irq(gt, gt->pm_guc_events);
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spin_unlock_irq(>->irq_lock);
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intel_synchronize_irq(gt->i915);
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gen9_reset_guc_interrupts(guc);
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}
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void gen11_reset_guc_interrupts(struct intel_guc *guc)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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spin_lock_irq(>->irq_lock);
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gen11_gt_reset_one_iir(gt, 0, GEN11_GUC);
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spin_unlock_irq(>->irq_lock);
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}
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void gen11_enable_guc_interrupts(struct intel_guc *guc)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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spin_lock_irq(>->irq_lock);
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if (!guc->interrupts.enabled) {
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u32 events = REG_FIELD_PREP(ENGINE1_MASK, GUC_INTR_GUC2HOST);
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WARN_ON_ONCE(gen11_gt_reset_one_iir(gt, 0, GEN11_GUC));
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intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_ENABLE, events);
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intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_MASK, ~events);
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guc->interrupts.enabled = true;
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}
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spin_unlock_irq(>->irq_lock);
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}
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void gen11_disable_guc_interrupts(struct intel_guc *guc)
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{
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struct intel_gt *gt = guc_to_gt(guc);
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spin_lock_irq(>->irq_lock);
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guc->interrupts.enabled = false;
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intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_MASK, ~0);
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intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_ENABLE, 0);
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spin_unlock_irq(>->irq_lock);
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intel_synchronize_irq(gt->i915);
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gen11_reset_guc_interrupts(guc);
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}
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/**
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* bdw_update_port_irq - update DE port interrupt
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* @dev_priv: driver private
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@ -17,9 +17,6 @@ struct drm_device;
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struct drm_display_mode;
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struct drm_i915_private;
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struct intel_crtc;
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struct intel_crtc;
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struct intel_gt;
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struct intel_guc;
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struct intel_uncore;
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void intel_irq_init(struct drm_i915_private *dev_priv);
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@ -103,12 +100,6 @@ void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,
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u8 pipe_mask);
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void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv,
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u8 pipe_mask);
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void gen9_reset_guc_interrupts(struct intel_guc *guc);
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void gen9_enable_guc_interrupts(struct intel_guc *guc);
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void gen9_disable_guc_interrupts(struct intel_guc *guc);
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void gen11_reset_guc_interrupts(struct intel_guc *guc);
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void gen11_enable_guc_interrupts(struct intel_guc *guc);
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void gen11_disable_guc_interrupts(struct intel_guc *guc);
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bool i915_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe,
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bool in_vblank_irq, int *vpos, int *hpos,
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