[ARM] pxa: allow IRQ_BOARD_END to be customized and make zylonite to use it
The default value is 16 IRQs. Zylonite needs 32, ASIC3 based boards need 70. My problem is still that due to the way IRQ_GPIO is hardcoded, ASIC3 based boards need 70 IRQs starting at IRQ_BOARD_START. If I define ASIC3 IRQs similar to LoCoMo or SA1111, things break as soon as something selects PXA_HAVE_BOARD_IRQS. Increasing the default number of board IRQs to 70 instead doesn't seem very nice. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
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@ -280,6 +280,7 @@ config MACH_ZYLONITE
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select PXA3xx
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select PXA_SSP
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select HAVE_PWM
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select PXA_HAVE_BOARD_IRQS
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config MACH_LITTLETON
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bool "PXA3xx Form Factor Platform (aka Littleton)"
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@ -91,13 +91,21 @@
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#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i))
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/*
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* The next 16 interrupts are for board specific purposes. Since
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* The following interrupts are for board specific purposes. Since
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* the kernel can only run on one machine at a time, we can re-use
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* these. If you need more, increase IRQ_BOARD_END, but keep it
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* within sensible limits.
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* these. There will be 16 IRQs by default. If it is not enough,
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* IRQ_BOARD_END is allowed be customized for each board, but keep
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* the numbers within sensible limits and in descending order, so
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* when multiple config options are selected, the maximum will be
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* used.
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*/
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#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
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#if defined(CONFIG_MACH_ZYLONITE)
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#define IRQ_BOARD_END (IRQ_BOARD_START + 32)
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#else
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#define IRQ_BOARD_END (IRQ_BOARD_START + 16)
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#endif
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#define IRQ_SA1111_START (IRQ_BOARD_END)
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#define IRQ_GPAIN0 (IRQ_BOARD_END + 0)
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@ -188,8 +196,6 @@
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#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1)
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#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
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#define NR_IRQS (IRQ_BOARD_END)
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#elif defined(CONFIG_MACH_ZYLONITE)
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#define NR_IRQS (IRQ_BOARD_START + 32)
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#else
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#define NR_IRQS (IRQ_BOARD_START)
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#endif
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