OMAP: Fix race condition with autodeps
There is a possible race condition in clockdomain code handling hw supported idle transitions. When multiple autodeps dependencies are being added or removed, a transition of still remaining dependent powerdomain can result in false readings of the state counter. This is especially fatal for off mode state counter, as it could result in a driver not noticing a context loss. Fixed by disabling hw supported state transitions when autodeps are being changed. Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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161291396e
Коммит
a0219fbdac
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@ -137,6 +137,36 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm)
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}
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/*
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* _omap2_clkdm_set_hwsup - set the hwsup idle transition bit
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* @clkdm: struct clockdomain *
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* @enable: int 0 to disable, 1 to enable
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*
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* Internal helper for actually switching the bit that controls hwsup
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* idle transitions for clkdm.
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*/
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static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable)
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{
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u32 v;
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if (cpu_is_omap24xx()) {
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if (enable)
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v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
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else
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v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
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} else if (cpu_is_omap34xx()) {
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if (enable)
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v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
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else
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v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO;
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} else {
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BUG();
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}
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cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
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v << __ffs(clkdm->clktrctrl_mask),
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clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
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}
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static struct clockdomain *_clkdm_lookup(const char *name)
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static struct clockdomain *_clkdm_lookup(const char *name)
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{
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{
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@ -456,8 +486,6 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
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*/
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*/
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void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
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void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
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{
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{
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u32 v;
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if (!clkdm)
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if (!clkdm)
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return;
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return;
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@ -473,18 +501,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
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if (atomic_read(&clkdm->usecount) > 0)
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if (atomic_read(&clkdm->usecount) > 0)
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_clkdm_add_autodeps(clkdm);
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_clkdm_add_autodeps(clkdm);
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if (cpu_is_omap24xx())
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_omap2_clkdm_set_hwsup(clkdm, 1);
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v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
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else if (cpu_is_omap34xx())
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v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
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else
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BUG();
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cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
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v << __ffs(clkdm->clktrctrl_mask),
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clkdm->pwrdm.ptr->prcm_offs,
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CM_CLKSTCTRL);
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pwrdm_clkdm_state_switch(clkdm);
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pwrdm_clkdm_state_switch(clkdm);
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}
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}
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@ -500,8 +517,6 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
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*/
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*/
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void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
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void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
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{
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{
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u32 v;
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if (!clkdm)
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if (!clkdm)
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return;
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return;
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@ -514,16 +529,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
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pr_debug("clockdomain: disabling automatic idle transitions for %s\n",
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pr_debug("clockdomain: disabling automatic idle transitions for %s\n",
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clkdm->name);
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clkdm->name);
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if (cpu_is_omap24xx())
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_omap2_clkdm_set_hwsup(clkdm, 0);
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v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
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else if (cpu_is_omap34xx())
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v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO;
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else
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BUG();
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cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
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v << __ffs(clkdm->clktrctrl_mask),
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clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
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if (atomic_read(&clkdm->usecount) > 0)
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if (atomic_read(&clkdm->usecount) > 0)
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_clkdm_del_autodeps(clkdm);
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_clkdm_del_autodeps(clkdm);
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@ -569,10 +575,14 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
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v = omap2_clkdm_clktrctrl_read(clkdm);
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v = omap2_clkdm_clktrctrl_read(clkdm);
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if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
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if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
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(cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO))
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(cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) {
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/* Disable HW transitions when we are changing deps */
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_omap2_clkdm_set_hwsup(clkdm, 0);
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_clkdm_add_autodeps(clkdm);
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_clkdm_add_autodeps(clkdm);
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else
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_omap2_clkdm_set_hwsup(clkdm, 1);
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} else {
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omap2_clkdm_wakeup(clkdm);
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omap2_clkdm_wakeup(clkdm);
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}
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pwrdm_wait_transition(clkdm->pwrdm.ptr);
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pwrdm_wait_transition(clkdm->pwrdm.ptr);
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pwrdm_clkdm_state_switch(clkdm);
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pwrdm_clkdm_state_switch(clkdm);
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@ -623,10 +633,14 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
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v = omap2_clkdm_clktrctrl_read(clkdm);
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v = omap2_clkdm_clktrctrl_read(clkdm);
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if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
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if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
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(cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO))
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(cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) {
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/* Disable HW transitions when we are changing deps */
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_omap2_clkdm_set_hwsup(clkdm, 0);
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_clkdm_del_autodeps(clkdm);
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_clkdm_del_autodeps(clkdm);
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else
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_omap2_clkdm_set_hwsup(clkdm, 1);
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} else {
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omap2_clkdm_sleep(clkdm);
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omap2_clkdm_sleep(clkdm);
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}
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pwrdm_clkdm_state_switch(clkdm);
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pwrdm_clkdm_state_switch(clkdm);
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