Merge branch 'sched/urgent' into sched/core
Pick up fixes before queueing up new changes. Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Коммит
a02ed5e3e0
|
@ -3,8 +3,7 @@ Date: Nov 2010
|
|||
Contact: Kay Sievers <kay.sievers@vrfy.org>
|
||||
Description:
|
||||
Shows the list of currently configured
|
||||
tty devices used for the console,
|
||||
like 'tty1 ttyS0'.
|
||||
console devices, like 'tty1 ttyS0'.
|
||||
The last entry in the file is the active
|
||||
device connected to /dev/console.
|
||||
The file supports poll() to detect virtual
|
||||
|
|
|
@ -124,12 +124,11 @@ the default being 204800 sectors (or 100MB).
|
|||
Updating on-disk metadata
|
||||
-------------------------
|
||||
|
||||
On-disk metadata is committed every time a REQ_SYNC or REQ_FUA bio is
|
||||
written. If no such requests are made then commits will occur every
|
||||
second. This means the cache behaves like a physical disk that has a
|
||||
write cache (the same is true of the thin-provisioning target). If
|
||||
power is lost you may lose some recent writes. The metadata should
|
||||
always be consistent in spite of any crash.
|
||||
On-disk metadata is committed every time a FLUSH or FUA bio is written.
|
||||
If no such requests are made then commits will occur every second. This
|
||||
means the cache behaves like a physical disk that has a volatile write
|
||||
cache. If power is lost you may lose some recent writes. The metadata
|
||||
should always be consistent in spite of any crash.
|
||||
|
||||
The 'dirty' state for a cache block changes far too frequently for us
|
||||
to keep updating it on the fly. So we treat it as a hint. In normal
|
||||
|
|
|
@ -116,6 +116,35 @@ Resuming a device with a new table itself triggers an event so the
|
|||
userspace daemon can use this to detect a situation where a new table
|
||||
already exceeds the threshold.
|
||||
|
||||
A low water mark for the metadata device is maintained in the kernel and
|
||||
will trigger a dm event if free space on the metadata device drops below
|
||||
it.
|
||||
|
||||
Updating on-disk metadata
|
||||
-------------------------
|
||||
|
||||
On-disk metadata is committed every time a FLUSH or FUA bio is written.
|
||||
If no such requests are made then commits will occur every second. This
|
||||
means the thin-provisioning target behaves like a physical disk that has
|
||||
a volatile write cache. If power is lost you may lose some recent
|
||||
writes. The metadata should always be consistent in spite of any crash.
|
||||
|
||||
If data space is exhausted the pool will either error or queue IO
|
||||
according to the configuration (see: error_if_no_space). If metadata
|
||||
space is exhausted or a metadata operation fails: the pool will error IO
|
||||
until the pool is taken offline and repair is performed to 1) fix any
|
||||
potential inconsistencies and 2) clear the flag that imposes repair.
|
||||
Once the pool's metadata device is repaired it may be resized, which
|
||||
will allow the pool to return to normal operation. Note that if a pool
|
||||
is flagged as needing repair, the pool's data and metadata devices
|
||||
cannot be resized until repair is performed. It should also be noted
|
||||
that when the pool's metadata space is exhausted the current metadata
|
||||
transaction is aborted. Given that the pool will cache IO whose
|
||||
completion may have already been acknowledged to upper IO layers
|
||||
(e.g. filesystem) it is strongly suggested that consistency checks
|
||||
(e.g. fsck) be performed on those layers when repair of the pool is
|
||||
required.
|
||||
|
||||
Thin provisioning
|
||||
-----------------
|
||||
|
||||
|
@ -258,10 +287,9 @@ ii) Status
|
|||
should register for the event and then check the target's status.
|
||||
|
||||
held metadata root:
|
||||
The location, in sectors, of the metadata root that has been
|
||||
The location, in blocks, of the metadata root that has been
|
||||
'held' for userspace read access. '-' indicates there is no
|
||||
held root. This feature is not yet implemented so '-' is
|
||||
always returned.
|
||||
held root.
|
||||
|
||||
discard_passdown|no_discard_passdown
|
||||
Whether or not discards are actually being passed down to the
|
||||
|
|
|
@ -91,7 +91,7 @@ Boards:
|
|||
compatible = "ti,omap3-beagle", "ti,omap3"
|
||||
|
||||
- OMAP3 Tobi with Overo : Commercial expansion board with daughter board
|
||||
compatible = "ti,omap3-tobi", "ti,omap3-overo", "ti,omap3"
|
||||
compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap3"
|
||||
|
||||
- OMAP4 SDP : Software Development Board
|
||||
compatible = "ti,omap4-sdp", "ti,omap4430"
|
||||
|
|
|
@ -21,9 +21,9 @@ Required Properties:
|
|||
must appear in the same order as the output clocks.
|
||||
- #clock-cells: Must be 1
|
||||
- clock-output-names: The name of the clocks as free-form strings
|
||||
- renesas,indices: Indices of the gate clocks into the group (0 to 31)
|
||||
- renesas,clock-indices: Indices of the gate clocks into the group (0 to 31)
|
||||
|
||||
The clocks, clock-output-names and renesas,indices properties contain one
|
||||
The clocks, clock-output-names and renesas,clock-indices properties contain one
|
||||
entry per gate clock. The MSTP groups are sparsely populated. Unimplemented
|
||||
gate clocks must not be declared.
|
||||
|
||||
|
|
|
@ -1,12 +1,16 @@
|
|||
* Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "fsl,imx31-sdma", "fsl,imx31-to1-sdma",
|
||||
"fsl,imx31-to2-sdma", "fsl,imx35-sdma", "fsl,imx35-to1-sdma",
|
||||
"fsl,imx35-to2-sdma", "fsl,imx51-sdma", "fsl,imx53-sdma" or
|
||||
"fsl,imx6q-sdma". The -to variants should be preferred since they
|
||||
allow to determnine the correct ROM script addresses needed for
|
||||
the driver to work without additional firmware.
|
||||
- compatible : Should be one of
|
||||
"fsl,imx25-sdma"
|
||||
"fsl,imx31-sdma", "fsl,imx31-to1-sdma", "fsl,imx31-to2-sdma"
|
||||
"fsl,imx35-sdma", "fsl,imx35-to1-sdma", "fsl,imx35-to2-sdma"
|
||||
"fsl,imx51-sdma"
|
||||
"fsl,imx53-sdma"
|
||||
"fsl,imx6q-sdma"
|
||||
The -to variants should be preferred since they allow to determnine the
|
||||
correct ROM script addresses needed for the driver to work without additional
|
||||
firmware.
|
||||
- reg : Should contain SDMA registers location and length
|
||||
- interrupts : Should contain SDMA interrupt
|
||||
- #dma-cells : Must be <3>.
|
||||
|
|
|
@ -0,0 +1,22 @@
|
|||
* OpenCores MAC 10/100 Mbps
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "opencores,ethoc".
|
||||
- reg: two memory regions (address and length),
|
||||
first region is for the device registers and descriptor rings,
|
||||
second is for the device packet memory.
|
||||
- interrupts: interrupt for the device.
|
||||
|
||||
Optional properties:
|
||||
- clocks: phandle to refer to the clk used as per
|
||||
Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
Examples:
|
||||
|
||||
enet0: ethoc@fd030000 {
|
||||
compatible = "opencores,ethoc";
|
||||
reg = <0xfd030000 0x4000 0xfd800000 0x4000>;
|
||||
interrupts = <1>;
|
||||
local-mac-address = [00 50 c2 13 6f 00];
|
||||
clocks = <&osc>;
|
||||
};
|
|
@ -1,4 +1,4 @@
|
|||
Broadcom Capri Pin Controller
|
||||
Broadcom BCM281xx Pin Controller
|
||||
|
||||
This is a pin controller for the Broadcom BCM281xx SoC family, which includes
|
||||
BCM11130, BCM11140, BCM11351, BCM28145, and BCM28155 SoCs.
|
||||
|
@ -7,14 +7,14 @@ BCM11130, BCM11140, BCM11351, BCM28145, and BCM28155 SoCs.
|
|||
|
||||
Required Properties:
|
||||
|
||||
- compatible: Must be "brcm,capri-pinctrl".
|
||||
- compatible: Must be "brcm,bcm11351-pinctrl"
|
||||
- reg: Base address of the PAD Controller register block and the size
|
||||
of the block.
|
||||
|
||||
For example, the following is the bare minimum node:
|
||||
|
||||
pinctrl@35004800 {
|
||||
compatible = "brcm,capri-pinctrl";
|
||||
compatible = "brcm,bcm11351-pinctrl";
|
||||
reg = <0x35004800 0x430>;
|
||||
};
|
||||
|
||||
|
@ -119,7 +119,7 @@ Optional Properties (for HDMI pins):
|
|||
Example:
|
||||
// pin controller node
|
||||
pinctrl@35004800 {
|
||||
compatible = "brcm,capri-pinctrl";
|
||||
compatible = "brcmbcm11351-pinctrl";
|
||||
reg = <0x35004800 0x430>;
|
||||
|
||||
// pin configuration node
|
|
@ -554,12 +554,6 @@ solution for a couple of reasons:
|
|||
not specified in the struct can_frame and therefore it is only valid in
|
||||
CANFD_MTU sized CAN FD frames.
|
||||
|
||||
As long as the payload length is <=8 the received CAN frames from CAN FD
|
||||
capable CAN devices can be received and read by legacy sockets too. When
|
||||
user-generated CAN FD frames have a payload length <=8 these can be send
|
||||
by legacy CAN network interfaces too. Sending CAN FD frames with payload
|
||||
length > 8 to a legacy CAN network interface returns an -EMSGSIZE error.
|
||||
|
||||
Implementation hint for new CAN applications:
|
||||
|
||||
To build a CAN FD aware application use struct canfd_frame as basic CAN
|
||||
|
|
140
MAINTAINERS
140
MAINTAINERS
|
@ -73,7 +73,8 @@ Descriptions of section entries:
|
|||
L: Mailing list that is relevant to this area
|
||||
W: Web-page with status/info
|
||||
Q: Patchwork web based patch tracking system site
|
||||
T: SCM tree type and location. Type is one of: git, hg, quilt, stgit, topgit.
|
||||
T: SCM tree type and location.
|
||||
Type is one of: git, hg, quilt, stgit, topgit
|
||||
S: Status, one of the following:
|
||||
Supported: Someone is actually paid to look after this.
|
||||
Maintained: Someone actually looks after it.
|
||||
|
@ -473,7 +474,7 @@ F: net/rxrpc/af_rxrpc.c
|
|||
|
||||
AGPGART DRIVER
|
||||
M: David Airlie <airlied@linux.ie>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6.git
|
||||
T: git git://people.freedesktop.org/~airlied/linux (part of drm maint)
|
||||
S: Maintained
|
||||
F: drivers/char/agp/
|
||||
F: include/linux/agp*
|
||||
|
@ -538,7 +539,7 @@ F: arch/alpha/
|
|||
ALTERA UART/JTAG UART SERIAL DRIVERS
|
||||
M: Tobias Klauser <tklauser@distanz.ch>
|
||||
L: linux-serial@vger.kernel.org
|
||||
L: nios2-dev@sopc.et.ntust.edu.tw (moderated for non-subscribers)
|
||||
L: nios2-dev@lists.rocketboards.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: drivers/tty/serial/altera_uart.c
|
||||
F: drivers/tty/serial/altera_jtaguart.c
|
||||
|
@ -1612,11 +1613,11 @@ S: Maintained
|
|||
F: drivers/net/wireless/atmel*
|
||||
|
||||
ATTO EXPRESSSAS SAS/SATA RAID SCSI DRIVER
|
||||
M: Bradley Grove <linuxdrivers@attotech.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
W: http://www.attotech.com
|
||||
S: Supported
|
||||
F: drivers/scsi/esas2r
|
||||
M: Bradley Grove <linuxdrivers@attotech.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
W: http://www.attotech.com
|
||||
S: Supported
|
||||
F: drivers/scsi/esas2r
|
||||
|
||||
AUDIT SUBSYSTEM
|
||||
M: Eric Paris <eparis@redhat.com>
|
||||
|
@ -1737,6 +1738,7 @@ F: include/uapi/linux/bfs_fs.h
|
|||
BLACKFIN ARCHITECTURE
|
||||
M: Steven Miao <realmz6@gmail.com>
|
||||
L: adi-buildroot-devel@lists.sourceforge.net
|
||||
T: git git://git.code.sf.net/p/adi-linux/code
|
||||
W: http://blackfin.uclinux.org
|
||||
S: Supported
|
||||
F: arch/blackfin/
|
||||
|
@ -1860,6 +1862,7 @@ F: drivers/net/ethernet/broadcom/bnx2x/
|
|||
|
||||
BROADCOM BCM281XX/BCM11XXX ARM ARCHITECTURE
|
||||
M: Christian Daudt <bcm@fixthebug.org>
|
||||
M: Matt Porter <mporter@linaro.org>
|
||||
L: bcm-kernel-feedback-list@broadcom.com
|
||||
T: git git://git.github.com/broadcom/bcm11351
|
||||
S: Maintained
|
||||
|
@ -2158,7 +2161,7 @@ F: Documentation/zh_CN/
|
|||
|
||||
CHIPIDEA USB HIGH SPEED DUAL ROLE CONTROLLER
|
||||
M: Peter Chen <Peter.Chen@freescale.com>
|
||||
T: git://github.com/hzpeterchen/linux-usb.git
|
||||
T: git git://github.com/hzpeterchen/linux-usb.git
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/usb/chipidea/
|
||||
|
@ -2178,9 +2181,9 @@ S: Supported
|
|||
F: drivers/net/ethernet/cisco/enic/
|
||||
|
||||
CISCO VIC LOW LATENCY NIC DRIVER
|
||||
M: Upinder Malhi <umalhi@cisco.com>
|
||||
S: Supported
|
||||
F: drivers/infiniband/hw/usnic
|
||||
M: Upinder Malhi <umalhi@cisco.com>
|
||||
S: Supported
|
||||
F: drivers/infiniband/hw/usnic
|
||||
|
||||
CIRRUS LOGIC EP93XX ETHERNET DRIVER
|
||||
M: Hartley Sweeten <hsweeten@visionengravers.com>
|
||||
|
@ -2377,20 +2380,20 @@ F: drivers/cpufreq/arm_big_little.c
|
|||
F: drivers/cpufreq/arm_big_little_dt.c
|
||||
|
||||
CPUIDLE DRIVER - ARM BIG LITTLE
|
||||
M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
|
||||
M: Daniel Lezcano <daniel.lezcano@linaro.org>
|
||||
L: linux-pm@vger.kernel.org
|
||||
L: linux-arm-kernel@lists.infradead.org
|
||||
T: git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git
|
||||
S: Maintained
|
||||
F: drivers/cpuidle/cpuidle-big_little.c
|
||||
M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
|
||||
M: Daniel Lezcano <daniel.lezcano@linaro.org>
|
||||
L: linux-pm@vger.kernel.org
|
||||
L: linux-arm-kernel@lists.infradead.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git
|
||||
S: Maintained
|
||||
F: drivers/cpuidle/cpuidle-big_little.c
|
||||
|
||||
CPUIDLE DRIVERS
|
||||
M: Rafael J. Wysocki <rjw@rjwysocki.net>
|
||||
M: Daniel Lezcano <daniel.lezcano@linaro.org>
|
||||
L: linux-pm@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git
|
||||
F: drivers/cpuidle/*
|
||||
F: include/linux/cpuidle.h
|
||||
|
||||
|
@ -2457,9 +2460,9 @@ S: Maintained
|
|||
F: sound/pci/cs5535audio/
|
||||
|
||||
CW1200 WLAN driver
|
||||
M: Solomon Peachy <pizza@shaftnet.org>
|
||||
S: Maintained
|
||||
F: drivers/net/wireless/cw1200/
|
||||
M: Solomon Peachy <pizza@shaftnet.org>
|
||||
S: Maintained
|
||||
F: drivers/net/wireless/cw1200/
|
||||
|
||||
CX18 VIDEO4LINUX DRIVER
|
||||
M: Andy Walls <awalls@md.metrocast.net>
|
||||
|
@ -2610,9 +2613,9 @@ DC395x SCSI driver
|
|||
M: Oliver Neukum <oliver@neukum.org>
|
||||
M: Ali Akcaagac <aliakc@web.de>
|
||||
M: Jamie Lenehan <lenehan@twibble.org>
|
||||
W: http://twibble.org/dist/dc395x/
|
||||
L: dc395x@twibble.org
|
||||
L: http://lists.twibble.org/mailman/listinfo/dc395x/
|
||||
W: http://twibble.org/dist/dc395x/
|
||||
W: http://lists.twibble.org/mailman/listinfo/dc395x/
|
||||
S: Maintained
|
||||
F: Documentation/scsi/dc395x.txt
|
||||
F: drivers/scsi/dc395x.*
|
||||
|
@ -2847,12 +2850,22 @@ F: lib/kobj*
|
|||
DRM DRIVERS
|
||||
M: David Airlie <airlied@linux.ie>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6.git
|
||||
T: git git://people.freedesktop.org/~airlied/linux
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/
|
||||
F: include/drm/
|
||||
F: include/uapi/drm/
|
||||
|
||||
RADEON DRM DRIVERS
|
||||
M: Alex Deucher <alexander.deucher@amd.com>
|
||||
M: Christian König <christian.koenig@amd.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
T: git git://people.freedesktop.org/~agd5f/linux
|
||||
S: Supported
|
||||
F: drivers/gpu/drm/radeon/
|
||||
F: include/drm/radeon*
|
||||
F: include/uapi/drm/radeon*
|
||||
|
||||
INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets)
|
||||
M: Daniel Vetter <daniel.vetter@ffwll.ch>
|
||||
M: Jani Nikula <jani.nikula@linux.intel.com>
|
||||
|
@ -3084,6 +3097,8 @@ F: fs/ecryptfs/
|
|||
|
||||
EDAC-CORE
|
||||
M: Doug Thompson <dougthompson@xmission.com>
|
||||
M: Borislav Petkov <bp@alien8.de>
|
||||
M: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
||||
L: linux-edac@vger.kernel.org
|
||||
W: bluesmoke.sourceforge.net
|
||||
S: Supported
|
||||
|
@ -4547,6 +4562,7 @@ F: Documentation/networking/ixgbevf.txt
|
|||
F: Documentation/networking/i40e.txt
|
||||
F: Documentation/networking/i40evf.txt
|
||||
F: drivers/net/ethernet/intel/
|
||||
F: drivers/net/ethernet/intel/*/
|
||||
|
||||
INTEL-MID GPIO DRIVER
|
||||
M: David Cohen <david.a.cohen@linux.intel.com>
|
||||
|
@ -4903,7 +4919,7 @@ F: drivers/staging/ktap/
|
|||
KCONFIG
|
||||
M: "Yann E. MORIN" <yann.morin.1998@free.fr>
|
||||
L: linux-kbuild@vger.kernel.org
|
||||
T: git://gitorious.org/linux-kconfig/linux-kconfig
|
||||
T: git git://gitorious.org/linux-kconfig/linux-kconfig
|
||||
S: Maintained
|
||||
F: Documentation/kbuild/kconfig-language.txt
|
||||
F: scripts/kconfig/
|
||||
|
@ -5460,11 +5476,11 @@ S: Maintained
|
|||
F: drivers/media/tuners/m88ts2022*
|
||||
|
||||
MA901 MASTERKIT USB FM RADIO DRIVER
|
||||
M: Alexey Klimov <klimov.linux@gmail.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
S: Maintained
|
||||
F: drivers/media/radio/radio-ma901.c
|
||||
M: Alexey Klimov <klimov.linux@gmail.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
S: Maintained
|
||||
F: drivers/media/radio/radio-ma901.c
|
||||
|
||||
MAC80211
|
||||
M: Johannes Berg <johannes@sipsolutions.net>
|
||||
|
@ -5500,6 +5516,11 @@ W: http://www.kernel.org/doc/man-pages
|
|||
L: linux-man@vger.kernel.org
|
||||
S: Maintained
|
||||
|
||||
MARVELL ARMADA DRM SUPPORT
|
||||
M: Russell King <rmk+kernel@arm.linux.org.uk>
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/armada/
|
||||
|
||||
MARVELL GIGABIT ETHERNET DRIVERS (skge/sky2)
|
||||
M: Mirko Lindner <mlindner@marvell.com>
|
||||
M: Stephen Hemminger <stephen@networkplumber.org>
|
||||
|
@ -5620,7 +5641,7 @@ F: drivers/scsi/megaraid/
|
|||
|
||||
MELLANOX ETHERNET DRIVER (mlx4_en)
|
||||
M: Amir Vadai <amirv@mellanox.com>
|
||||
L: netdev@vger.kernel.org
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
Q: http://patchwork.ozlabs.org/project/netdev/list/
|
||||
|
@ -5661,7 +5682,7 @@ F: include/linux/mtd/
|
|||
F: include/uapi/mtd/
|
||||
|
||||
MEN A21 WATCHDOG DRIVER
|
||||
M: Johannes Thumshirn <johannes.thumshirn@men.de>
|
||||
M: Johannes Thumshirn <johannes.thumshirn@men.de>
|
||||
L: linux-watchdog@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/watchdog/mena21_wdt.c
|
||||
|
@ -5717,20 +5738,20 @@ L: linux-rdma@vger.kernel.org
|
|||
W: http://www.mellanox.com
|
||||
Q: http://patchwork.ozlabs.org/project/netdev/list/
|
||||
Q: http://patchwork.kernel.org/project/linux-rdma/list/
|
||||
T: git://openfabrics.org/~eli/connect-ib.git
|
||||
T: git git://openfabrics.org/~eli/connect-ib.git
|
||||
S: Supported
|
||||
F: drivers/net/ethernet/mellanox/mlx5/core/
|
||||
F: include/linux/mlx5/
|
||||
|
||||
Mellanox MLX5 IB driver
|
||||
M: Eli Cohen <eli@mellanox.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
W: http://www.mellanox.com
|
||||
Q: http://patchwork.kernel.org/project/linux-rdma/list/
|
||||
T: git://openfabrics.org/~eli/connect-ib.git
|
||||
S: Supported
|
||||
F: include/linux/mlx5/
|
||||
F: drivers/infiniband/hw/mlx5/
|
||||
M: Eli Cohen <eli@mellanox.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
W: http://www.mellanox.com
|
||||
Q: http://patchwork.kernel.org/project/linux-rdma/list/
|
||||
T: git git://openfabrics.org/~eli/connect-ib.git
|
||||
S: Supported
|
||||
F: include/linux/mlx5/
|
||||
F: drivers/infiniband/hw/mlx5/
|
||||
|
||||
MODULE SUPPORT
|
||||
M: Rusty Russell <rusty@rustcorp.com.au>
|
||||
|
@ -6155,6 +6176,12 @@ S: Supported
|
|||
F: drivers/block/nvme*
|
||||
F: include/linux/nvme.h
|
||||
|
||||
NXP TDA998X DRM DRIVER
|
||||
M: Russell King <rmk+kernel@arm.linux.org.uk>
|
||||
S: Supported
|
||||
F: drivers/gpu/drm/i2c/tda998x_drv.c
|
||||
F: include/drm/i2c/tda998x.h
|
||||
|
||||
OMAP SUPPORT
|
||||
M: Tony Lindgren <tony@atomide.com>
|
||||
L: linux-omap@vger.kernel.org
|
||||
|
@ -8442,8 +8469,8 @@ TARGET SUBSYSTEM
|
|||
M: Nicholas A. Bellinger <nab@linux-iscsi.org>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
L: target-devel@vger.kernel.org
|
||||
L: http://groups.google.com/group/linux-iscsi-target-dev
|
||||
W: http://www.linux-iscsi.org
|
||||
W: http://groups.google.com/group/linux-iscsi-target-dev
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending.git master
|
||||
S: Supported
|
||||
F: drivers/target/
|
||||
|
@ -8684,17 +8711,17 @@ S: Maintained
|
|||
F: drivers/media/radio/radio-raremono.c
|
||||
|
||||
THERMAL
|
||||
M: Zhang Rui <rui.zhang@intel.com>
|
||||
M: Eduardo Valentin <eduardo.valentin@ti.com>
|
||||
L: linux-pm@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git
|
||||
Q: https://patchwork.kernel.org/project/linux-pm/list/
|
||||
S: Supported
|
||||
F: drivers/thermal/
|
||||
F: include/linux/thermal.h
|
||||
F: include/linux/cpu_cooling.h
|
||||
F: Documentation/devicetree/bindings/thermal/
|
||||
M: Zhang Rui <rui.zhang@intel.com>
|
||||
M: Eduardo Valentin <eduardo.valentin@ti.com>
|
||||
L: linux-pm@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git
|
||||
Q: https://patchwork.kernel.org/project/linux-pm/list/
|
||||
S: Supported
|
||||
F: drivers/thermal/
|
||||
F: include/linux/thermal.h
|
||||
F: include/linux/cpu_cooling.h
|
||||
F: Documentation/devicetree/bindings/thermal/
|
||||
|
||||
THINGM BLINK(1) USB RGB LED DRIVER
|
||||
M: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
|
||||
|
@ -9728,7 +9755,6 @@ F: drivers/xen/*swiotlb*
|
|||
XFS FILESYSTEM
|
||||
P: Silicon Graphics Inc
|
||||
M: Dave Chinner <david@fromorbit.com>
|
||||
M: Ben Myers <bpm@sgi.com>
|
||||
M: xfs@oss.sgi.com
|
||||
L: xfs@oss.sgi.com
|
||||
W: http://oss.sgi.com/projects/xfs
|
||||
|
@ -9797,7 +9823,7 @@ ZR36067 VIDEO FOR LINUX DRIVER
|
|||
L: mjpeg-users@lists.sourceforge.net
|
||||
L: linux-media@vger.kernel.org
|
||||
W: http://mjpeg.sourceforge.net/driver-zoran/
|
||||
T: Mercurial http://linuxtv.org/hg/v4l-dvb
|
||||
T: hg http://linuxtv.org/hg/v4l-dvb
|
||||
S: Odd Fixes
|
||||
F: drivers/media/pci/zoran/
|
||||
|
||||
|
|
10
Makefile
10
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 14
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc3
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Shuffling Zombie Juror
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
@ -605,10 +605,11 @@ endif
|
|||
ifdef CONFIG_CC_STACKPROTECTOR_REGULAR
|
||||
stackp-flag := -fstack-protector
|
||||
ifeq ($(call cc-option, $(stackp-flag)),)
|
||||
$(warning Cannot use CONFIG_CC_STACKPROTECTOR: \
|
||||
-fstack-protector not supported by compiler))
|
||||
$(warning Cannot use CONFIG_CC_STACKPROTECTOR_REGULAR: \
|
||||
-fstack-protector not supported by compiler)
|
||||
endif
|
||||
else ifdef CONFIG_CC_STACKPROTECTOR_STRONG
|
||||
else
|
||||
ifdef CONFIG_CC_STACKPROTECTOR_STRONG
|
||||
stackp-flag := -fstack-protector-strong
|
||||
ifeq ($(call cc-option, $(stackp-flag)),)
|
||||
$(warning Cannot use CONFIG_CC_STACKPROTECTOR_STRONG: \
|
||||
|
@ -618,6 +619,7 @@ else
|
|||
# Force off for distro compilers that enable stack protector by default.
|
||||
stackp-flag := $(call cc-option, -fno-stack-protector)
|
||||
endif
|
||||
endif
|
||||
KBUILD_CFLAGS += $(stackp-flag)
|
||||
|
||||
# This warning generated too much noise in a regular build.
|
||||
|
|
|
@ -282,7 +282,7 @@ static inline void __cache_line_loop(unsigned long paddr, unsigned long vaddr,
|
|||
#else
|
||||
/* if V-P const for loop, PTAG can be written once outside loop */
|
||||
if (full_page_op)
|
||||
write_aux_reg(ARC_REG_DC_PTAG, paddr);
|
||||
write_aux_reg(aux_tag, paddr);
|
||||
#endif
|
||||
|
||||
while (num_lines-- > 0) {
|
||||
|
@ -296,7 +296,7 @@ static inline void __cache_line_loop(unsigned long paddr, unsigned long vaddr,
|
|||
write_aux_reg(aux_cmd, vaddr);
|
||||
vaddr += L1_CACHE_BYTES;
|
||||
#else
|
||||
write_aux_reg(aux, paddr);
|
||||
write_aux_reg(aux_cmd, paddr);
|
||||
paddr += L1_CACHE_BYTES;
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -1578,6 +1578,7 @@ config BL_SWITCHER_DUMMY_IF
|
|||
|
||||
choice
|
||||
prompt "Memory split"
|
||||
depends on MMU
|
||||
default VMSPLIT_3G
|
||||
help
|
||||
Select the desired split between kernel and user memory.
|
||||
|
@ -1595,6 +1596,7 @@ endchoice
|
|||
|
||||
config PAGE_OFFSET
|
||||
hex
|
||||
default PHYS_OFFSET if !MMU
|
||||
default 0x40000000 if VMSPLIT_1G
|
||||
default 0x80000000 if VMSPLIT_2G
|
||||
default 0xC0000000
|
||||
|
@ -1903,6 +1905,7 @@ config XEN
|
|||
depends on ARM && AEABI && OF
|
||||
depends on CPU_V7 && !CPU_V6
|
||||
depends on !GENERIC_ATOMIC64
|
||||
depends on MMU
|
||||
select ARM_PSCI
|
||||
select SWIOTLB_XEN
|
||||
select ARCH_DMA_ADDR_T_64BIT
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
ashldi3.S
|
||||
bswapsdi2.S
|
||||
font.c
|
||||
lib1funcs.S
|
||||
hyp-stub.S
|
||||
|
|
|
@ -209,7 +209,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
|
|||
omap3-n900.dtb \
|
||||
omap3-n9.dtb \
|
||||
omap3-n950.dtb \
|
||||
omap3-tobi.dtb \
|
||||
omap3-overo-tobi.dtb \
|
||||
omap3-overo-storm-tobi.dtb \
|
||||
omap3-gta04.dtb \
|
||||
omap3-igep0020.dtb \
|
||||
omap3-igep0030.dtb \
|
||||
|
|
|
@ -121,7 +121,7 @@
|
|||
ti,model = "AM335x-EVMSK";
|
||||
ti,audio-codec = <&tlv320aic3106>;
|
||||
ti,mcasp-controller = <&mcasp1>;
|
||||
ti,codec-clock-rate = <24576000>;
|
||||
ti,codec-clock-rate = <24000000>;
|
||||
ti,audio-routing =
|
||||
"Headphone Jack", "HPLOUT",
|
||||
"Headphone Jack", "HPROUT";
|
||||
|
@ -256,6 +256,12 @@
|
|||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp1_pins: mcasp1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
|
||||
|
@ -456,6 +462,9 @@
|
|||
status = "okay";
|
||||
vmmc-supply = <&vmmc_reg>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&sham {
|
||||
|
|
|
@ -23,6 +23,7 @@
|
|||
gpio0 = &gpio0;
|
||||
gpio1 = &gpio1;
|
||||
gpio2 = &gpio2;
|
||||
eth3 = ð3;
|
||||
};
|
||||
|
||||
cpus {
|
||||
|
@ -291,7 +292,7 @@
|
|||
interrupts = <91>;
|
||||
};
|
||||
|
||||
ethernet@34000 {
|
||||
eth3: ethernet@34000 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
reg = <0x34000 0x4000>;
|
||||
interrupts = <14>;
|
||||
|
|
|
@ -147,7 +147,7 @@
|
|||
};
|
||||
|
||||
pinctrl@35004800 {
|
||||
compatible = "brcm,capri-pinctrl";
|
||||
compatible = "brcm,bcm11351-pinctrl";
|
||||
reg = <0x35004800 0x430>;
|
||||
};
|
||||
|
||||
|
|
|
@ -379,15 +379,6 @@
|
|||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
pmu_intc: pmu-interrupt-ctrl@d0050 {
|
||||
compatible = "marvell,dove-pmu-intc";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0xd0050 0x8>;
|
||||
interrupts = <33>;
|
||||
marvell,#interrupts = <7>;
|
||||
};
|
||||
|
||||
pinctrl: pin-ctrl@d0200 {
|
||||
compatible = "marvell,dove-pinctrl";
|
||||
reg = <0xd0200 0x10>;
|
||||
|
@ -610,8 +601,6 @@
|
|||
rtc: real-time-clock@d8500 {
|
||||
compatible = "marvell,orion-rtc";
|
||||
reg = <0xd8500 0x20>;
|
||||
interrupt-parent = <&pmu_intc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
gpio2: gpio-ctrl@e8400 {
|
||||
|
|
|
@ -612,7 +612,7 @@ clocks {
|
|||
compatible = "ti,keystone,psc-clock";
|
||||
clocks = <&chipclk13>;
|
||||
clock-output-names = "vcp-3";
|
||||
reg = <0x0235000a8 0xb00>, <0x02350060 0x400>;
|
||||
reg = <0x023500a8 0xb00>, <0x02350060 0x400>;
|
||||
reg-names = "control", "domain";
|
||||
domain-id = <24>;
|
||||
};
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
|
||||
/ {
|
||||
model = "OMAP3 GTA04";
|
||||
compatible = "ti,omap3-gta04", "ti,omap3";
|
||||
compatible = "ti,omap3-gta04", "ti,omap36xx", "ti,omap3";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
|
@ -32,7 +32,7 @@
|
|||
aux-button {
|
||||
label = "aux";
|
||||
linux,code = <169>;
|
||||
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
|
@ -92,6 +92,8 @@
|
|||
bmp085@77 {
|
||||
compatible = "bosch,bmp085";
|
||||
reg = <0x77>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <17 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
|
||||
/* leds */
|
||||
|
@ -141,8 +143,8 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
vmmc-supply = <&vmmc1>;
|
||||
vmmc_aux-supply = <&vsim>;
|
||||
bus-width = <4>;
|
||||
ti,non-removable;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
|
||||
/ {
|
||||
model = "IGEPv2 (TI OMAP AM/DM37x)";
|
||||
compatible = "isee,omap3-igep0020", "ti,omap3";
|
||||
compatible = "isee,omap3-igep0020", "ti,omap36xx", "ti,omap3";
|
||||
|
||||
leds {
|
||||
pinctrl-names = "default";
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
|
||||
/ {
|
||||
model = "IGEP COM MODULE (TI OMAP AM/DM37x)";
|
||||
compatible = "isee,omap3-igep0030", "ti,omap3";
|
||||
compatible = "isee,omap3-igep0030", "ti,omap36xx", "ti,omap3";
|
||||
|
||||
leds {
|
||||
pinctrl-names = "default";
|
||||
|
|
|
@ -14,5 +14,5 @@
|
|||
|
||||
/ {
|
||||
model = "Nokia N9";
|
||||
compatible = "nokia,omap3-n9", "ti,omap3";
|
||||
compatible = "nokia,omap3-n9", "ti,omap36xx", "ti,omap3";
|
||||
};
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
|
||||
* Copyright 2013 Aaro Koskinen <aaro.koskinen@iki.fi>
|
||||
* Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 (or later) as
|
||||
|
@ -13,7 +13,7 @@
|
|||
|
||||
/ {
|
||||
model = "Nokia N900";
|
||||
compatible = "nokia,omap3-n900", "ti,omap3";
|
||||
compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
|
|
|
@ -14,5 +14,5 @@
|
|||
|
||||
/ {
|
||||
model = "Nokia N950";
|
||||
compatible = "nokia,omap3-n950", "ti,omap3";
|
||||
compatible = "nokia,omap3-n950", "ti,omap36xx", "ti,omap3";
|
||||
};
|
||||
|
|
|
@ -0,0 +1,22 @@
|
|||
/*
|
||||
* Copyright (C) 2012 Florian Vaussard, EPFL Mobots group
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Tobi expansion board is manufactured by Gumstix Inc.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "omap36xx.dtsi"
|
||||
#include "omap3-overo-tobi-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "OMAP36xx/AM37xx/DM37xx Gumstix Overo on Tobi";
|
||||
compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap36xx", "ti,omap3";
|
||||
};
|
||||
|
|
@ -13,9 +13,6 @@
|
|||
#include "omap3-overo.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TI OMAP3 Gumstix Overo on Tobi";
|
||||
compatible = "ti,omap3-tobi", "ti,omap3-overo", "ti,omap3";
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
heartbeat {
|
|
@ -0,0 +1,22 @@
|
|||
/*
|
||||
* Copyright (C) 2012 Florian Vaussard, EPFL Mobots group
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Tobi expansion board is manufactured by Gumstix Inc.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "omap34xx.dtsi"
|
||||
#include "omap3-overo-tobi-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "OMAP35xx Gumstix Overo on Tobi";
|
||||
compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap3430", "ti,omap3";
|
||||
};
|
||||
|
|
@ -9,9 +9,6 @@
|
|||
/*
|
||||
* The Gumstix Overo must be combined with an expansion board.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "omap34xx.dtsi"
|
||||
|
||||
/ {
|
||||
pwmleds {
|
||||
|
|
|
@ -426,7 +426,7 @@
|
|||
};
|
||||
|
||||
rtp: rtp@01c25000 {
|
||||
compatible = "allwinner,sun4i-ts";
|
||||
compatible = "allwinner,sun4i-a10-ts";
|
||||
reg = <0x01c25000 0x100>;
|
||||
interrupts = <29>;
|
||||
};
|
||||
|
|
|
@ -383,7 +383,7 @@
|
|||
};
|
||||
|
||||
rtp: rtp@01c25000 {
|
||||
compatible = "allwinner,sun4i-ts";
|
||||
compatible = "allwinner,sun4i-a10-ts";
|
||||
reg = <0x01c25000 0x100>;
|
||||
interrupts = <29>;
|
||||
};
|
||||
|
|
|
@ -346,7 +346,7 @@
|
|||
};
|
||||
|
||||
rtp: rtp@01c25000 {
|
||||
compatible = "allwinner,sun4i-ts";
|
||||
compatible = "allwinner,sun4i-a10-ts";
|
||||
reg = <0x01c25000 0x100>;
|
||||
interrupts = <29>;
|
||||
};
|
||||
|
|
|
@ -454,7 +454,7 @@
|
|||
rtc: rtc@01c20d00 {
|
||||
compatible = "allwinner,sun7i-a20-rtc";
|
||||
reg = <0x01c20d00 0x20>;
|
||||
interrupts = <0 24 1>;
|
||||
interrupts = <0 24 4>;
|
||||
};
|
||||
|
||||
sid: eeprom@01c23800 {
|
||||
|
@ -463,7 +463,7 @@
|
|||
};
|
||||
|
||||
rtp: rtp@01c25000 {
|
||||
compatible = "allwinner,sun4i-ts";
|
||||
compatible = "allwinner,sun4i-a10-ts";
|
||||
reg = <0x01c25000 0x100>;
|
||||
interrupts = <0 29 4>;
|
||||
};
|
||||
|
@ -596,10 +596,10 @@
|
|||
hstimer@01c60000 {
|
||||
compatible = "allwinner,sun7i-a20-hstimer";
|
||||
reg = <0x01c60000 0x1000>;
|
||||
interrupts = <0 81 1>,
|
||||
<0 82 1>,
|
||||
<0 83 1>,
|
||||
<0 84 1>;
|
||||
interrupts = <0 81 4>,
|
||||
<0 82 4>,
|
||||
<0 83 4>,
|
||||
<0 84 4>;
|
||||
clocks = <&ahb_gates 28>;
|
||||
};
|
||||
|
||||
|
|
|
@ -57,6 +57,8 @@
|
|||
resets = <&tegra_car 27>;
|
||||
reset-names = "dc";
|
||||
|
||||
nvidia,head = <0>;
|
||||
|
||||
rgb {
|
||||
status = "disabled";
|
||||
};
|
||||
|
@ -72,6 +74,8 @@
|
|||
resets = <&tegra_car 26>;
|
||||
reset-names = "dc";
|
||||
|
||||
nvidia,head = <1>;
|
||||
|
||||
rgb {
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -94,6 +94,8 @@
|
|||
resets = <&tegra_car 27>;
|
||||
reset-names = "dc";
|
||||
|
||||
nvidia,head = <0>;
|
||||
|
||||
rgb {
|
||||
status = "disabled";
|
||||
};
|
||||
|
@ -109,6 +111,8 @@
|
|||
resets = <&tegra_car 26>;
|
||||
reset-names = "dc";
|
||||
|
||||
nvidia,head = <1>;
|
||||
|
||||
rgb {
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
compatible = "nvidia,cardhu", "nvidia,tegra30";
|
||||
|
||||
aliases {
|
||||
rtc0 = "/i2c@7000d000/tps6586x@34";
|
||||
rtc0 = "/i2c@7000d000/tps65911@2d";
|
||||
rtc1 = "/rtc@7000e000";
|
||||
};
|
||||
|
||||
|
|
|
@ -170,6 +170,8 @@
|
|||
resets = <&tegra_car 27>;
|
||||
reset-names = "dc";
|
||||
|
||||
nvidia,head = <0>;
|
||||
|
||||
rgb {
|
||||
status = "disabled";
|
||||
};
|
||||
|
@ -185,6 +187,8 @@
|
|||
resets = <&tegra_car 26>;
|
||||
reset-names = "dc";
|
||||
|
||||
nvidia,head = <1>;
|
||||
|
||||
rgb {
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -1,2 +0,0 @@
|
|||
/include/ "tests-phandle.dtsi"
|
||||
/include/ "tests-interrupts.dtsi"
|
|
@ -1,4 +1,4 @@
|
|||
/include/ "versatile-ab.dts"
|
||||
#include <versatile-ab.dts>
|
||||
|
||||
/ {
|
||||
model = "ARM Versatile PB";
|
||||
|
@ -47,4 +47,4 @@
|
|||
};
|
||||
};
|
||||
|
||||
/include/ "testcases/tests.dtsi"
|
||||
#include <testcases.dtsi>
|
||||
|
|
|
@ -204,7 +204,10 @@ CONFIG_MMC_BLOCK_MINORS=16
|
|||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MMC_SDHCI_TEGRA=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_ONESHOT=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
|
|
|
@ -30,14 +30,15 @@
|
|||
*/
|
||||
#define UL(x) _AC(x, UL)
|
||||
|
||||
/* PAGE_OFFSET - the virtual address of the start of the kernel image */
|
||||
#define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET)
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
|
||||
/*
|
||||
* PAGE_OFFSET - the virtual address of the start of the kernel image
|
||||
* TASK_SIZE - the maximum size of a user space task.
|
||||
* TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area
|
||||
*/
|
||||
#define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET)
|
||||
#define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(SZ_16M))
|
||||
#define TASK_UNMAPPED_BASE ALIGN(TASK_SIZE / 3, SZ_16M)
|
||||
|
||||
|
@ -104,10 +105,6 @@
|
|||
#define END_MEM (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE)
|
||||
#endif
|
||||
|
||||
#ifndef PAGE_OFFSET
|
||||
#define PAGE_OFFSET PLAT_PHYS_OFFSET
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The module can be at any place in ram in nommu mode.
|
||||
*/
|
||||
|
|
|
@ -177,6 +177,18 @@ __lookup_processor_type_data:
|
|||
.long __proc_info_end
|
||||
.size __lookup_processor_type_data, . - __lookup_processor_type_data
|
||||
|
||||
__error_lpae:
|
||||
#ifdef CONFIG_DEBUG_LL
|
||||
adr r0, str_lpae
|
||||
bl printascii
|
||||
b __error
|
||||
str_lpae: .asciz "\nError: Kernel with LPAE support, but CPU does not support LPAE.\n"
|
||||
#else
|
||||
b __error
|
||||
#endif
|
||||
.align
|
||||
ENDPROC(__error_lpae)
|
||||
|
||||
__error_p:
|
||||
#ifdef CONFIG_DEBUG_LL
|
||||
adr r0, str_p1
|
||||
|
|
|
@ -102,7 +102,7 @@ ENTRY(stext)
|
|||
and r3, r3, #0xf @ extract VMSA support
|
||||
cmp r3, #5 @ long-descriptor translation table format?
|
||||
THUMB( it lo ) @ force fixup-able long branch encoding
|
||||
blo __error_p @ only classic page table format
|
||||
blo __error_lpae @ only classic page table format
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_XIP_KERNEL
|
||||
|
|
|
@ -878,7 +878,8 @@ static int hyp_init_cpu_pm_notifier(struct notifier_block *self,
|
|||
unsigned long cmd,
|
||||
void *v)
|
||||
{
|
||||
if (cmd == CPU_PM_EXIT) {
|
||||
if (cmd == CPU_PM_EXIT &&
|
||||
__hyp_get_vectors() == hyp_default_vectors) {
|
||||
cpu_init_hyp_mode(NULL);
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
|
|
@ -220,6 +220,10 @@ after_vfp_restore:
|
|||
* in Hyp mode (see init_hyp_mode in arch/arm/kvm/arm.c). Return values are
|
||||
* passed in r0 and r1.
|
||||
*
|
||||
* A function pointer with a value of 0xffffffff has a special meaning,
|
||||
* and is used to implement __hyp_get_vectors in the same way as in
|
||||
* arch/arm/kernel/hyp_stub.S.
|
||||
*
|
||||
* The calling convention follows the standard AAPCS:
|
||||
* r0 - r3: caller save
|
||||
* r12: caller save
|
||||
|
@ -363,6 +367,11 @@ hyp_hvc:
|
|||
host_switch_to_hyp:
|
||||
pop {r0, r1, r2}
|
||||
|
||||
/* Check for __hyp_get_vectors */
|
||||
cmp r0, #-1
|
||||
mrceq p15, 4, r0, c12, c0, 0 @ get HVBAR
|
||||
beq 1f
|
||||
|
||||
push {lr}
|
||||
mrs lr, SPSR
|
||||
push {lr}
|
||||
|
@ -378,7 +387,7 @@ THUMB( orr lr, #1)
|
|||
pop {lr}
|
||||
msr SPSR_csxf, lr
|
||||
pop {lr}
|
||||
eret
|
||||
1: eret
|
||||
|
||||
guest_trap:
|
||||
load_vcpu @ Load VCPU pointer to r0
|
||||
|
|
|
@ -101,11 +101,9 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
|
|||
obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
|
||||
obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o mach-imx6sl.o
|
||||
|
||||
ifeq ($(CONFIG_PM),y)
|
||||
obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o
|
||||
# i.MX6SL reuses i.MX6Q code
|
||||
obj-$(CONFIG_SOC_IMX6SL) += pm-imx6q.o headsmp.o
|
||||
endif
|
||||
|
||||
# i.MX5 based machines
|
||||
obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
|
||||
|
|
|
@ -144,13 +144,11 @@ void imx6q_set_chicken_bit(void);
|
|||
void imx_cpu_die(unsigned int cpu);
|
||||
int imx_cpu_kill(unsigned int cpu);
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
void imx6q_pm_init(void);
|
||||
void imx6q_pm_set_ccm_base(void __iomem *base);
|
||||
#ifdef CONFIG_PM
|
||||
void imx5_pm_init(void);
|
||||
#else
|
||||
static inline void imx6q_pm_init(void) {}
|
||||
static inline void imx6q_pm_set_ccm_base(void __iomem *base) {}
|
||||
static inline void imx5_pm_init(void) {}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -156,6 +156,7 @@ static struct omap_usb_config nokia770_usb_config __initdata = {
|
|||
.register_dev = 1,
|
||||
.hmc_mode = 16,
|
||||
.pins[0] = 6,
|
||||
.extcon = "tahvo-usb",
|
||||
};
|
||||
|
||||
#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
|
||||
|
|
|
@ -50,6 +50,7 @@ config SOC_OMAP5
|
|||
bool "TI OMAP5"
|
||||
depends on ARCH_MULTI_V7
|
||||
select ARCH_OMAP2PLUS
|
||||
select ARCH_HAS_OPP
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select ARM_GIC
|
||||
select CPU_V7
|
||||
|
@ -63,6 +64,7 @@ config SOC_AM33XX
|
|||
bool "TI AM33XX"
|
||||
depends on ARCH_MULTI_V7
|
||||
select ARCH_OMAP2PLUS
|
||||
select ARCH_HAS_OPP
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select CPU_V7
|
||||
select MULTI_IRQ_HANDLER
|
||||
|
@ -72,6 +74,7 @@ config SOC_AM43XX
|
|||
depends on ARCH_MULTI_V7
|
||||
select CPU_V7
|
||||
select ARCH_OMAP2PLUS
|
||||
select ARCH_HAS_OPP
|
||||
select MULTI_IRQ_HANDLER
|
||||
select ARM_GIC
|
||||
select MACH_OMAP_GENERIC
|
||||
|
@ -80,6 +83,7 @@ config SOC_DRA7XX
|
|||
bool "TI DRA7XX"
|
||||
depends on ARCH_MULTI_V7
|
||||
select ARCH_OMAP2PLUS
|
||||
select ARCH_HAS_OPP
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select ARM_GIC
|
||||
select CPU_V7
|
||||
|
@ -268,9 +272,6 @@ config MACH_OMAP_3430SDP
|
|||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
|
||||
config MACH_NOKIA_N800
|
||||
bool
|
||||
|
||||
config MACH_NOKIA_N810
|
||||
bool
|
||||
|
||||
|
@ -281,7 +282,6 @@ config MACH_NOKIA_N8X0
|
|||
bool "Nokia N800/N810"
|
||||
depends on SOC_OMAP2420
|
||||
default y
|
||||
select MACH_NOKIA_N800
|
||||
select MACH_NOKIA_N810
|
||||
select MACH_NOKIA_N810_WIMAX
|
||||
select OMAP_PACKAGE_ZAC
|
||||
|
|
|
@ -433,7 +433,9 @@ static const struct clk_ops dpll4_m5x2_ck_ops = {
|
|||
.enable = &omap2_dflt_clk_enable,
|
||||
.disable = &omap2_dflt_clk_disable,
|
||||
.is_enabled = &omap2_dflt_clk_is_enabled,
|
||||
.set_rate = &omap3_clkoutx2_set_rate,
|
||||
.recalc_rate = &omap3_clkoutx2_recalc,
|
||||
.round_rate = &omap3_clkoutx2_round_rate,
|
||||
};
|
||||
|
||||
static const struct clk_ops dpll4_m5x2_ck_3630_ops = {
|
||||
|
|
|
@ -23,6 +23,8 @@
|
|||
#include "prm.h"
|
||||
#include "clockdomain.h"
|
||||
|
||||
#define MAX_CPUS 2
|
||||
|
||||
/* Machine specific information */
|
||||
struct idle_statedata {
|
||||
u32 cpu_state;
|
||||
|
@ -48,11 +50,11 @@ static struct idle_statedata omap4_idle_data[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct powerdomain *mpu_pd, *cpu_pd[NR_CPUS];
|
||||
static struct clockdomain *cpu_clkdm[NR_CPUS];
|
||||
static struct powerdomain *mpu_pd, *cpu_pd[MAX_CPUS];
|
||||
static struct clockdomain *cpu_clkdm[MAX_CPUS];
|
||||
|
||||
static atomic_t abort_barrier;
|
||||
static bool cpu_done[NR_CPUS];
|
||||
static bool cpu_done[MAX_CPUS];
|
||||
static struct idle_statedata *state_ptr = &omap4_idle_data[0];
|
||||
|
||||
/* Private functions */
|
||||
|
|
|
@ -623,25 +623,12 @@ void omap3_dpll_deny_idle(struct clk_hw_omap *clk)
|
|||
|
||||
/* Clock control for DPLL outputs */
|
||||
|
||||
/**
|
||||
* omap3_clkoutx2_recalc - recalculate DPLL X2 output virtual clock rate
|
||||
* @clk: DPLL output struct clk
|
||||
*
|
||||
* Using parent clock DPLL data, look up DPLL state. If locked, set our
|
||||
* rate to the dpll_clk * 2; otherwise, just use dpll_clk.
|
||||
*/
|
||||
unsigned long omap3_clkoutx2_recalc(struct clk_hw *hw,
|
||||
unsigned long parent_rate)
|
||||
/* Find the parent DPLL for the given clkoutx2 clock */
|
||||
static struct clk_hw_omap *omap3_find_clkoutx2_dpll(struct clk_hw *hw)
|
||||
{
|
||||
const struct dpll_data *dd;
|
||||
unsigned long rate;
|
||||
u32 v;
|
||||
struct clk_hw_omap *pclk = NULL;
|
||||
struct clk *parent;
|
||||
|
||||
if (!parent_rate)
|
||||
return 0;
|
||||
|
||||
/* Walk up the parents of clk, looking for a DPLL */
|
||||
do {
|
||||
do {
|
||||
|
@ -656,9 +643,35 @@ unsigned long omap3_clkoutx2_recalc(struct clk_hw *hw,
|
|||
/* clk does not have a DPLL as a parent? error in the clock data */
|
||||
if (!pclk) {
|
||||
WARN_ON(1);
|
||||
return 0;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return pclk;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap3_clkoutx2_recalc - recalculate DPLL X2 output virtual clock rate
|
||||
* @clk: DPLL output struct clk
|
||||
*
|
||||
* Using parent clock DPLL data, look up DPLL state. If locked, set our
|
||||
* rate to the dpll_clk * 2; otherwise, just use dpll_clk.
|
||||
*/
|
||||
unsigned long omap3_clkoutx2_recalc(struct clk_hw *hw,
|
||||
unsigned long parent_rate)
|
||||
{
|
||||
const struct dpll_data *dd;
|
||||
unsigned long rate;
|
||||
u32 v;
|
||||
struct clk_hw_omap *pclk = NULL;
|
||||
|
||||
if (!parent_rate)
|
||||
return 0;
|
||||
|
||||
pclk = omap3_find_clkoutx2_dpll(hw);
|
||||
|
||||
if (!pclk)
|
||||
return 0;
|
||||
|
||||
dd = pclk->dpll_data;
|
||||
|
||||
WARN_ON(!dd->enable_mask);
|
||||
|
@ -672,6 +685,55 @@ unsigned long omap3_clkoutx2_recalc(struct clk_hw *hw,
|
|||
return rate;
|
||||
}
|
||||
|
||||
int omap3_clkoutx2_set_rate(struct clk_hw *hw, unsigned long rate,
|
||||
unsigned long parent_rate)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
long omap3_clkoutx2_round_rate(struct clk_hw *hw, unsigned long rate,
|
||||
unsigned long *prate)
|
||||
{
|
||||
const struct dpll_data *dd;
|
||||
u32 v;
|
||||
struct clk_hw_omap *pclk = NULL;
|
||||
|
||||
if (!*prate)
|
||||
return 0;
|
||||
|
||||
pclk = omap3_find_clkoutx2_dpll(hw);
|
||||
|
||||
if (!pclk)
|
||||
return 0;
|
||||
|
||||
dd = pclk->dpll_data;
|
||||
|
||||
/* TYPE J does not have a clkoutx2 */
|
||||
if (dd->flags & DPLL_J_TYPE) {
|
||||
*prate = __clk_round_rate(__clk_get_parent(pclk->hw.clk), rate);
|
||||
return *prate;
|
||||
}
|
||||
|
||||
WARN_ON(!dd->enable_mask);
|
||||
|
||||
v = omap2_clk_readl(pclk, dd->control_reg) & dd->enable_mask;
|
||||
v >>= __ffs(dd->enable_mask);
|
||||
|
||||
/* If in bypass, the rate is fixed to the bypass rate*/
|
||||
if (v != OMAP3XXX_EN_DPLL_LOCKED)
|
||||
return *prate;
|
||||
|
||||
if (__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT) {
|
||||
unsigned long best_parent;
|
||||
|
||||
best_parent = (rate / 2);
|
||||
*prate = __clk_round_rate(__clk_get_parent(hw->clk),
|
||||
best_parent);
|
||||
}
|
||||
|
||||
return *prate * 2;
|
||||
}
|
||||
|
||||
/* OMAP3/4 non-CORE DPLL clkops */
|
||||
const struct clk_hw_omap_ops clkhwops_omap3_dpll = {
|
||||
.allow_idle = omap3_dpll_allow_idle,
|
||||
|
|
|
@ -1339,7 +1339,7 @@ static void __maybe_unused gpmc_read_timings_dt(struct device_node *np,
|
|||
of_property_read_bool(np, "gpmc,time-para-granularity");
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MTD_NAND
|
||||
#if IS_ENABLED(CONFIG_MTD_NAND)
|
||||
|
||||
static const char * const nand_xfer_types[] = {
|
||||
[NAND_OMAP_PREFETCH_POLLED] = "prefetch-polled",
|
||||
|
@ -1429,7 +1429,7 @@ static int gpmc_probe_nand_child(struct platform_device *pdev,
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MTD_ONENAND
|
||||
#if IS_ENABLED(CONFIG_MTD_ONENAND)
|
||||
static int gpmc_probe_onenand_child(struct platform_device *pdev,
|
||||
struct device_node *child)
|
||||
{
|
||||
|
|
|
@ -179,15 +179,6 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
|
|||
.length = L4_EMU_34XX_SIZE,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
#if defined(CONFIG_DEBUG_LL) && \
|
||||
(defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
|
||||
{
|
||||
.virtual = ZOOM_UART_VIRT,
|
||||
.pfn = __phys_to_pfn(ZOOM_UART_BASE),
|
||||
.length = SZ_1M,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
|
@ -1947,29 +1947,31 @@ static int _ocp_softreset(struct omap_hwmod *oh)
|
|||
goto dis_opt_clks;
|
||||
|
||||
_write_sysconfig(v, oh);
|
||||
|
||||
if (oh->class->sysc->srst_udelay)
|
||||
udelay(oh->class->sysc->srst_udelay);
|
||||
|
||||
c = _wait_softreset_complete(oh);
|
||||
if (c == MAX_MODULE_SOFTRESET_WAIT) {
|
||||
pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
|
||||
oh->name, MAX_MODULE_SOFTRESET_WAIT);
|
||||
ret = -ETIMEDOUT;
|
||||
goto dis_opt_clks;
|
||||
} else {
|
||||
pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
|
||||
}
|
||||
|
||||
ret = _clear_softreset(oh, &v);
|
||||
if (ret)
|
||||
goto dis_opt_clks;
|
||||
|
||||
_write_sysconfig(v, oh);
|
||||
|
||||
if (oh->class->sysc->srst_udelay)
|
||||
udelay(oh->class->sysc->srst_udelay);
|
||||
|
||||
c = _wait_softreset_complete(oh);
|
||||
if (c == MAX_MODULE_SOFTRESET_WAIT)
|
||||
pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
|
||||
oh->name, MAX_MODULE_SOFTRESET_WAIT);
|
||||
else
|
||||
pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
|
||||
|
||||
/*
|
||||
* XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
|
||||
* _wait_target_ready() or _reset()
|
||||
*/
|
||||
|
||||
ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
|
||||
|
||||
dis_opt_clks:
|
||||
if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
|
||||
_disable_optional_clocks(oh);
|
||||
|
|
|
@ -1365,11 +1365,10 @@ static struct omap_hwmod_class_sysconfig dra7xx_spinlock_sysc = {
|
|||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x0010,
|
||||
.syss_offs = 0x0014,
|
||||
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
|
||||
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
|
||||
SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP),
|
||||
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_ENAWAKEUP |
|
||||
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
|
||||
SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
|
|
|
@ -22,6 +22,8 @@
|
|||
#include "common-board-devices.h"
|
||||
#include "dss-common.h"
|
||||
#include "control.h"
|
||||
#include "omap-secure.h"
|
||||
#include "soc.h"
|
||||
|
||||
struct pdata_init {
|
||||
const char *compatible;
|
||||
|
@ -169,6 +171,22 @@ static void __init am3517_evm_legacy_init(void)
|
|||
omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
|
||||
omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
|
||||
}
|
||||
|
||||
static void __init nokia_n900_legacy_init(void)
|
||||
{
|
||||
hsmmc2_internal_input_clk();
|
||||
|
||||
if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
|
||||
if (IS_ENABLED(CONFIG_ARM_ERRATA_430973)) {
|
||||
pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
|
||||
/* set IBE to 1 */
|
||||
rx51_secure_update_aux_cr(BIT(6), 0);
|
||||
} else {
|
||||
pr_warning("RX-51: Not enabling ARM errata 430973 workaround\n");
|
||||
pr_warning("Thumb binaries may crash randomly without this workaround\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_ARCH_OMAP3 */
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
|
@ -239,6 +257,7 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
|
|||
#endif
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata),
|
||||
OF_DEV_AUXDATA("ti,omap3-padconf", 0x480025a0, "480025a0.pinmux", &pcs_pdata),
|
||||
OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002a00, "48002a00.pinmux", &pcs_pdata),
|
||||
/* Only on am3517 */
|
||||
OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL),
|
||||
|
@ -259,7 +278,7 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
|
|||
static struct pdata_init pdata_quirks[] __initdata = {
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
{ "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, },
|
||||
{ "nokia,omap3-n900", hsmmc2_internal_input_clk, },
|
||||
{ "nokia,omap3-n900", nokia_n900_legacy_init, },
|
||||
{ "nokia,omap3-n9", hsmmc2_internal_input_clk, },
|
||||
{ "nokia,omap3-n950", hsmmc2_internal_input_clk, },
|
||||
{ "isee,omap3-igep0020", omap3_igep0020_legacy_init, },
|
||||
|
|
|
@ -183,11 +183,11 @@ void omap4_prminst_global_warm_sw_reset(void)
|
|||
OMAP4_PRM_RSTCTRL_OFFSET);
|
||||
v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK;
|
||||
omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION,
|
||||
OMAP4430_PRM_DEVICE_INST,
|
||||
dev_inst,
|
||||
OMAP4_PRM_RSTCTRL_OFFSET);
|
||||
|
||||
/* OCP barrier */
|
||||
v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
|
||||
OMAP4430_PRM_DEVICE_INST,
|
||||
dev_inst,
|
||||
OMAP4_PRM_RSTCTRL_OFFSET);
|
||||
}
|
||||
|
|
|
@ -38,6 +38,7 @@
|
|||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/usb/gpio_vbus.h>
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/regulator/max1586.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/i2c/pxa-i2c.h>
|
||||
|
@ -714,6 +715,10 @@ static struct gpio global_gpios[] = {
|
|||
{ GPIO56_MT9M111_nOE, GPIOF_OUT_INIT_LOW, "Camera nOE" },
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply fixed_5v0_consumers[] = {
|
||||
REGULATOR_SUPPLY("power", "pwm-backlight"),
|
||||
};
|
||||
|
||||
static void __init mioa701_machine_init(void)
|
||||
{
|
||||
int rc;
|
||||
|
@ -753,6 +758,10 @@ static void __init mioa701_machine_init(void)
|
|||
pxa_set_i2c_info(&i2c_pdata);
|
||||
pxa27x_set_i2c_power_info(NULL);
|
||||
pxa_set_camera_info(&mioa701_pxacamera_platform_data);
|
||||
|
||||
regulator_register_always_on(0, "fixed-5.0V", fixed_5v0_consumers,
|
||||
ARRAY_SIZE(fixed_5v0_consumers),
|
||||
5000000);
|
||||
}
|
||||
|
||||
static void mioa701_machine_exit(void)
|
||||
|
|
|
@ -13,6 +13,8 @@
|
|||
#ifndef __ASM_ARCH_COLLIE_H
|
||||
#define __ASM_ARCH_COLLIE_H
|
||||
|
||||
#include "hardware.h" /* Gives GPIO_MAX */
|
||||
|
||||
extern void locomolcd_power(int on);
|
||||
|
||||
#define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1)
|
||||
|
|
|
@ -73,10 +73,20 @@ u32 tegra_uart_config[3] = {
|
|||
static void __init tegra_init_cache(void)
|
||||
{
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
static const struct of_device_id pl310_ids[] __initconst = {
|
||||
{ .compatible = "arm,pl310-cache", },
|
||||
{}
|
||||
};
|
||||
|
||||
struct device_node *np;
|
||||
int ret;
|
||||
void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
|
||||
u32 aux_ctrl, cache_type;
|
||||
|
||||
np = of_find_matching_node(NULL, pl310_ids);
|
||||
if (!np)
|
||||
return;
|
||||
|
||||
cache_type = readl(p + L2X0_CACHE_TYPE);
|
||||
aux_ctrl = (cache_type & 0x700) << (17-8);
|
||||
aux_ctrl |= 0x7C400001;
|
||||
|
|
|
@ -264,6 +264,9 @@ static void walk_pmd(struct pg_state *st, pud_t *pud, unsigned long start)
|
|||
note_page(st, addr, 3, pmd_val(*pmd));
|
||||
else
|
||||
walk_pte(st, pmd, addr);
|
||||
|
||||
if (SECTION_SIZE < PMD_SIZE && pmd_large(pmd[1]))
|
||||
note_page(st, addr + SECTION_SIZE, 3, pmd_val(pmd[1]));
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -16,6 +16,8 @@
|
|||
#ifndef __ASM_PERCPU_H
|
||||
#define __ASM_PERCPU_H
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
|
||||
static inline void set_my_cpu_offset(unsigned long off)
|
||||
{
|
||||
asm volatile("msr tpidr_el1, %0" :: "r" (off) : "memory");
|
||||
|
@ -36,6 +38,12 @@ static inline unsigned long __my_cpu_offset(void)
|
|||
}
|
||||
#define __my_cpu_offset __my_cpu_offset()
|
||||
|
||||
#else /* !CONFIG_SMP */
|
||||
|
||||
#define set_my_cpu_offset(x) do { } while (0)
|
||||
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
#include <asm-generic/percpu.h>
|
||||
|
||||
#endif /* __ASM_PERCPU_H */
|
||||
|
|
|
@ -136,11 +136,11 @@ extern struct page *empty_zero_page;
|
|||
/*
|
||||
* The following only work if pte_present(). Undefined behaviour otherwise.
|
||||
*/
|
||||
#define pte_present(pte) (pte_val(pte) & (PTE_VALID | PTE_PROT_NONE))
|
||||
#define pte_dirty(pte) (pte_val(pte) & PTE_DIRTY)
|
||||
#define pte_young(pte) (pte_val(pte) & PTE_AF)
|
||||
#define pte_special(pte) (pte_val(pte) & PTE_SPECIAL)
|
||||
#define pte_write(pte) (pte_val(pte) & PTE_WRITE)
|
||||
#define pte_present(pte) (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
|
||||
#define pte_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY))
|
||||
#define pte_young(pte) (!!(pte_val(pte) & PTE_AF))
|
||||
#define pte_special(pte) (!!(pte_val(pte) & PTE_SPECIAL))
|
||||
#define pte_write(pte) (!!(pte_val(pte) & PTE_WRITE))
|
||||
#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
|
||||
|
||||
#define pte_valid_user(pte) \
|
||||
|
|
|
@ -48,7 +48,11 @@ int unwind_frame(struct stackframe *frame)
|
|||
|
||||
frame->sp = fp + 0x10;
|
||||
frame->fp = *(unsigned long *)(fp);
|
||||
frame->pc = *(unsigned long *)(fp + 8);
|
||||
/*
|
||||
* -4 here because we care about the PC at time of bl,
|
||||
* not where the return will go.
|
||||
*/
|
||||
frame->pc = *(unsigned long *)(fp + 8) - 4;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -694,6 +694,24 @@ __hyp_panic_str:
|
|||
|
||||
.align 2
|
||||
|
||||
/*
|
||||
* u64 kvm_call_hyp(void *hypfn, ...);
|
||||
*
|
||||
* This is not really a variadic function in the classic C-way and care must
|
||||
* be taken when calling this to ensure parameters are passed in registers
|
||||
* only, since the stack will change between the caller and the callee.
|
||||
*
|
||||
* Call the function with the first argument containing a pointer to the
|
||||
* function you wish to call in Hyp mode, and subsequent arguments will be
|
||||
* passed as x0, x1, and x2 (a maximum of 3 arguments in addition to the
|
||||
* function pointer can be passed). The function being called must be mapped
|
||||
* in Hyp mode (see init_hyp_mode in arch/arm/kvm/arm.c). Return values are
|
||||
* passed in r0 and r1.
|
||||
*
|
||||
* A function pointer with a value of 0 has a special meaning, and is
|
||||
* used to implement __hyp_get_vectors in the same way as in
|
||||
* arch/arm64/kernel/hyp_stub.S.
|
||||
*/
|
||||
ENTRY(kvm_call_hyp)
|
||||
hvc #0
|
||||
ret
|
||||
|
@ -737,7 +755,12 @@ el1_sync: // Guest trapped into EL2
|
|||
pop x2, x3
|
||||
pop x0, x1
|
||||
|
||||
push lr, xzr
|
||||
/* Check for __hyp_get_vectors */
|
||||
cbnz x0, 1f
|
||||
mrs x0, vbar_el2
|
||||
b 2f
|
||||
|
||||
1: push lr, xzr
|
||||
|
||||
/*
|
||||
* Compute the function address in EL2, and shuffle the parameters.
|
||||
|
@ -750,7 +773,7 @@ el1_sync: // Guest trapped into EL2
|
|||
blr lr
|
||||
|
||||
pop lr, xzr
|
||||
eret
|
||||
2: eret
|
||||
|
||||
el1_trap:
|
||||
/*
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
#define _ASM_C6X_CACHE_H
|
||||
|
||||
#include <linux/irqflags.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
/*
|
||||
* Cache line size
|
||||
|
|
|
@ -144,7 +144,7 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
|
|||
* definition, which doesn't have the same semantics. We don't want to
|
||||
* use -fno-builtin, so just hide the name ffs.
|
||||
*/
|
||||
#define ffs kernel_ffs
|
||||
#define ffs(x) kernel_ffs(x)
|
||||
|
||||
#include <asm-generic/bitops/fls.h>
|
||||
#include <asm-generic/bitops/__fls.h>
|
||||
|
|
|
@ -98,7 +98,7 @@ static int uncached_add_chunk(struct uncached_pool *uc_pool, int nid)
|
|||
/* attempt to allocate a granule's worth of cached memory pages */
|
||||
|
||||
page = alloc_pages_exact_node(nid,
|
||||
GFP_KERNEL | __GFP_ZERO | GFP_THISNODE,
|
||||
GFP_KERNEL | __GFP_ZERO | __GFP_THISNODE,
|
||||
IA64_GRANULE_SHIFT-PAGE_SHIFT);
|
||||
if (!page) {
|
||||
mutex_unlock(&uc_pool->add_chunk_mutex);
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
|
||||
generic-y += barrier.h
|
||||
generic-y += bitsperlong.h
|
||||
generic-y += clkdev.h
|
||||
generic-y += cputime.h
|
||||
|
@ -6,6 +6,7 @@ generic-y += device.h
|
|||
generic-y += emergency-restart.h
|
||||
generic-y += errno.h
|
||||
generic-y += exec.h
|
||||
generic-y += hash.h
|
||||
generic-y += hw_irq.h
|
||||
generic-y += ioctl.h
|
||||
generic-y += ipcbuf.h
|
||||
|
@ -18,6 +19,7 @@ generic-y += local.h
|
|||
generic-y += mman.h
|
||||
generic-y += mutex.h
|
||||
generic-y += percpu.h
|
||||
generic-y += preempt.h
|
||||
generic-y += resource.h
|
||||
generic-y += scatterlist.h
|
||||
generic-y += sections.h
|
||||
|
@ -31,5 +33,3 @@ generic-y += trace_clock.h
|
|||
generic-y += types.h
|
||||
generic-y += word-at-a-time.h
|
||||
generic-y += xor.h
|
||||
generic-y += preempt.h
|
||||
generic-y += hash.h
|
||||
|
|
|
@ -1,8 +0,0 @@
|
|||
#ifndef _M68K_BARRIER_H
|
||||
#define _M68K_BARRIER_H
|
||||
|
||||
#define nop() do { asm volatile ("nop"); barrier(); } while (0)
|
||||
|
||||
#include <asm-generic/barrier.h>
|
||||
|
||||
#endif /* _M68K_BARRIER_H */
|
|
@ -4,7 +4,7 @@
|
|||
#include <uapi/asm/unistd.h>
|
||||
|
||||
|
||||
#define NR_syscalls 349
|
||||
#define NR_syscalls 351
|
||||
|
||||
#define __ARCH_WANT_OLD_READDIR
|
||||
#define __ARCH_WANT_OLD_STAT
|
||||
|
|
|
@ -354,5 +354,7 @@
|
|||
#define __NR_process_vm_writev 346
|
||||
#define __NR_kcmp 347
|
||||
#define __NR_finit_module 348
|
||||
#define __NR_sched_setattr 349
|
||||
#define __NR_sched_getattr 350
|
||||
|
||||
#endif /* _UAPI_ASM_M68K_UNISTD_H_ */
|
||||
|
|
|
@ -369,4 +369,6 @@ ENTRY(sys_call_table)
|
|||
.long sys_process_vm_writev
|
||||
.long sys_kcmp
|
||||
.long sys_finit_module
|
||||
.long sys_sched_setattr
|
||||
.long sys_sched_getattr /* 350 */
|
||||
|
||||
|
|
|
@ -200,10 +200,11 @@ static inline void __user *arch_compat_alloc_user_space(long len)
|
|||
|
||||
/*
|
||||
* We can't access below the stack pointer in the 32bit ABI and
|
||||
* can access 288 bytes in the 64bit ABI
|
||||
* can access 288 bytes in the 64bit big-endian ABI,
|
||||
* or 512 bytes with the new ELFv2 little-endian ABI.
|
||||
*/
|
||||
if (!is_32bit_task())
|
||||
usp -= 288;
|
||||
usp -= USER_REDZONE_SIZE;
|
||||
|
||||
return (void __user *) (usp - len);
|
||||
}
|
||||
|
|
|
@ -816,8 +816,8 @@ int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe,
|
|||
int64_t opal_pci_poll(uint64_t phb_id);
|
||||
int64_t opal_return_cpu(void);
|
||||
|
||||
int64_t opal_xscom_read(uint32_t gcid, uint32_t pcb_addr, __be64 *val);
|
||||
int64_t opal_xscom_write(uint32_t gcid, uint32_t pcb_addr, uint64_t val);
|
||||
int64_t opal_xscom_read(uint32_t gcid, uint64_t pcb_addr, __be64 *val);
|
||||
int64_t opal_xscom_write(uint32_t gcid, uint64_t pcb_addr, uint64_t val);
|
||||
|
||||
int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
|
||||
uint32_t addr, uint32_t data, uint32_t sz);
|
||||
|
|
|
@ -28,11 +28,23 @@
|
|||
|
||||
#ifdef __powerpc64__
|
||||
|
||||
/*
|
||||
* Size of redzone that userspace is allowed to use below the stack
|
||||
* pointer. This is 288 in the 64-bit big-endian ELF ABI, and 512 in
|
||||
* the new ELFv2 little-endian ABI, so we allow the larger amount.
|
||||
*
|
||||
* For kernel code we allow a 288-byte redzone, in order to conserve
|
||||
* kernel stack space; gcc currently only uses 288 bytes, and will
|
||||
* hopefully allow explicit control of the redzone size in future.
|
||||
*/
|
||||
#define USER_REDZONE_SIZE 512
|
||||
#define KERNEL_REDZONE_SIZE 288
|
||||
|
||||
#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
|
||||
#define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */
|
||||
#define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265)
|
||||
#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \
|
||||
STACK_FRAME_OVERHEAD + 288)
|
||||
STACK_FRAME_OVERHEAD + KERNEL_REDZONE_SIZE)
|
||||
#define STACK_FRAME_MARKER 12
|
||||
|
||||
/* Size of dummy stack frame allocated when calling signal handler. */
|
||||
|
@ -41,6 +53,8 @@
|
|||
|
||||
#else /* __powerpc64__ */
|
||||
|
||||
#define USER_REDZONE_SIZE 0
|
||||
#define KERNEL_REDZONE_SIZE 0
|
||||
#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
|
||||
#define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */
|
||||
#define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
|
||||
|
|
|
@ -98,17 +98,19 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
|
|||
size_t csize, unsigned long offset, int userbuf)
|
||||
{
|
||||
void *vaddr;
|
||||
phys_addr_t paddr;
|
||||
|
||||
if (!csize)
|
||||
return 0;
|
||||
|
||||
csize = min_t(size_t, csize, PAGE_SIZE);
|
||||
paddr = pfn << PAGE_SHIFT;
|
||||
|
||||
if ((min_low_pfn < pfn) && (pfn < max_pfn)) {
|
||||
vaddr = __va(pfn << PAGE_SHIFT);
|
||||
if (memblock_is_region_memory(paddr, csize)) {
|
||||
vaddr = __va(paddr);
|
||||
csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
|
||||
} else {
|
||||
vaddr = __ioremap(pfn << PAGE_SHIFT, PAGE_SIZE, 0);
|
||||
vaddr = __ioremap(paddr, PAGE_SIZE, 0);
|
||||
csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
|
||||
iounmap(vaddr);
|
||||
}
|
||||
|
|
|
@ -74,6 +74,7 @@ ftrace_modify_code(unsigned long ip, unsigned int old, unsigned int new)
|
|||
*/
|
||||
static int test_24bit_addr(unsigned long ip, unsigned long addr)
|
||||
{
|
||||
addr = ppc_function_entry((void *)addr);
|
||||
|
||||
/* use the create_branch to verify that this offset can be branched */
|
||||
return create_branch((unsigned int *)ip, addr, 0);
|
||||
|
|
|
@ -1048,6 +1048,15 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
|
|||
flush_altivec_to_thread(src);
|
||||
flush_vsx_to_thread(src);
|
||||
flush_spe_to_thread(src);
|
||||
/*
|
||||
* Flush TM state out so we can copy it. __switch_to_tm() does this
|
||||
* flush but it removes the checkpointed state from the current CPU and
|
||||
* transitions the CPU out of TM mode. Hence we need to call
|
||||
* tm_recheckpoint_new_task() (on the same task) to restore the
|
||||
* checkpointed state back and the TM mode.
|
||||
*/
|
||||
__switch_to_tm(src);
|
||||
tm_recheckpoint_new_task(src);
|
||||
|
||||
*dst = *src;
|
||||
|
||||
|
|
|
@ -81,6 +81,7 @@ _GLOBAL(relocate)
|
|||
|
||||
6: blr
|
||||
|
||||
.balign 8
|
||||
p_dyn: .llong __dynamic_start - 0b
|
||||
p_rela: .llong __rela_dyn_start - 0b
|
||||
p_st: .llong _stext - 0b
|
||||
|
|
|
@ -65,8 +65,8 @@ struct rt_sigframe {
|
|||
struct siginfo __user *pinfo;
|
||||
void __user *puc;
|
||||
struct siginfo info;
|
||||
/* 64 bit ABI allows for 288 bytes below sp before decrementing it. */
|
||||
char abigap[288];
|
||||
/* New 64 bit little-endian ABI allows redzone of 512 bytes below sp */
|
||||
char abigap[USER_REDZONE_SIZE];
|
||||
} __attribute__ ((aligned (16)));
|
||||
|
||||
static const char fmt32[] = KERN_INFO \
|
||||
|
|
|
@ -123,7 +123,8 @@ static int __init cbe_ptcal_enable_on_node(int nid, int order)
|
|||
|
||||
area->nid = nid;
|
||||
area->order = order;
|
||||
area->pages = alloc_pages_exact_node(area->nid, GFP_KERNEL|GFP_THISNODE,
|
||||
area->pages = alloc_pages_exact_node(area->nid,
|
||||
GFP_KERNEL|__GFP_THISNODE,
|
||||
area->order);
|
||||
|
||||
if (!area->pages) {
|
||||
|
|
|
@ -114,6 +114,7 @@ DEFINE_SIMPLE_ATTRIBUTE(ioda_eeh_inbB_dbgfs_ops, ioda_eeh_inbB_dbgfs_get,
|
|||
ioda_eeh_inbB_dbgfs_set, "0x%llx\n");
|
||||
#endif /* CONFIG_DEBUG_FS */
|
||||
|
||||
|
||||
/**
|
||||
* ioda_eeh_post_init - Chip dependent post initialization
|
||||
* @hose: PCI controller
|
||||
|
@ -221,6 +222,22 @@ static int ioda_eeh_set_option(struct eeh_pe *pe, int option)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static void ioda_eeh_phb_diag(struct pci_controller *hose)
|
||||
{
|
||||
struct pnv_phb *phb = hose->private_data;
|
||||
long rc;
|
||||
|
||||
rc = opal_pci_get_phb_diag_data2(phb->opal_id, phb->diag.blob,
|
||||
PNV_PCI_DIAG_BUF_SIZE);
|
||||
if (rc != OPAL_SUCCESS) {
|
||||
pr_warning("%s: Failed to get diag-data for PHB#%x (%ld)\n",
|
||||
__func__, hose->global_number, rc);
|
||||
return;
|
||||
}
|
||||
|
||||
pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
|
||||
}
|
||||
|
||||
/**
|
||||
* ioda_eeh_get_state - Retrieve the state of PE
|
||||
* @pe: EEH PE
|
||||
|
@ -272,6 +289,9 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
|
|||
result |= EEH_STATE_DMA_ACTIVE;
|
||||
result |= EEH_STATE_MMIO_ENABLED;
|
||||
result |= EEH_STATE_DMA_ENABLED;
|
||||
} else if (!(pe->state & EEH_PE_ISOLATED)) {
|
||||
eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
|
||||
ioda_eeh_phb_diag(hose);
|
||||
}
|
||||
|
||||
return result;
|
||||
|
@ -315,6 +335,15 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
|
|||
__func__, fstate, hose->global_number, pe_no);
|
||||
}
|
||||
|
||||
/* Dump PHB diag-data for frozen PE */
|
||||
if (result != EEH_STATE_NOT_SUPPORT &&
|
||||
(result & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) !=
|
||||
(EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE) &&
|
||||
!(pe->state & EEH_PE_ISOLATED)) {
|
||||
eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
|
||||
ioda_eeh_phb_diag(hose);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
|
@ -529,42 +558,6 @@ static int ioda_eeh_reset(struct eeh_pe *pe, int option)
|
|||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* ioda_eeh_get_log - Retrieve error log
|
||||
* @pe: EEH PE
|
||||
* @severity: Severity level of the log
|
||||
* @drv_log: buffer to store the log
|
||||
* @len: space of the log buffer
|
||||
*
|
||||
* The function is used to retrieve error log from P7IOC.
|
||||
*/
|
||||
static int ioda_eeh_get_log(struct eeh_pe *pe, int severity,
|
||||
char *drv_log, unsigned long len)
|
||||
{
|
||||
s64 ret;
|
||||
unsigned long flags;
|
||||
struct pci_controller *hose = pe->phb;
|
||||
struct pnv_phb *phb = hose->private_data;
|
||||
|
||||
spin_lock_irqsave(&phb->lock, flags);
|
||||
|
||||
ret = opal_pci_get_phb_diag_data2(phb->opal_id,
|
||||
phb->diag.blob, PNV_PCI_DIAG_BUF_SIZE);
|
||||
if (ret) {
|
||||
spin_unlock_irqrestore(&phb->lock, flags);
|
||||
pr_warning("%s: Can't get log for PHB#%x-PE#%x (%lld)\n",
|
||||
__func__, hose->global_number, pe->addr, ret);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
/* The PHB diag-data is always indicative */
|
||||
pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
|
||||
|
||||
spin_unlock_irqrestore(&phb->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* ioda_eeh_configure_bridge - Configure the PCI bridges for the indicated PE
|
||||
* @pe: EEH PE
|
||||
|
@ -646,22 +639,6 @@ static void ioda_eeh_hub_diag(struct pci_controller *hose)
|
|||
}
|
||||
}
|
||||
|
||||
static void ioda_eeh_phb_diag(struct pci_controller *hose)
|
||||
{
|
||||
struct pnv_phb *phb = hose->private_data;
|
||||
long rc;
|
||||
|
||||
rc = opal_pci_get_phb_diag_data2(phb->opal_id, phb->diag.blob,
|
||||
PNV_PCI_DIAG_BUF_SIZE);
|
||||
if (rc != OPAL_SUCCESS) {
|
||||
pr_warning("%s: Failed to get diag-data for PHB#%x (%ld)\n",
|
||||
__func__, hose->global_number, rc);
|
||||
return;
|
||||
}
|
||||
|
||||
pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
|
||||
}
|
||||
|
||||
static int ioda_eeh_get_phb_pe(struct pci_controller *hose,
|
||||
struct eeh_pe **pe)
|
||||
{
|
||||
|
@ -834,6 +811,20 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
|
|||
__func__, err_type);
|
||||
}
|
||||
|
||||
/*
|
||||
* EEH core will try recover from fenced PHB or
|
||||
* frozen PE. In the time for frozen PE, EEH core
|
||||
* enable IO path for that before collecting logs,
|
||||
* but it ruins the site. So we have to dump the
|
||||
* log in advance here.
|
||||
*/
|
||||
if ((ret == EEH_NEXT_ERR_FROZEN_PE ||
|
||||
ret == EEH_NEXT_ERR_FENCED_PHB) &&
|
||||
!((*pe)->state & EEH_PE_ISOLATED)) {
|
||||
eeh_pe_state_mark(*pe, EEH_PE_ISOLATED);
|
||||
ioda_eeh_phb_diag(hose);
|
||||
}
|
||||
|
||||
/*
|
||||
* If we have no errors on the specific PHB or only
|
||||
* informative error there, we continue poking it.
|
||||
|
@ -852,7 +843,6 @@ struct pnv_eeh_ops ioda_eeh_ops = {
|
|||
.set_option = ioda_eeh_set_option,
|
||||
.get_state = ioda_eeh_get_state,
|
||||
.reset = ioda_eeh_reset,
|
||||
.get_log = ioda_eeh_get_log,
|
||||
.configure_bridge = ioda_eeh_configure_bridge,
|
||||
.next_error = ioda_eeh_next_error
|
||||
};
|
||||
|
|
|
@ -71,11 +71,11 @@ static int opal_xscom_err_xlate(int64_t rc)
|
|||
}
|
||||
}
|
||||
|
||||
static u64 opal_scom_unmangle(u64 reg)
|
||||
static u64 opal_scom_unmangle(u64 addr)
|
||||
{
|
||||
/*
|
||||
* XSCOM indirect addresses have the top bit set. Additionally
|
||||
* the reset of the top 3 nibbles is always 0.
|
||||
* the rest of the top 3 nibbles is always 0.
|
||||
*
|
||||
* Because the debugfs interface uses signed offsets and shifts
|
||||
* the address left by 3, we basically cannot use the top 4 bits
|
||||
|
@ -86,10 +86,13 @@ static u64 opal_scom_unmangle(u64 reg)
|
|||
* conversion here. To leave room for further xscom address
|
||||
* expansion, we only clear out the top byte
|
||||
*
|
||||
* For in-kernel use, we also support the real indirect bit, so
|
||||
* we test for any of the top 5 bits
|
||||
*
|
||||
*/
|
||||
if (reg & (1ull << 59))
|
||||
reg = (reg & ~(0xffull << 56)) | (1ull << 63);
|
||||
return reg;
|
||||
if (addr & (0x1full << 59))
|
||||
addr = (addr & ~(0xffull << 56)) | (1ull << 63);
|
||||
return addr;
|
||||
}
|
||||
|
||||
static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
|
||||
|
@ -98,8 +101,8 @@ static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
|
|||
int64_t rc;
|
||||
__be64 v;
|
||||
|
||||
reg = opal_scom_unmangle(reg);
|
||||
rc = opal_xscom_read(m->chip, m->addr + reg, (__be64 *)__pa(&v));
|
||||
reg = opal_scom_unmangle(m->addr + reg);
|
||||
rc = opal_xscom_read(m->chip, reg, (__be64 *)__pa(&v));
|
||||
*value = be64_to_cpu(v);
|
||||
return opal_xscom_err_xlate(rc);
|
||||
}
|
||||
|
@ -109,8 +112,8 @@ static int opal_scom_write(scom_map_t map, u64 reg, u64 value)
|
|||
struct opal_scom_map *m = map;
|
||||
int64_t rc;
|
||||
|
||||
reg = opal_scom_unmangle(reg);
|
||||
rc = opal_xscom_write(m->chip, m->addr + reg, value);
|
||||
reg = opal_scom_unmangle(m->addr + reg);
|
||||
rc = opal_xscom_write(m->chip, reg, value);
|
||||
return opal_xscom_err_xlate(rc);
|
||||
}
|
||||
|
||||
|
|
|
@ -134,57 +134,72 @@ static void pnv_pci_dump_p7ioc_diag_data(struct pci_controller *hose,
|
|||
pr_info("P7IOC PHB#%d Diag-data (Version: %d)\n\n",
|
||||
hose->global_number, common->version);
|
||||
|
||||
pr_info(" brdgCtl: %08x\n", data->brdgCtl);
|
||||
|
||||
pr_info(" portStatusReg: %08x\n", data->portStatusReg);
|
||||
pr_info(" rootCmplxStatus: %08x\n", data->rootCmplxStatus);
|
||||
pr_info(" busAgentStatus: %08x\n", data->busAgentStatus);
|
||||
|
||||
pr_info(" deviceStatus: %08x\n", data->deviceStatus);
|
||||
pr_info(" slotStatus: %08x\n", data->slotStatus);
|
||||
pr_info(" linkStatus: %08x\n", data->linkStatus);
|
||||
pr_info(" devCmdStatus: %08x\n", data->devCmdStatus);
|
||||
pr_info(" devSecStatus: %08x\n", data->devSecStatus);
|
||||
|
||||
pr_info(" rootErrorStatus: %08x\n", data->rootErrorStatus);
|
||||
pr_info(" uncorrErrorStatus: %08x\n", data->uncorrErrorStatus);
|
||||
pr_info(" corrErrorStatus: %08x\n", data->corrErrorStatus);
|
||||
pr_info(" tlpHdr1: %08x\n", data->tlpHdr1);
|
||||
pr_info(" tlpHdr2: %08x\n", data->tlpHdr2);
|
||||
pr_info(" tlpHdr3: %08x\n", data->tlpHdr3);
|
||||
pr_info(" tlpHdr4: %08x\n", data->tlpHdr4);
|
||||
pr_info(" sourceId: %08x\n", data->sourceId);
|
||||
pr_info(" errorClass: %016llx\n", data->errorClass);
|
||||
pr_info(" correlator: %016llx\n", data->correlator);
|
||||
pr_info(" p7iocPlssr: %016llx\n", data->p7iocPlssr);
|
||||
pr_info(" p7iocCsr: %016llx\n", data->p7iocCsr);
|
||||
pr_info(" lemFir: %016llx\n", data->lemFir);
|
||||
pr_info(" lemErrorMask: %016llx\n", data->lemErrorMask);
|
||||
pr_info(" lemWOF: %016llx\n", data->lemWOF);
|
||||
pr_info(" phbErrorStatus: %016llx\n", data->phbErrorStatus);
|
||||
pr_info(" phbFirstErrorStatus: %016llx\n", data->phbFirstErrorStatus);
|
||||
pr_info(" phbErrorLog0: %016llx\n", data->phbErrorLog0);
|
||||
pr_info(" phbErrorLog1: %016llx\n", data->phbErrorLog1);
|
||||
pr_info(" mmioErrorStatus: %016llx\n", data->mmioErrorStatus);
|
||||
pr_info(" mmioFirstErrorStatus: %016llx\n", data->mmioFirstErrorStatus);
|
||||
pr_info(" mmioErrorLog0: %016llx\n", data->mmioErrorLog0);
|
||||
pr_info(" mmioErrorLog1: %016llx\n", data->mmioErrorLog1);
|
||||
pr_info(" dma0ErrorStatus: %016llx\n", data->dma0ErrorStatus);
|
||||
pr_info(" dma0FirstErrorStatus: %016llx\n", data->dma0FirstErrorStatus);
|
||||
pr_info(" dma0ErrorLog0: %016llx\n", data->dma0ErrorLog0);
|
||||
pr_info(" dma0ErrorLog1: %016llx\n", data->dma0ErrorLog1);
|
||||
pr_info(" dma1ErrorStatus: %016llx\n", data->dma1ErrorStatus);
|
||||
pr_info(" dma1FirstErrorStatus: %016llx\n", data->dma1FirstErrorStatus);
|
||||
pr_info(" dma1ErrorLog0: %016llx\n", data->dma1ErrorLog0);
|
||||
pr_info(" dma1ErrorLog1: %016llx\n", data->dma1ErrorLog1);
|
||||
if (data->brdgCtl)
|
||||
pr_info(" brdgCtl: %08x\n",
|
||||
data->brdgCtl);
|
||||
if (data->portStatusReg || data->rootCmplxStatus ||
|
||||
data->busAgentStatus)
|
||||
pr_info(" UtlSts: %08x %08x %08x\n",
|
||||
data->portStatusReg, data->rootCmplxStatus,
|
||||
data->busAgentStatus);
|
||||
if (data->deviceStatus || data->slotStatus ||
|
||||
data->linkStatus || data->devCmdStatus ||
|
||||
data->devSecStatus)
|
||||
pr_info(" RootSts: %08x %08x %08x %08x %08x\n",
|
||||
data->deviceStatus, data->slotStatus,
|
||||
data->linkStatus, data->devCmdStatus,
|
||||
data->devSecStatus);
|
||||
if (data->rootErrorStatus || data->uncorrErrorStatus ||
|
||||
data->corrErrorStatus)
|
||||
pr_info(" RootErrSts: %08x %08x %08x\n",
|
||||
data->rootErrorStatus, data->uncorrErrorStatus,
|
||||
data->corrErrorStatus);
|
||||
if (data->tlpHdr1 || data->tlpHdr2 ||
|
||||
data->tlpHdr3 || data->tlpHdr4)
|
||||
pr_info(" RootErrLog: %08x %08x %08x %08x\n",
|
||||
data->tlpHdr1, data->tlpHdr2,
|
||||
data->tlpHdr3, data->tlpHdr4);
|
||||
if (data->sourceId || data->errorClass ||
|
||||
data->correlator)
|
||||
pr_info(" RootErrLog1: %08x %016llx %016llx\n",
|
||||
data->sourceId, data->errorClass,
|
||||
data->correlator);
|
||||
if (data->p7iocPlssr || data->p7iocCsr)
|
||||
pr_info(" PhbSts: %016llx %016llx\n",
|
||||
data->p7iocPlssr, data->p7iocCsr);
|
||||
if (data->lemFir || data->lemErrorMask ||
|
||||
data->lemWOF)
|
||||
pr_info(" Lem: %016llx %016llx %016llx\n",
|
||||
data->lemFir, data->lemErrorMask,
|
||||
data->lemWOF);
|
||||
if (data->phbErrorStatus || data->phbFirstErrorStatus ||
|
||||
data->phbErrorLog0 || data->phbErrorLog1)
|
||||
pr_info(" PhbErr: %016llx %016llx %016llx %016llx\n",
|
||||
data->phbErrorStatus, data->phbFirstErrorStatus,
|
||||
data->phbErrorLog0, data->phbErrorLog1);
|
||||
if (data->mmioErrorStatus || data->mmioFirstErrorStatus ||
|
||||
data->mmioErrorLog0 || data->mmioErrorLog1)
|
||||
pr_info(" OutErr: %016llx %016llx %016llx %016llx\n",
|
||||
data->mmioErrorStatus, data->mmioFirstErrorStatus,
|
||||
data->mmioErrorLog0, data->mmioErrorLog1);
|
||||
if (data->dma0ErrorStatus || data->dma0FirstErrorStatus ||
|
||||
data->dma0ErrorLog0 || data->dma0ErrorLog1)
|
||||
pr_info(" InAErr: %016llx %016llx %016llx %016llx\n",
|
||||
data->dma0ErrorStatus, data->dma0FirstErrorStatus,
|
||||
data->dma0ErrorLog0, data->dma0ErrorLog1);
|
||||
if (data->dma1ErrorStatus || data->dma1FirstErrorStatus ||
|
||||
data->dma1ErrorLog0 || data->dma1ErrorLog1)
|
||||
pr_info(" InBErr: %016llx %016llx %016llx %016llx\n",
|
||||
data->dma1ErrorStatus, data->dma1FirstErrorStatus,
|
||||
data->dma1ErrorLog0, data->dma1ErrorLog1);
|
||||
|
||||
for (i = 0; i < OPAL_P7IOC_NUM_PEST_REGS; i++) {
|
||||
if ((data->pestA[i] >> 63) == 0 &&
|
||||
(data->pestB[i] >> 63) == 0)
|
||||
continue;
|
||||
|
||||
pr_info(" PE[%3d] PESTA: %016llx\n", i, data->pestA[i]);
|
||||
pr_info(" PESTB: %016llx\n", data->pestB[i]);
|
||||
pr_info(" PE[%3d] A/B: %016llx %016llx\n",
|
||||
i, data->pestA[i], data->pestB[i]);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -197,62 +212,77 @@ static void pnv_pci_dump_phb3_diag_data(struct pci_controller *hose,
|
|||
data = (struct OpalIoPhb3ErrorData*)common;
|
||||
pr_info("PHB3 PHB#%d Diag-data (Version: %d)\n\n",
|
||||
hose->global_number, common->version);
|
||||
|
||||
pr_info(" brdgCtl: %08x\n", data->brdgCtl);
|
||||
|
||||
pr_info(" portStatusReg: %08x\n", data->portStatusReg);
|
||||
pr_info(" rootCmplxStatus: %08x\n", data->rootCmplxStatus);
|
||||
pr_info(" busAgentStatus: %08x\n", data->busAgentStatus);
|
||||
|
||||
pr_info(" deviceStatus: %08x\n", data->deviceStatus);
|
||||
pr_info(" slotStatus: %08x\n", data->slotStatus);
|
||||
pr_info(" linkStatus: %08x\n", data->linkStatus);
|
||||
pr_info(" devCmdStatus: %08x\n", data->devCmdStatus);
|
||||
pr_info(" devSecStatus: %08x\n", data->devSecStatus);
|
||||
|
||||
pr_info(" rootErrorStatus: %08x\n", data->rootErrorStatus);
|
||||
pr_info(" uncorrErrorStatus: %08x\n", data->uncorrErrorStatus);
|
||||
pr_info(" corrErrorStatus: %08x\n", data->corrErrorStatus);
|
||||
pr_info(" tlpHdr1: %08x\n", data->tlpHdr1);
|
||||
pr_info(" tlpHdr2: %08x\n", data->tlpHdr2);
|
||||
pr_info(" tlpHdr3: %08x\n", data->tlpHdr3);
|
||||
pr_info(" tlpHdr4: %08x\n", data->tlpHdr4);
|
||||
pr_info(" sourceId: %08x\n", data->sourceId);
|
||||
pr_info(" errorClass: %016llx\n", data->errorClass);
|
||||
pr_info(" correlator: %016llx\n", data->correlator);
|
||||
|
||||
pr_info(" nFir: %016llx\n", data->nFir);
|
||||
pr_info(" nFirMask: %016llx\n", data->nFirMask);
|
||||
pr_info(" nFirWOF: %016llx\n", data->nFirWOF);
|
||||
pr_info(" PhbPlssr: %016llx\n", data->phbPlssr);
|
||||
pr_info(" PhbCsr: %016llx\n", data->phbCsr);
|
||||
pr_info(" lemFir: %016llx\n", data->lemFir);
|
||||
pr_info(" lemErrorMask: %016llx\n", data->lemErrorMask);
|
||||
pr_info(" lemWOF: %016llx\n", data->lemWOF);
|
||||
pr_info(" phbErrorStatus: %016llx\n", data->phbErrorStatus);
|
||||
pr_info(" phbFirstErrorStatus: %016llx\n", data->phbFirstErrorStatus);
|
||||
pr_info(" phbErrorLog0: %016llx\n", data->phbErrorLog0);
|
||||
pr_info(" phbErrorLog1: %016llx\n", data->phbErrorLog1);
|
||||
pr_info(" mmioErrorStatus: %016llx\n", data->mmioErrorStatus);
|
||||
pr_info(" mmioFirstErrorStatus: %016llx\n", data->mmioFirstErrorStatus);
|
||||
pr_info(" mmioErrorLog0: %016llx\n", data->mmioErrorLog0);
|
||||
pr_info(" mmioErrorLog1: %016llx\n", data->mmioErrorLog1);
|
||||
pr_info(" dma0ErrorStatus: %016llx\n", data->dma0ErrorStatus);
|
||||
pr_info(" dma0FirstErrorStatus: %016llx\n", data->dma0FirstErrorStatus);
|
||||
pr_info(" dma0ErrorLog0: %016llx\n", data->dma0ErrorLog0);
|
||||
pr_info(" dma0ErrorLog1: %016llx\n", data->dma0ErrorLog1);
|
||||
pr_info(" dma1ErrorStatus: %016llx\n", data->dma1ErrorStatus);
|
||||
pr_info(" dma1FirstErrorStatus: %016llx\n", data->dma1FirstErrorStatus);
|
||||
pr_info(" dma1ErrorLog0: %016llx\n", data->dma1ErrorLog0);
|
||||
pr_info(" dma1ErrorLog1: %016llx\n", data->dma1ErrorLog1);
|
||||
if (data->brdgCtl)
|
||||
pr_info(" brdgCtl: %08x\n",
|
||||
data->brdgCtl);
|
||||
if (data->portStatusReg || data->rootCmplxStatus ||
|
||||
data->busAgentStatus)
|
||||
pr_info(" UtlSts: %08x %08x %08x\n",
|
||||
data->portStatusReg, data->rootCmplxStatus,
|
||||
data->busAgentStatus);
|
||||
if (data->deviceStatus || data->slotStatus ||
|
||||
data->linkStatus || data->devCmdStatus ||
|
||||
data->devSecStatus)
|
||||
pr_info(" RootSts: %08x %08x %08x %08x %08x\n",
|
||||
data->deviceStatus, data->slotStatus,
|
||||
data->linkStatus, data->devCmdStatus,
|
||||
data->devSecStatus);
|
||||
if (data->rootErrorStatus || data->uncorrErrorStatus ||
|
||||
data->corrErrorStatus)
|
||||
pr_info(" RootErrSts: %08x %08x %08x\n",
|
||||
data->rootErrorStatus, data->uncorrErrorStatus,
|
||||
data->corrErrorStatus);
|
||||
if (data->tlpHdr1 || data->tlpHdr2 ||
|
||||
data->tlpHdr3 || data->tlpHdr4)
|
||||
pr_info(" RootErrLog: %08x %08x %08x %08x\n",
|
||||
data->tlpHdr1, data->tlpHdr2,
|
||||
data->tlpHdr3, data->tlpHdr4);
|
||||
if (data->sourceId || data->errorClass ||
|
||||
data->correlator)
|
||||
pr_info(" RootErrLog1: %08x %016llx %016llx\n",
|
||||
data->sourceId, data->errorClass,
|
||||
data->correlator);
|
||||
if (data->nFir || data->nFirMask ||
|
||||
data->nFirWOF)
|
||||
pr_info(" nFir: %016llx %016llx %016llx\n",
|
||||
data->nFir, data->nFirMask,
|
||||
data->nFirWOF);
|
||||
if (data->phbPlssr || data->phbCsr)
|
||||
pr_info(" PhbSts: %016llx %016llx\n",
|
||||
data->phbPlssr, data->phbCsr);
|
||||
if (data->lemFir || data->lemErrorMask ||
|
||||
data->lemWOF)
|
||||
pr_info(" Lem: %016llx %016llx %016llx\n",
|
||||
data->lemFir, data->lemErrorMask,
|
||||
data->lemWOF);
|
||||
if (data->phbErrorStatus || data->phbFirstErrorStatus ||
|
||||
data->phbErrorLog0 || data->phbErrorLog1)
|
||||
pr_info(" PhbErr: %016llx %016llx %016llx %016llx\n",
|
||||
data->phbErrorStatus, data->phbFirstErrorStatus,
|
||||
data->phbErrorLog0, data->phbErrorLog1);
|
||||
if (data->mmioErrorStatus || data->mmioFirstErrorStatus ||
|
||||
data->mmioErrorLog0 || data->mmioErrorLog1)
|
||||
pr_info(" OutErr: %016llx %016llx %016llx %016llx\n",
|
||||
data->mmioErrorStatus, data->mmioFirstErrorStatus,
|
||||
data->mmioErrorLog0, data->mmioErrorLog1);
|
||||
if (data->dma0ErrorStatus || data->dma0FirstErrorStatus ||
|
||||
data->dma0ErrorLog0 || data->dma0ErrorLog1)
|
||||
pr_info(" InAErr: %016llx %016llx %016llx %016llx\n",
|
||||
data->dma0ErrorStatus, data->dma0FirstErrorStatus,
|
||||
data->dma0ErrorLog0, data->dma0ErrorLog1);
|
||||
if (data->dma1ErrorStatus || data->dma1FirstErrorStatus ||
|
||||
data->dma1ErrorLog0 || data->dma1ErrorLog1)
|
||||
pr_info(" InBErr: %016llx %016llx %016llx %016llx\n",
|
||||
data->dma1ErrorStatus, data->dma1FirstErrorStatus,
|
||||
data->dma1ErrorLog0, data->dma1ErrorLog1);
|
||||
|
||||
for (i = 0; i < OPAL_PHB3_NUM_PEST_REGS; i++) {
|
||||
if ((data->pestA[i] >> 63) == 0 &&
|
||||
(data->pestB[i] >> 63) == 0)
|
||||
continue;
|
||||
|
||||
pr_info(" PE[%3d] PESTA: %016llx\n", i, data->pestA[i]);
|
||||
pr_info(" PESTB: %016llx\n", data->pestB[i]);
|
||||
pr_info(" PE[%3d] A/B: %016llx %016llx\n",
|
||||
i, data->pestA[i], data->pestB[i]);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -35,12 +35,7 @@
|
|||
#include "offline_states.h"
|
||||
|
||||
/* This version can't take the spinlock, because it never returns */
|
||||
static struct rtas_args rtas_stop_self_args = {
|
||||
.token = RTAS_UNKNOWN_SERVICE,
|
||||
.nargs = 0,
|
||||
.nret = 1,
|
||||
.rets = &rtas_stop_self_args.args[0],
|
||||
};
|
||||
static int rtas_stop_self_token = RTAS_UNKNOWN_SERVICE;
|
||||
|
||||
static DEFINE_PER_CPU(enum cpu_state_vals, preferred_offline_state) =
|
||||
CPU_STATE_OFFLINE;
|
||||
|
@ -93,15 +88,20 @@ void set_default_offline_state(int cpu)
|
|||
|
||||
static void rtas_stop_self(void)
|
||||
{
|
||||
struct rtas_args *args = &rtas_stop_self_args;
|
||||
struct rtas_args args = {
|
||||
.token = cpu_to_be32(rtas_stop_self_token),
|
||||
.nargs = 0,
|
||||
.nret = 1,
|
||||
.rets = &args.args[0],
|
||||
};
|
||||
|
||||
local_irq_disable();
|
||||
|
||||
BUG_ON(args->token == RTAS_UNKNOWN_SERVICE);
|
||||
BUG_ON(rtas_stop_self_token == RTAS_UNKNOWN_SERVICE);
|
||||
|
||||
printk("cpu %u (hwid %u) Ready to die...\n",
|
||||
smp_processor_id(), hard_smp_processor_id());
|
||||
enter_rtas(__pa(args));
|
||||
enter_rtas(__pa(&args));
|
||||
|
||||
panic("Alas, I survived.\n");
|
||||
}
|
||||
|
@ -392,10 +392,10 @@ static int __init pseries_cpu_hotplug_init(void)
|
|||
}
|
||||
}
|
||||
|
||||
rtas_stop_self_args.token = rtas_token("stop-self");
|
||||
rtas_stop_self_token = rtas_token("stop-self");
|
||||
qcss_tok = rtas_token("query-cpu-stopped-state");
|
||||
|
||||
if (rtas_stop_self_args.token == RTAS_UNKNOWN_SERVICE ||
|
||||
if (rtas_stop_self_token == RTAS_UNKNOWN_SERVICE ||
|
||||
qcss_tok == RTAS_UNKNOWN_SERVICE) {
|
||||
printk(KERN_INFO "CPU Hotplug not supported by firmware "
|
||||
"- disabling.\n");
|
||||
|
|
|
@ -1421,5 +1421,5 @@ ENTRY(sys_sched_setattr_wrapper)
|
|||
ENTRY(sys_sched_getattr_wrapper)
|
||||
lgfr %r2,%r2 # pid_t
|
||||
llgtr %r3,%r3 # const char __user *
|
||||
llgfr %r3,%r3 # unsigned int
|
||||
llgfr %r4,%r4 # unsigned int
|
||||
jg sys_sched_getattr
|
||||
|
|
|
@ -206,11 +206,13 @@ static void dma_cleanup_tables(struct zpci_dev *zdev)
|
|||
zdev->dma_table = NULL;
|
||||
}
|
||||
|
||||
static unsigned long __dma_alloc_iommu(struct zpci_dev *zdev, unsigned long start,
|
||||
int size)
|
||||
static unsigned long __dma_alloc_iommu(struct zpci_dev *zdev,
|
||||
unsigned long start, int size)
|
||||
{
|
||||
unsigned long boundary_size = 0x1000000;
|
||||
unsigned long boundary_size;
|
||||
|
||||
boundary_size = ALIGN(dma_get_seg_boundary(&zdev->pdev->dev) + 1,
|
||||
PAGE_SIZE) >> PAGE_SHIFT;
|
||||
return iommu_area_alloc(zdev->iommu_bitmap, zdev->iommu_pages,
|
||||
start, size, 0, boundary_size, 0);
|
||||
}
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
#define SH_CACHE_ASSOC 8
|
||||
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7619)
|
||||
#define CCR 0xffffffec
|
||||
#define SH_CCR 0xffffffec
|
||||
|
||||
#define CCR_CACHE_CE 0x01 /* Cache enable */
|
||||
#define CCR_CACHE_WT 0x02 /* CCR[bit1=1,bit2=1] */
|
||||
|
|
|
@ -17,8 +17,8 @@
|
|||
#define SH_CACHE_COMBINED 4
|
||||
#define SH_CACHE_ASSOC 8
|
||||
|
||||
#define CCR 0xfffc1000 /* CCR1 */
|
||||
#define CCR2 0xfffc1004
|
||||
#define SH_CCR 0xfffc1000 /* CCR1 */
|
||||
#define SH_CCR2 0xfffc1004
|
||||
|
||||
/*
|
||||
* Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#define SH_CACHE_COMBINED 4
|
||||
#define SH_CACHE_ASSOC 8
|
||||
|
||||
#define CCR 0xffffffec /* Address of Cache Control Register */
|
||||
#define SH_CCR 0xffffffec /* Address of Cache Control Register */
|
||||
|
||||
#define CCR_CACHE_CE 0x01 /* Cache Enable */
|
||||
#define CCR_CACHE_WT 0x02 /* Write-Through (for P0,U0,P3) (else writeback) */
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#define SH_CACHE_COMBINED 4
|
||||
#define SH_CACHE_ASSOC 8
|
||||
|
||||
#define CCR 0xff00001c /* Address of Cache Control Register */
|
||||
#define SH_CCR 0xff00001c /* Address of Cache Control Register */
|
||||
#define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */
|
||||
#define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/
|
||||
#define CCR_CACHE_CB 0x0004 /* Copy-Back (for P1) (else writethrough) */
|
||||
|
|
|
@ -112,7 +112,7 @@ static void cache_init(void)
|
|||
unsigned long ccr, flags;
|
||||
|
||||
jump_to_uncached();
|
||||
ccr = __raw_readl(CCR);
|
||||
ccr = __raw_readl(SH_CCR);
|
||||
|
||||
/*
|
||||
* At this point we don't know whether the cache is enabled or not - a
|
||||
|
@ -189,7 +189,7 @@ static void cache_init(void)
|
|||
|
||||
l2_cache_init();
|
||||
|
||||
__raw_writel(flags, CCR);
|
||||
__raw_writel(flags, SH_CCR);
|
||||
back_to_cached();
|
||||
}
|
||||
#else
|
||||
|
|
|
@ -36,7 +36,7 @@ static int cache_seq_show(struct seq_file *file, void *iter)
|
|||
*/
|
||||
jump_to_uncached();
|
||||
|
||||
ccr = __raw_readl(CCR);
|
||||
ccr = __raw_readl(SH_CCR);
|
||||
if ((ccr & CCR_CACHE_ENABLE) == 0) {
|
||||
back_to_cached();
|
||||
|
||||
|
|
|
@ -63,9 +63,9 @@ static void sh2__flush_invalidate_region(void *start, int size)
|
|||
local_irq_save(flags);
|
||||
jump_to_uncached();
|
||||
|
||||
ccr = __raw_readl(CCR);
|
||||
ccr = __raw_readl(SH_CCR);
|
||||
ccr |= CCR_CACHE_INVALIDATE;
|
||||
__raw_writel(ccr, CCR);
|
||||
__raw_writel(ccr, SH_CCR);
|
||||
|
||||
back_to_cached();
|
||||
local_irq_restore(flags);
|
||||
|
|
|
@ -134,7 +134,8 @@ static void sh2a__flush_invalidate_region(void *start, int size)
|
|||
|
||||
/* If there are too many pages then just blow the cache */
|
||||
if (((end - begin) >> PAGE_SHIFT) >= MAX_OCACHE_PAGES) {
|
||||
__raw_writel(__raw_readl(CCR) | CCR_OCACHE_INVALIDATE, CCR);
|
||||
__raw_writel(__raw_readl(SH_CCR) | CCR_OCACHE_INVALIDATE,
|
||||
SH_CCR);
|
||||
} else {
|
||||
for (v = begin; v < end; v += L1_CACHE_BYTES)
|
||||
sh2a_invalidate_line(CACHE_OC_ADDRESS_ARRAY, v);
|
||||
|
@ -167,7 +168,8 @@ static void sh2a_flush_icache_range(void *args)
|
|||
/* I-Cache invalidate */
|
||||
/* If there are too many pages then just blow the cache */
|
||||
if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) {
|
||||
__raw_writel(__raw_readl(CCR) | CCR_ICACHE_INVALIDATE, CCR);
|
||||
__raw_writel(__raw_readl(SH_CCR) | CCR_ICACHE_INVALIDATE,
|
||||
SH_CCR);
|
||||
} else {
|
||||
for (v = start; v < end; v += L1_CACHE_BYTES)
|
||||
sh2a_invalidate_line(CACHE_IC_ADDRESS_ARRAY, v);
|
||||
|
|
|
@ -133,9 +133,9 @@ static void flush_icache_all(void)
|
|||
jump_to_uncached();
|
||||
|
||||
/* Flush I-cache */
|
||||
ccr = __raw_readl(CCR);
|
||||
ccr = __raw_readl(SH_CCR);
|
||||
ccr |= CCR_CACHE_ICI;
|
||||
__raw_writel(ccr, CCR);
|
||||
__raw_writel(ccr, SH_CCR);
|
||||
|
||||
/*
|
||||
* back_to_cached() will take care of the barrier for us, don't add
|
||||
|
|
|
@ -19,7 +19,7 @@ void __init shx3_cache_init(void)
|
|||
{
|
||||
unsigned int ccr;
|
||||
|
||||
ccr = __raw_readl(CCR);
|
||||
ccr = __raw_readl(SH_CCR);
|
||||
|
||||
/*
|
||||
* If we've got cache aliases, resolve them in hardware.
|
||||
|
@ -40,5 +40,5 @@ void __init shx3_cache_init(void)
|
|||
ccr |= CCR_CACHE_IBE;
|
||||
#endif
|
||||
|
||||
writel_uncached(ccr, CCR);
|
||||
writel_uncached(ccr, SH_CCR);
|
||||
}
|
||||
|
|
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