Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (25 commits) ARM: 5728/1: Proper prefetch abort handling on ARMv6 and ARMv7 ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() ARM: 5740/1: fix valid_phys_addr_range() range check ARM: 5739/1: ARM: allow empty ATAG_CORE ARM: 5735/1: sa1111: CodingStyle cleanups ARM: 5738/1: Correct TCM documentation ARM: 5734/1: arm: fix compilation of entry-common.S for older CPUs ARM: 5733/1: fix bcmring compile error ARM: 5732/1: remove redundant include file ARM: 5731/2: Fix U300 generic GPIO, remove ifdefs from MMCI v3 ARM: Ensure do_cache_op takes mmap_sem ARM: Fix __cpuexit section mismatch warnings ARM: Don't allow highmem on SMP platforms without h/w TLB ops broadcast ARM: includecheck fix: mach-davinci, board-dm365-evm.c ARM: Remove unused CONFIG SA1100_H3XXX ARM: Fix warning: unused variable 'highmem' ARM: Fix warning: #warning syscall migrate_pages not implemented ARM: Fix SA11x0 clocksource warning ARM: Fix SA1100 Neponset serial section mismatch ARM: Fix SA1100 Assabet/Neponset PCMCIA section mismatch warnings ...
This commit is contained in:
Коммит
a037a79dce
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@ -29,11 +29,13 @@ TCM location and size. Notice that this is not a MMU table: you
|
|||
actually move the physical location of the TCM around. At the
|
||||
place you put it, it will mask any underlying RAM from the
|
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CPU so it is usually wise not to overlap any physical RAM with
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the TCM. The TCM memory exists totally outside the MMU and will
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override any MMU mappings.
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the TCM.
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Code executing inside the ITCM does not "see" any MMU mappings
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and e.g. register accesses must be made to physical addresses.
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The TCM memory can then be remapped to another address again using
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the MMU, but notice that the TCM if often used in situations where
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the MMU is turned off. To avoid confusion the current Linux
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implementation will map the TCM 1 to 1 from physical to virtual
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memory in the location specified by the machine.
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TCM is used for a few things:
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|
|
12
MAINTAINERS
12
MAINTAINERS
|
@ -646,24 +646,24 @@ ARM/INTEL IOP32X ARM ARCHITECTURE
|
|||
M: Lennert Buytenhek <kernel@wantstofly.org>
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||||
M: Dan Williams <dan.j.williams@intel.com>
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||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
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||||
S: Maintained
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||||
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||||
ARM/INTEL IOP33X ARM ARCHITECTURE
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||||
M: Dan Williams <dan.j.williams@intel.com>
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||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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||||
S: Supported
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||||
S: Maintained
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||||
|
||||
ARM/INTEL IOP13XX ARM ARCHITECTURE
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||||
M: Lennert Buytenhek <kernel@wantstofly.org>
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||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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||||
S: Supported
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||||
S: Maintained
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||||
|
||||
ARM/INTEL IQ81342EX MACHINE SUPPORT
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||||
M: Lennert Buytenhek <kernel@wantstofly.org>
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||||
M: Dan Williams <dan.j.williams@intel.com>
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||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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||||
S: Supported
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S: Maintained
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||||
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ARM/INTEL IXP2000 ARM ARCHITECTURE
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M: Lennert Buytenhek <kernel@wantstofly.org>
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|
@ -691,7 +691,7 @@ ARM/INTEL XSC3 (MANZANO) ARM CORE
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M: Lennert Buytenhek <kernel@wantstofly.org>
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M: Dan Williams <dan.j.williams@intel.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Supported
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S: Maintained
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ARM/IP FABRICS DOUBLE ESPRESSO MACHINE SUPPORT
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M: Lennert Buytenhek <kernel@wantstofly.org>
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|
@ -2695,7 +2695,7 @@ F: include/linux/intel-iommu.h
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|||
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INTEL IOP-ADMA DMA DRIVER
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M: Dan Williams <dan.j.williams@intel.com>
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S: Supported
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S: Maintained
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F: drivers/dma/iop-adma.c
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INTEL IXP4XX QMGR, NPE, ETHERNET and HSS SUPPORT
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|
|
|
@ -1032,6 +1032,7 @@ unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
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return __sa1111_pll_clock(sachip);
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}
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EXPORT_SYMBOL(sa1111_pll_clock);
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/**
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* sa1111_select_audio_mode - select I2S or AC link mode
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@ -1059,6 +1060,7 @@ void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
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spin_unlock_irqrestore(&sachip->lock, flags);
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}
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EXPORT_SYMBOL(sa1111_select_audio_mode);
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/**
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* sa1111_set_audio_rate - set the audio sample rate
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|
@ -1083,6 +1085,7 @@ int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
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return 0;
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}
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EXPORT_SYMBOL(sa1111_set_audio_rate);
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/**
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* sa1111_get_audio_rate - get the audio sample rate
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|
@ -1100,6 +1103,7 @@ int sa1111_get_audio_rate(struct sa1111_dev *sadev)
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return __sa1111_pll_clock(sachip) / (256 * div);
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}
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EXPORT_SYMBOL(sa1111_get_audio_rate);
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void sa1111_set_io_dir(struct sa1111_dev *sadev,
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unsigned int bits, unsigned int dir,
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|
@ -1128,6 +1132,7 @@ void sa1111_set_io_dir(struct sa1111_dev *sadev,
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MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16);
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spin_unlock_irqrestore(&sachip->lock, flags);
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}
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EXPORT_SYMBOL(sa1111_set_io_dir);
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void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
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{
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|
@ -1142,6 +1147,7 @@ void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
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MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16);
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spin_unlock_irqrestore(&sachip->lock, flags);
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}
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EXPORT_SYMBOL(sa1111_set_io);
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void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
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{
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|
@ -1156,6 +1162,7 @@ void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned i
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MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16);
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spin_unlock_irqrestore(&sachip->lock, flags);
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}
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EXPORT_SYMBOL(sa1111_set_sleep_io);
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/*
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* Individual device operations.
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|
@ -1176,6 +1183,7 @@ void sa1111_enable_device(struct sa1111_dev *sadev)
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sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
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spin_unlock_irqrestore(&sachip->lock, flags);
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}
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EXPORT_SYMBOL(sa1111_enable_device);
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/**
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* sa1111_disable_device - disable an on-chip SA1111 function block
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|
@ -1192,6 +1200,7 @@ void sa1111_disable_device(struct sa1111_dev *sadev)
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sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
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spin_unlock_irqrestore(&sachip->lock, flags);
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}
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EXPORT_SYMBOL(sa1111_disable_device);
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/*
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* SA1111 "Register Access Bus."
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|
@ -1259,17 +1268,20 @@ struct bus_type sa1111_bus_type = {
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.suspend = sa1111_bus_suspend,
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.resume = sa1111_bus_resume,
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};
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EXPORT_SYMBOL(sa1111_bus_type);
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int sa1111_driver_register(struct sa1111_driver *driver)
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{
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driver->drv.bus = &sa1111_bus_type;
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return driver_register(&driver->drv);
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}
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EXPORT_SYMBOL(sa1111_driver_register);
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void sa1111_driver_unregister(struct sa1111_driver *driver)
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{
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driver_unregister(&driver->drv);
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}
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EXPORT_SYMBOL(sa1111_driver_unregister);
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static int __init sa1111_init(void)
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{
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|
@ -1290,16 +1302,3 @@ module_exit(sa1111_exit);
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MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
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MODULE_LICENSE("GPL");
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EXPORT_SYMBOL(sa1111_select_audio_mode);
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EXPORT_SYMBOL(sa1111_set_audio_rate);
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EXPORT_SYMBOL(sa1111_get_audio_rate);
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EXPORT_SYMBOL(sa1111_set_io_dir);
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EXPORT_SYMBOL(sa1111_set_io);
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EXPORT_SYMBOL(sa1111_set_sleep_io);
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EXPORT_SYMBOL(sa1111_enable_device);
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EXPORT_SYMBOL(sa1111_disable_device);
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EXPORT_SYMBOL(sa1111_pll_clock);
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EXPORT_SYMBOL(sa1111_bus_type);
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EXPORT_SYMBOL(sa1111_driver_register);
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EXPORT_SYMBOL(sa1111_driver_unregister);
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|
|
|
@ -90,7 +90,6 @@ CONFIG_ARCH_SA1100=y
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# CONFIG_SA1100_COLLIE is not set
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# CONFIG_SA1100_H3100 is not set
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CONFIG_SA1100_H3600=y
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CONFIG_SA1100_H3XXX=y
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# CONFIG_SA1100_BADGE4 is not set
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# CONFIG_SA1100_JORNADA720 is not set
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# CONFIG_SA1100_HACKKIT is not set
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|
|
Разница между файлами не показана из-за своего большого размера
Загрузить разницу
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@ -120,25 +120,39 @@
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#endif
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/*
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* Prefetch abort handler. If the CPU has an IFAR use that, otherwise
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* use the address of the aborted instruction
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* Prefetch Abort Model
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* ================
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*
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* We have the following to choose from:
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* legacy - no IFSR, no IFAR
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* v6 - ARMv6: IFSR, no IFAR
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* v7 - ARMv7: IFSR and IFAR
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*/
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#undef CPU_PABORT_HANDLER
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#undef MULTI_PABORT
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#ifdef CONFIG_CPU_PABRT_IFAR
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#ifdef CONFIG_CPU_PABRT_LEGACY
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# ifdef CPU_PABORT_HANDLER
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# define MULTI_PABORT 1
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# else
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# define CPU_PABORT_HANDLER(reg, insn) mrc p15, 0, reg, cr6, cr0, 2
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# define CPU_PABORT_HANDLER legacy_pabort
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# endif
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#endif
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#ifdef CONFIG_CPU_PABRT_NOIFAR
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#ifdef CONFIG_CPU_PABRT_V6
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# ifdef CPU_PABORT_HANDLER
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# define MULTI_PABORT 1
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# else
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# define CPU_PABORT_HANDLER(reg, insn) mov reg, insn
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# define CPU_PABORT_HANDLER v6_pabort
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# endif
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#endif
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#ifdef CONFIG_CPU_PABRT_V7
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# ifdef CPU_PABORT_HANDLER
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# define MULTI_PABORT 1
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# else
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# define CPU_PABORT_HANDLER v7_pabort
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# endif
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#endif
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|
|
|
@ -215,6 +215,7 @@ extern int iop3xx_get_init_atu(void);
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* IOP3XX I/O and Mem space regions for PCI autoconfiguration
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*/
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#define IOP3XX_PCI_LOWER_MEM_PA 0x80000000
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#define IOP3XX_PCI_MEM_WINDOW_SIZE 0x08000000
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#define IOP3XX_PCI_IO_WINDOW_SIZE 0x00010000
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#define IOP3XX_PCI_LOWER_IO_PA 0x90000000
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|
|
|
@ -0,0 +1,16 @@
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|||
/*
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* ARM specific SMP header, this contains our implementation
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* details.
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*/
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#ifndef __ASMARM_SMP_PLAT_H
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#define __ASMARM_SMP_PLAT_H
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#include <asm/cputype.h>
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/* all SMP configurations have the extended CPUID registers */
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static inline int tlb_ops_need_broadcast(void)
|
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{
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return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2;
|
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}
|
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|
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#endif
|
|
@ -456,6 +456,7 @@
|
|||
* Unimplemented (or alternatively implemented) syscalls
|
||||
*/
|
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#define __IGNORE_fadvise64_64 1
|
||||
#define __IGNORE_migrate_pages 1
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_ARM_UNISTD_H */
|
||||
|
|
|
@ -311,22 +311,16 @@ __pabt_svc:
|
|||
tst r3, #PSR_I_BIT
|
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biceq r9, r9, #PSR_I_BIT
|
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|
||||
@
|
||||
@ set args, then call main handler
|
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@
|
||||
@ r0 - address of faulting instruction
|
||||
@ r1 - pointer to registers on stack
|
||||
@
|
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#ifdef MULTI_PABORT
|
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mov r0, r2 @ pass address of aborted instruction.
|
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#ifdef MULTI_PABORT
|
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ldr r4, .LCprocfns
|
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mov lr, pc
|
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ldr pc, [r4, #PROCESSOR_PABT_FUNC]
|
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#else
|
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CPU_PABORT_HANDLER(r0, r2)
|
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bl CPU_PABORT_HANDLER
|
||||
#endif
|
||||
msr cpsr_c, r9 @ Maybe enable interrupts
|
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mov r1, sp @ regs
|
||||
mov r2, sp @ regs
|
||||
bl do_PrefetchAbort @ call abort handler
|
||||
|
||||
@
|
||||
|
@ -701,16 +695,16 @@ ENDPROC(__und_usr_unknown)
|
|||
__pabt_usr:
|
||||
usr_entry
|
||||
|
||||
#ifdef MULTI_PABORT
|
||||
mov r0, r2 @ pass address of aborted instruction.
|
||||
#ifdef MULTI_PABORT
|
||||
ldr r4, .LCprocfns
|
||||
mov lr, pc
|
||||
ldr pc, [r4, #PROCESSOR_PABT_FUNC]
|
||||
#else
|
||||
CPU_PABORT_HANDLER(r0, r2)
|
||||
bl CPU_PABORT_HANDLER
|
||||
#endif
|
||||
enable_irq @ Enable interrupts
|
||||
mov r1, sp @ regs
|
||||
mov r2, sp @ regs
|
||||
bl do_PrefetchAbort @ call abort handler
|
||||
UNWIND(.fnend )
|
||||
/* fall through */
|
||||
|
|
|
@ -126,7 +126,7 @@ ENTRY(__gnu_mcount_nc)
|
|||
cmp r0, r2
|
||||
bne gnu_trace
|
||||
ldmia sp!, {r0-r3, ip, lr}
|
||||
bx ip
|
||||
mov pc, ip
|
||||
|
||||
gnu_trace:
|
||||
ldr r1, [sp, #20] @ lr of instrumented routine
|
||||
|
@ -135,7 +135,7 @@ gnu_trace:
|
|||
mov lr, pc
|
||||
mov pc, r2
|
||||
ldmia sp!, {r0-r3, ip, lr}
|
||||
bx ip
|
||||
mov pc, ip
|
||||
|
||||
ENTRY(mcount)
|
||||
stmdb sp!, {r0-r3, lr}
|
||||
|
@ -425,13 +425,6 @@ sys_mmap2:
|
|||
#endif
|
||||
ENDPROC(sys_mmap2)
|
||||
|
||||
ENTRY(pabort_ifar)
|
||||
mrc p15, 0, r0, cr6, cr0, 2
|
||||
ENTRY(pabort_noifar)
|
||||
mov pc, lr
|
||||
ENDPROC(pabort_ifar)
|
||||
ENDPROC(pabort_noifar)
|
||||
|
||||
#ifdef CONFIG_OABI_COMPAT
|
||||
|
||||
/*
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
|
||||
#define ATAG_CORE 0x54410001
|
||||
#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
|
||||
#define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2)
|
||||
|
||||
.align 2
|
||||
.type __switch_data, %object
|
||||
|
@ -251,7 +252,8 @@ __vet_atags:
|
|||
bne 1f
|
||||
|
||||
ldr r5, [r2, #0] @ is first tag ATAG_CORE?
|
||||
subs r5, r5, #ATAG_CORE_SIZE
|
||||
cmp r5, #ATAG_CORE_SIZE
|
||||
cmpne r5, #ATAG_CORE_SIZE_EMPTY
|
||||
bne 1f
|
||||
ldr r5, [r2, #4]
|
||||
ldr r6, =ATAG_CORE
|
||||
|
|
|
@ -36,6 +36,7 @@
|
|||
#include <asm/tlbflush.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/localtimer.h>
|
||||
#include <asm/smp_plat.h>
|
||||
|
||||
/*
|
||||
* as from 2.5, kernels no longer have an init_tasks structure
|
||||
|
@ -153,7 +154,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
|
|||
/*
|
||||
* __cpu_disable runs on the processor to be shutdown.
|
||||
*/
|
||||
int __cpuexit __cpu_disable(void)
|
||||
int __cpu_disable(void)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
struct task_struct *p;
|
||||
|
@ -200,7 +201,7 @@ int __cpuexit __cpu_disable(void)
|
|||
* called on the thread which is asking for a CPU to be shutdown -
|
||||
* waits until shutdown has completed, or it is timed out.
|
||||
*/
|
||||
void __cpuexit __cpu_die(unsigned int cpu)
|
||||
void __cpu_die(unsigned int cpu)
|
||||
{
|
||||
if (!platform_cpu_kill(cpu))
|
||||
printk("CPU%u: unable to kill\n", cpu);
|
||||
|
@ -214,7 +215,7 @@ void __cpuexit __cpu_die(unsigned int cpu)
|
|||
* of the other hotplug-cpu capable cores, so presumably coming
|
||||
* out of idle fixes this.
|
||||
*/
|
||||
void __cpuexit cpu_die(void)
|
||||
void __ref cpu_die(void)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
|
||||
|
@ -586,12 +587,6 @@ struct tlb_args {
|
|||
unsigned long ta_end;
|
||||
};
|
||||
|
||||
/* all SMP configurations have the extended CPUID registers */
|
||||
static inline int tlb_ops_need_broadcast(void)
|
||||
{
|
||||
return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2;
|
||||
}
|
||||
|
||||
static inline void ipi_flush_tlb_all(void *ignored)
|
||||
{
|
||||
local_flush_tlb_all();
|
||||
|
|
|
@ -166,10 +166,12 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
|
|||
clockevents_register_device(clk);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
/*
|
||||
* take a local timer down
|
||||
*/
|
||||
void __cpuexit twd_timer_stop(void)
|
||||
void twd_timer_stop(void)
|
||||
{
|
||||
__raw_writel(0, twd_base + TWD_TIMER_CONTROL);
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -418,12 +418,14 @@ static int bad_syscall(int n, struct pt_regs *regs)
|
|||
static inline void
|
||||
do_cache_op(unsigned long start, unsigned long end, int flags)
|
||||
{
|
||||
struct mm_struct *mm = current->active_mm;
|
||||
struct vm_area_struct *vma;
|
||||
|
||||
if (end < start || flags)
|
||||
return;
|
||||
|
||||
vma = find_vma(current->active_mm, start);
|
||||
down_read(&mm->mmap_sem);
|
||||
vma = find_vma(mm, start);
|
||||
if (vma && vma->vm_start < end) {
|
||||
if (start < vma->vm_start)
|
||||
start = vma->vm_start;
|
||||
|
@ -432,6 +434,7 @@ do_cache_op(unsigned long start, unsigned long end, int flags)
|
|||
|
||||
flush_cache_user_range(vma, start, end);
|
||||
}
|
||||
up_read(&mm->mmap_sem);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -31,7 +31,6 @@
|
|||
#include <linux/clocksource.h>
|
||||
#include <linux/clockchips.h>
|
||||
|
||||
#include <linux/amba/bus.h>
|
||||
#include <mach/csp/mm_addr.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/clkdev.h>
|
||||
|
@ -45,7 +44,6 @@
|
|||
#include <asm/mach/irq.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/mmc.h>
|
||||
|
||||
#include <cfg_global.h>
|
||||
|
||||
|
|
|
@ -35,7 +35,6 @@
|
|||
#include <mach/common.h>
|
||||
#include <mach/i2c.h>
|
||||
#include <mach/serial.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/mmc.h>
|
||||
#include <mach/nand.h>
|
||||
|
||||
|
|
|
@ -486,7 +486,7 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)
|
|||
return ret;
|
||||
}
|
||||
|
||||
struct pci_bus *pci_v3_scan_bus(int nr, struct pci_sys_data *sys)
|
||||
struct pci_bus * __init pci_v3_scan_bus(int nr, struct pci_sys_data *sys)
|
||||
{
|
||||
return pci_scan_bus(sys->busnr, &pci_v3_ops, sys);
|
||||
}
|
||||
|
|
|
@ -31,7 +31,5 @@
|
|||
#define IOP32X_MAX_RAM_SIZE 0x40000000UL
|
||||
#define IOP3XX_MAX_RAM_SIZE IOP32X_MAX_RAM_SIZE
|
||||
#define IOP3XX_PCI_LOWER_MEM_BA 0x80000000
|
||||
#define IOP32X_PCI_MEM_WINDOW_SIZE 0x04000000
|
||||
#define IOP3XX_PCI_MEM_WINDOW_SIZE IOP32X_PCI_MEM_WINDOW_SIZE
|
||||
|
||||
#endif
|
||||
|
|
|
@ -36,8 +36,6 @@
|
|||
#define IOP33X_MAX_RAM_SIZE 0x80000000UL
|
||||
#define IOP3XX_MAX_RAM_SIZE IOP33X_MAX_RAM_SIZE
|
||||
#define IOP3XX_PCI_LOWER_MEM_BA (PHYS_OFFSET + IOP33X_MAX_RAM_SIZE)
|
||||
#define IOP33X_PCI_MEM_WINDOW_SIZE 0x08000000
|
||||
#define IOP3XX_PCI_MEM_WINDOW_SIZE IOP33X_PCI_MEM_WINDOW_SIZE
|
||||
|
||||
|
||||
#endif
|
||||
|
|
|
@ -71,11 +71,6 @@ config SA1100_H3600
|
|||
<http://www.handhelds.org/Compaq/index.html#iPAQ_H3600>
|
||||
<http://www.compaq.com/products/handhelds/pocketpc/>
|
||||
|
||||
config SA1100_H3XXX
|
||||
bool
|
||||
depends on SA1100_H3100 || SA1100_H3600
|
||||
default y
|
||||
|
||||
config SA1100_BADGE4
|
||||
bool "HP Labs BadgePAD 4"
|
||||
select SA1111
|
||||
|
|
|
@ -77,7 +77,7 @@ static struct clock_event_device ckevt_sa1100_osmr0 = {
|
|||
.set_mode = sa1100_osmr0_set_mode,
|
||||
};
|
||||
|
||||
static cycle_t sa1100_read_oscr(void)
|
||||
static cycle_t sa1100_read_oscr(struct clocksource *s)
|
||||
{
|
||||
return OSCR;
|
||||
}
|
||||
|
|
|
@ -281,6 +281,16 @@ int gpio_unregister_callback(unsigned gpio)
|
|||
}
|
||||
EXPORT_SYMBOL(gpio_unregister_callback);
|
||||
|
||||
/* Non-zero means valid */
|
||||
int gpio_is_valid(int number)
|
||||
{
|
||||
if (number >= 0 &&
|
||||
number < (U300_GPIO_NUM_PORTS * U300_GPIO_PINS_PER_PORT))
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(gpio_is_valid);
|
||||
|
||||
int gpio_request(unsigned gpio, const char *label)
|
||||
{
|
||||
if (gpio_pin[gpio].users)
|
||||
|
|
|
@ -258,6 +258,7 @@
|
|||
#define PIN_TO_PORT(val) (val >> 3)
|
||||
|
||||
/* These can be found in arch/arm/mach-u300/gpio.c */
|
||||
extern int gpio_is_valid(int number);
|
||||
extern int gpio_request(unsigned gpio, const char *label);
|
||||
extern void gpio_free(unsigned gpio);
|
||||
extern int gpio_direction_input(unsigned gpio);
|
||||
|
|
|
@ -17,7 +17,7 @@ config CPU_ARM610
|
|||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V3 if MMU
|
||||
select CPU_TLB_V3 if MMU
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
help
|
||||
The ARM610 is the successor to the ARM3 processor
|
||||
and was produced by VLSI Technology Inc.
|
||||
|
@ -31,7 +31,7 @@ config CPU_ARM7TDMI
|
|||
depends on !MMU
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_LV4T
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4
|
||||
help
|
||||
A 32-bit RISC microprocessor based on the ARM7 processor core
|
||||
|
@ -49,7 +49,7 @@ config CPU_ARM710
|
|||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V3 if MMU
|
||||
select CPU_TLB_V3 if MMU
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
help
|
||||
A 32-bit RISC microprocessor based on the ARM7 processor core
|
||||
designed by Advanced RISC Machines Ltd. The ARM710 is the
|
||||
|
@ -64,7 +64,7 @@ config CPU_ARM720T
|
|||
bool "Support ARM720T processor" if ARCH_INTEGRATOR
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_LV4T
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
|
@ -83,7 +83,7 @@ config CPU_ARM740T
|
|||
depends on !MMU
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_LV4T
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V3 # although the core is v4t
|
||||
select CPU_CP15_MPU
|
||||
help
|
||||
|
@ -100,7 +100,7 @@ config CPU_ARM9TDMI
|
|||
depends on !MMU
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_NOMMU
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4
|
||||
help
|
||||
A 32-bit RISC microprocessor based on the ARM9 processor core
|
||||
|
@ -114,7 +114,7 @@ config CPU_ARM920T
|
|||
bool "Support ARM920T processor" if ARCH_INTEGRATOR
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WT
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
|
@ -135,7 +135,7 @@ config CPU_ARM922T
|
|||
bool "Support ARM922T processor" if ARCH_INTEGRATOR
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WT
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
|
@ -154,7 +154,7 @@ config CPU_ARM925T
|
|||
bool "Support ARM925T processor" if ARCH_OMAP1
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WT
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
|
@ -173,7 +173,7 @@ config CPU_ARM926T
|
|||
bool "Support ARM926T processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV5TJ
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V4WB if MMU
|
||||
|
@ -191,7 +191,7 @@ config CPU_FA526
|
|||
bool
|
||||
select CPU_32v4
|
||||
select CPU_ABRT_EV4
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_CACHE_FA
|
||||
|
@ -210,7 +210,7 @@ config CPU_ARM940T
|
|||
depends on !MMU
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_NOMMU
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MPU
|
||||
help
|
||||
|
@ -228,7 +228,7 @@ config CPU_ARM946E
|
|||
depends on !MMU
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_NOMMU
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MPU
|
||||
help
|
||||
|
@ -244,7 +244,7 @@ config CPU_ARM1020
|
|||
bool "Support ARM1020T (rev 0) processor" if ARCH_INTEGRATOR
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WT
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
|
@ -262,7 +262,7 @@ config CPU_ARM1020E
|
|||
bool "Support ARM1020E processor" if ARCH_INTEGRATOR
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WT
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
|
@ -275,7 +275,7 @@ config CPU_ARM1022
|
|||
bool "Support ARM1022E processor" if ARCH_INTEGRATOR
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V4WB if MMU # can probably do better
|
||||
|
@ -293,7 +293,7 @@ config CPU_ARM1026
|
|||
bool "Support ARM1026EJ-S processor" if ARCH_INTEGRATOR
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V4WB if MMU # can probably do better
|
||||
|
@ -311,7 +311,7 @@ config CPU_SA110
|
|||
select CPU_32v3 if ARCH_RPC
|
||||
select CPU_32v4 if !ARCH_RPC
|
||||
select CPU_ABRT_EV4
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WB
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
|
@ -331,7 +331,7 @@ config CPU_SA1100
|
|||
bool
|
||||
select CPU_32v4
|
||||
select CPU_ABRT_EV4
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WB
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
|
@ -342,7 +342,7 @@ config CPU_XSCALE
|
|||
bool
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV5T
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
|
@ -352,7 +352,7 @@ config CPU_XSC3
|
|||
bool
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV5T
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
|
@ -363,7 +363,7 @@ config CPU_MOHAWK
|
|||
bool
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV5T
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
|
@ -374,7 +374,7 @@ config CPU_FEROCEON
|
|||
bool
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV5T
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_FEROCEON if MMU
|
||||
|
@ -394,7 +394,7 @@ config CPU_V6
|
|||
bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX
|
||||
select CPU_32v6
|
||||
select CPU_ABRT_EV6
|
||||
select CPU_PABRT_NOIFAR
|
||||
select CPU_PABRT_V6
|
||||
select CPU_CACHE_V6
|
||||
select CPU_CACHE_VIPT
|
||||
select CPU_CP15_MMU
|
||||
|
@ -420,7 +420,7 @@ config CPU_V7
|
|||
select CPU_32v6K
|
||||
select CPU_32v7
|
||||
select CPU_ABRT_EV7
|
||||
select CPU_PABRT_IFAR
|
||||
select CPU_PABRT_V7
|
||||
select CPU_CACHE_V7
|
||||
select CPU_CACHE_VIPT
|
||||
select CPU_CP15_MMU
|
||||
|
@ -482,10 +482,13 @@ config CPU_ABRT_EV6
|
|||
config CPU_ABRT_EV7
|
||||
bool
|
||||
|
||||
config CPU_PABRT_IFAR
|
||||
config CPU_PABRT_LEGACY
|
||||
bool
|
||||
|
||||
config CPU_PABRT_NOIFAR
|
||||
config CPU_PABRT_V6
|
||||
bool
|
||||
|
||||
config CPU_PABRT_V7
|
||||
bool
|
||||
|
||||
# The cache model
|
||||
|
|
|
@ -27,6 +27,10 @@ obj-$(CONFIG_CPU_ABRT_EV5TJ) += abort-ev5tj.o
|
|||
obj-$(CONFIG_CPU_ABRT_EV6) += abort-ev6.o
|
||||
obj-$(CONFIG_CPU_ABRT_EV7) += abort-ev7.o
|
||||
|
||||
obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o
|
||||
obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o
|
||||
obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
|
||||
|
||||
obj-$(CONFIG_CPU_CACHE_V3) += cache-v3.o
|
||||
obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o
|
||||
obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o
|
||||
|
|
|
@ -519,9 +519,58 @@ do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
|
|||
arm_notify_die("", regs, &info, fsr, 0);
|
||||
}
|
||||
|
||||
|
||||
static struct fsr_info ifsr_info[] = {
|
||||
{ do_bad, SIGBUS, 0, "unknown 0" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 1" },
|
||||
{ do_bad, SIGBUS, 0, "debug event" },
|
||||
{ do_bad, SIGSEGV, SEGV_ACCERR, "section access flag fault" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 4" },
|
||||
{ do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" },
|
||||
{ do_bad, SIGSEGV, SEGV_ACCERR, "page access flag fault" },
|
||||
{ do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" },
|
||||
{ do_bad, SIGBUS, 0, "external abort on non-linefetch" },
|
||||
{ do_bad, SIGSEGV, SEGV_ACCERR, "section domain fault" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 10" },
|
||||
{ do_bad, SIGSEGV, SEGV_ACCERR, "page domain fault" },
|
||||
{ do_bad, SIGBUS, 0, "external abort on translation" },
|
||||
{ do_sect_fault, SIGSEGV, SEGV_ACCERR, "section permission fault" },
|
||||
{ do_bad, SIGBUS, 0, "external abort on translation" },
|
||||
{ do_page_fault, SIGSEGV, SEGV_ACCERR, "page permission fault" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 16" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 17" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 18" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 19" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 20" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 21" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 22" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 23" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 24" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 25" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 26" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 27" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 28" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 29" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 30" },
|
||||
{ do_bad, SIGBUS, 0, "unknown 31" },
|
||||
};
|
||||
|
||||
asmlinkage void __exception
|
||||
do_PrefetchAbort(unsigned long addr, struct pt_regs *regs)
|
||||
do_PrefetchAbort(unsigned long addr, unsigned int ifsr, struct pt_regs *regs)
|
||||
{
|
||||
do_translation_fault(addr, FSR_LNX_PF, regs);
|
||||
const struct fsr_info *inf = ifsr_info + fsr_fs(ifsr);
|
||||
struct siginfo info;
|
||||
|
||||
if (!inf->fn(addr, ifsr | FSR_LNX_PF, regs))
|
||||
return;
|
||||
|
||||
printk(KERN_ALERT "Unhandled prefetch abort: %s (0x%03x) at 0x%08lx\n",
|
||||
inf->name, ifsr, addr);
|
||||
|
||||
info.si_signo = inf->sig;
|
||||
info.si_errno = 0;
|
||||
info.si_code = inf->code;
|
||||
info.si_addr = (void __user *)addr;
|
||||
arm_notify_die("", regs, &info, ifsr, 0);
|
||||
}
|
||||
|
||||
|
|
|
@ -124,7 +124,7 @@ int valid_phys_addr_range(unsigned long addr, size_t size)
|
|||
{
|
||||
if (addr < PHYS_OFFSET)
|
||||
return 0;
|
||||
if (addr + size >= __pa(high_memory - 1))
|
||||
if (addr + size > __pa(high_memory - 1) + 1)
|
||||
return 0;
|
||||
|
||||
return 1;
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
#include <asm/cachetype.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <asm/smp_plat.h>
|
||||
#include <asm/tlb.h>
|
||||
#include <asm/highmem.h>
|
||||
|
||||
|
@ -709,10 +710,6 @@ static void __init sanity_check_meminfo(void)
|
|||
if (meminfo.nr_banks >= NR_BANKS) {
|
||||
printk(KERN_CRIT "NR_BANKS too low, "
|
||||
"ignoring high memory\n");
|
||||
} else if (cache_is_vipt_aliasing()) {
|
||||
printk(KERN_CRIT "HIGHMEM is not yet supported "
|
||||
"with VIPT aliasing cache, "
|
||||
"ignoring high memory\n");
|
||||
} else {
|
||||
memmove(bank + 1, bank,
|
||||
(meminfo.nr_banks - i) * sizeof(*bank));
|
||||
|
@ -726,6 +723,8 @@ static void __init sanity_check_meminfo(void)
|
|||
bank->size = VMALLOC_MIN - __va(bank->start);
|
||||
}
|
||||
#else
|
||||
bank->highmem = highmem;
|
||||
|
||||
/*
|
||||
* Check whether this memory bank would entirely overlap
|
||||
* the vmalloc area.
|
||||
|
@ -754,6 +753,38 @@ static void __init sanity_check_meminfo(void)
|
|||
#endif
|
||||
j++;
|
||||
}
|
||||
#ifdef CONFIG_HIGHMEM
|
||||
if (highmem) {
|
||||
const char *reason = NULL;
|
||||
|
||||
if (cache_is_vipt_aliasing()) {
|
||||
/*
|
||||
* Interactions between kmap and other mappings
|
||||
* make highmem support with aliasing VIPT caches
|
||||
* rather difficult.
|
||||
*/
|
||||
reason = "with VIPT aliasing cache";
|
||||
#ifdef CONFIG_SMP
|
||||
} else if (tlb_ops_need_broadcast()) {
|
||||
/*
|
||||
* kmap_high needs to occasionally flush TLB entries,
|
||||
* however, if the TLB entries need to be broadcast
|
||||
* we may deadlock:
|
||||
* kmap_high(irqs off)->flush_all_zero_pkmaps->
|
||||
* flush_tlb_kernel_range->smp_call_function_many
|
||||
* (must not be called with irqs off)
|
||||
*/
|
||||
reason = "without hardware TLB ops broadcasting";
|
||||
#endif
|
||||
}
|
||||
if (reason) {
|
||||
printk(KERN_CRIT "HIGHMEM is not supported %s, ignoring high memory\n",
|
||||
reason);
|
||||
while (j > 0 && meminfo.bank[j - 1].highmem)
|
||||
j--;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
meminfo.nr_banks = j;
|
||||
}
|
||||
|
||||
|
|
|
@ -0,0 +1,19 @@
|
|||
#include <linux/linkage.h>
|
||||
#include <asm/assembler.h>
|
||||
|
||||
/*
|
||||
* Function: legacy_pabort
|
||||
*
|
||||
* Params : r0 = address of aborted instruction
|
||||
*
|
||||
* Returns : r0 = address of abort
|
||||
* : r1 = Simulated IFSR with section translation fault status
|
||||
*
|
||||
* Purpose : obtain information about current prefetch abort.
|
||||
*/
|
||||
|
||||
.align 5
|
||||
ENTRY(legacy_pabort)
|
||||
mov r1, #5
|
||||
mov pc, lr
|
||||
ENDPROC(legacy_pabort)
|
|
@ -0,0 +1,19 @@
|
|||
#include <linux/linkage.h>
|
||||
#include <asm/assembler.h>
|
||||
|
||||
/*
|
||||
* Function: v6_pabort
|
||||
*
|
||||
* Params : r0 = address of aborted instruction
|
||||
*
|
||||
* Returns : r0 = address of abort
|
||||
* : r1 = IFSR
|
||||
*
|
||||
* Purpose : obtain information about current prefetch abort.
|
||||
*/
|
||||
|
||||
.align 5
|
||||
ENTRY(v6_pabort)
|
||||
mrc p15, 0, r1, c5, c0, 1 @ get IFSR
|
||||
mov pc, lr
|
||||
ENDPROC(v6_pabort)
|
|
@ -0,0 +1,20 @@
|
|||
#include <linux/linkage.h>
|
||||
#include <asm/assembler.h>
|
||||
|
||||
/*
|
||||
* Function: v6_pabort
|
||||
*
|
||||
* Params : r0 = address of aborted instruction
|
||||
*
|
||||
* Returns : r0 = address of abort
|
||||
* : r1 = IFSR
|
||||
*
|
||||
* Purpose : obtain information about current prefetch abort.
|
||||
*/
|
||||
|
||||
.align 5
|
||||
ENTRY(v7_pabort)
|
||||
mrc p15, 0, r0, c6, c0, 2 @ get IFAR
|
||||
mrc p15, 0, r1, c5, c0, 1 @ get IFSR
|
||||
mov pc, lr
|
||||
ENDPROC(v7_pabort)
|
|
@ -449,7 +449,7 @@ arm1020_crval:
|
|||
.type arm1020_processor_functions, #object
|
||||
arm1020_processor_functions:
|
||||
.word v4t_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm1020_proc_init
|
||||
.word cpu_arm1020_proc_fin
|
||||
.word cpu_arm1020_reset
|
||||
|
|
|
@ -430,7 +430,7 @@ arm1020e_crval:
|
|||
.type arm1020e_processor_functions, #object
|
||||
arm1020e_processor_functions:
|
||||
.word v4t_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm1020e_proc_init
|
||||
.word cpu_arm1020e_proc_fin
|
||||
.word cpu_arm1020e_reset
|
||||
|
|
|
@ -413,7 +413,7 @@ arm1022_crval:
|
|||
.type arm1022_processor_functions, #object
|
||||
arm1022_processor_functions:
|
||||
.word v4t_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm1022_proc_init
|
||||
.word cpu_arm1022_proc_fin
|
||||
.word cpu_arm1022_reset
|
||||
|
|
|
@ -408,7 +408,7 @@ arm1026_crval:
|
|||
.type arm1026_processor_functions, #object
|
||||
arm1026_processor_functions:
|
||||
.word v5t_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm1026_proc_init
|
||||
.word cpu_arm1026_proc_fin
|
||||
.word cpu_arm1026_reset
|
||||
|
|
|
@ -278,7 +278,7 @@ __arm7_setup: mov r0, #0
|
|||
.type arm6_processor_functions, #object
|
||||
ENTRY(arm6_processor_functions)
|
||||
.word cpu_arm6_data_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm6_proc_init
|
||||
.word cpu_arm6_proc_fin
|
||||
.word cpu_arm6_reset
|
||||
|
@ -295,7 +295,7 @@ ENTRY(arm6_processor_functions)
|
|||
.type arm7_processor_functions, #object
|
||||
ENTRY(arm7_processor_functions)
|
||||
.word cpu_arm7_data_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm7_proc_init
|
||||
.word cpu_arm7_proc_fin
|
||||
.word cpu_arm7_reset
|
||||
|
|
|
@ -181,7 +181,7 @@ arm720_crval:
|
|||
.type arm720_processor_functions, #object
|
||||
ENTRY(arm720_processor_functions)
|
||||
.word v4t_late_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm720_proc_init
|
||||
.word cpu_arm720_proc_fin
|
||||
.word cpu_arm720_reset
|
||||
|
|
|
@ -126,7 +126,7 @@ __arm740_setup:
|
|||
.type arm740_processor_functions, #object
|
||||
ENTRY(arm740_processor_functions)
|
||||
.word v4t_late_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm740_proc_init
|
||||
.word cpu_arm740_proc_fin
|
||||
.word cpu_arm740_reset
|
||||
|
|
|
@ -64,7 +64,7 @@ __arm7tdmi_setup:
|
|||
.type arm7tdmi_processor_functions, #object
|
||||
ENTRY(arm7tdmi_processor_functions)
|
||||
.word v4t_late_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm7tdmi_proc_init
|
||||
.word cpu_arm7tdmi_proc_fin
|
||||
.word cpu_arm7tdmi_reset
|
||||
|
|
|
@ -395,7 +395,7 @@ arm920_crval:
|
|||
.type arm920_processor_functions, #object
|
||||
arm920_processor_functions:
|
||||
.word v4t_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm920_proc_init
|
||||
.word cpu_arm920_proc_fin
|
||||
.word cpu_arm920_reset
|
||||
|
|
|
@ -399,7 +399,7 @@ arm922_crval:
|
|||
.type arm922_processor_functions, #object
|
||||
arm922_processor_functions:
|
||||
.word v4t_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm922_proc_init
|
||||
.word cpu_arm922_proc_fin
|
||||
.word cpu_arm922_reset
|
||||
|
|
|
@ -462,7 +462,7 @@ arm925_crval:
|
|||
.type arm925_processor_functions, #object
|
||||
arm925_processor_functions:
|
||||
.word v4t_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm925_proc_init
|
||||
.word cpu_arm925_proc_fin
|
||||
.word cpu_arm925_reset
|
||||
|
|
|
@ -415,7 +415,7 @@ arm926_crval:
|
|||
.type arm926_processor_functions, #object
|
||||
arm926_processor_functions:
|
||||
.word v5tj_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm926_proc_init
|
||||
.word cpu_arm926_proc_fin
|
||||
.word cpu_arm926_reset
|
||||
|
|
|
@ -322,7 +322,7 @@ __arm940_setup:
|
|||
.type arm940_processor_functions, #object
|
||||
ENTRY(arm940_processor_functions)
|
||||
.word nommu_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm940_proc_init
|
||||
.word cpu_arm940_proc_fin
|
||||
.word cpu_arm940_reset
|
||||
|
|
|
@ -377,7 +377,7 @@ __arm946_setup:
|
|||
.type arm946_processor_functions, #object
|
||||
ENTRY(arm946_processor_functions)
|
||||
.word nommu_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm946_proc_init
|
||||
.word cpu_arm946_proc_fin
|
||||
.word cpu_arm946_reset
|
||||
|
|
|
@ -64,7 +64,7 @@ __arm9tdmi_setup:
|
|||
.type arm9tdmi_processor_functions, #object
|
||||
ENTRY(arm9tdmi_processor_functions)
|
||||
.word nommu_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_arm9tdmi_proc_init
|
||||
.word cpu_arm9tdmi_proc_fin
|
||||
.word cpu_arm9tdmi_reset
|
||||
|
|
|
@ -191,7 +191,7 @@ fa526_cr1_set:
|
|||
.type fa526_processor_functions, #object
|
||||
fa526_processor_functions:
|
||||
.word v4_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_fa526_proc_init
|
||||
.word cpu_fa526_proc_fin
|
||||
.word cpu_fa526_reset
|
||||
|
|
|
@ -499,7 +499,7 @@ feroceon_crval:
|
|||
.type feroceon_processor_functions, #object
|
||||
feroceon_processor_functions:
|
||||
.word v5t_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_feroceon_proc_init
|
||||
.word cpu_feroceon_proc_fin
|
||||
.word cpu_feroceon_reset
|
||||
|
|
|
@ -359,7 +359,7 @@ mohawk_crval:
|
|||
.type mohawk_processor_functions, #object
|
||||
mohawk_processor_functions:
|
||||
.word v5t_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_mohawk_proc_init
|
||||
.word cpu_mohawk_proc_fin
|
||||
.word cpu_mohawk_reset
|
||||
|
|
|
@ -199,7 +199,7 @@ sa110_crval:
|
|||
.type sa110_processor_functions, #object
|
||||
ENTRY(sa110_processor_functions)
|
||||
.word v4_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_sa110_proc_init
|
||||
.word cpu_sa110_proc_fin
|
||||
.word cpu_sa110_reset
|
||||
|
|
|
@ -214,7 +214,7 @@ sa1100_crval:
|
|||
.type sa1100_processor_functions, #object
|
||||
ENTRY(sa1100_processor_functions)
|
||||
.word v4_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_sa1100_proc_init
|
||||
.word cpu_sa1100_proc_fin
|
||||
.word cpu_sa1100_reset
|
||||
|
|
|
@ -191,7 +191,7 @@ v6_crval:
|
|||
.type v6_processor_functions, #object
|
||||
ENTRY(v6_processor_functions)
|
||||
.word v6_early_abort
|
||||
.word pabort_noifar
|
||||
.word v6_pabort
|
||||
.word cpu_v6_proc_init
|
||||
.word cpu_v6_proc_fin
|
||||
.word cpu_v6_reset
|
||||
|
|
|
@ -295,7 +295,7 @@ __v7_setup_stack:
|
|||
.type v7_processor_functions, #object
|
||||
ENTRY(v7_processor_functions)
|
||||
.word v7_early_abort
|
||||
.word pabort_ifar
|
||||
.word v7_pabort
|
||||
.word cpu_v7_proc_init
|
||||
.word cpu_v7_proc_fin
|
||||
.word cpu_v7_reset
|
||||
|
|
|
@ -428,7 +428,7 @@ xsc3_crval:
|
|||
.type xsc3_processor_functions, #object
|
||||
ENTRY(xsc3_processor_functions)
|
||||
.word v5t_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_xsc3_proc_init
|
||||
.word cpu_xsc3_proc_fin
|
||||
.word cpu_xsc3_reset
|
||||
|
|
|
@ -511,7 +511,7 @@ xscale_crval:
|
|||
.type xscale_processor_functions, #object
|
||||
ENTRY(xscale_processor_functions)
|
||||
.word v5t_early_abort
|
||||
.word pabort_noifar
|
||||
.word legacy_pabort
|
||||
.word cpu_xscale_proc_init
|
||||
.word cpu_xscale_proc_fin
|
||||
.word cpu_xscale_reset
|
||||
|
|
|
@ -257,7 +257,8 @@ void __init iop3xx_atu_setup(void)
|
|||
*IOP3XX_OUMWTVR0 = 0;
|
||||
|
||||
/* Outbound window 1 */
|
||||
*IOP3XX_OMWTVR1 = IOP3XX_PCI_LOWER_MEM_BA + IOP3XX_PCI_MEM_WINDOW_SIZE;
|
||||
*IOP3XX_OMWTVR1 = IOP3XX_PCI_LOWER_MEM_BA +
|
||||
IOP3XX_PCI_MEM_WINDOW_SIZE / 2;
|
||||
*IOP3XX_OUMWTVR1 = 0;
|
||||
|
||||
/* BAR 3 ( Disabled ) */
|
||||
|
|
|
@ -85,7 +85,7 @@ void __init iop_init_time(unsigned long tick_rate)
|
|||
{
|
||||
u32 timer_ctl;
|
||||
|
||||
ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
|
||||
ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ);
|
||||
ticks_per_usec = tick_rate / 1000000;
|
||||
next_jiffy_time = 0xffffffff;
|
||||
iop_tick_rate = tick_rate;
|
||||
|
|
|
@ -678,7 +678,6 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
|
|||
writel(0, host->base + MMCIMASK1);
|
||||
writel(0xfff, host->base + MMCICLEAR);
|
||||
|
||||
#ifdef CONFIG_GPIOLIB
|
||||
if (gpio_is_valid(plat->gpio_cd)) {
|
||||
ret = gpio_request(plat->gpio_cd, DRIVER_NAME " (cd)");
|
||||
if (ret == 0)
|
||||
|
@ -697,7 +696,6 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
|
|||
else if (ret != -ENOSYS)
|
||||
goto err_gpio_wp;
|
||||
}
|
||||
#endif
|
||||
|
||||
ret = request_irq(dev->irq[0], mmci_irq, IRQF_SHARED, DRIVER_NAME " (cmd)", host);
|
||||
if (ret)
|
||||
|
|
|
@ -130,7 +130,7 @@ static struct pcmcia_low_level assabet_pcmcia_ops = {
|
|||
.socket_suspend = assabet_pcmcia_socket_suspend,
|
||||
};
|
||||
|
||||
int __init pcmcia_assabet_init(struct device *dev)
|
||||
int pcmcia_assabet_init(struct device *dev)
|
||||
{
|
||||
int ret = -ENODEV;
|
||||
|
||||
|
|
|
@ -123,7 +123,7 @@ static struct pcmcia_low_level neponset_pcmcia_ops = {
|
|||
.socket_suspend = sa1111_pcmcia_socket_suspend,
|
||||
};
|
||||
|
||||
int __init pcmcia_neponset_init(struct sa1111_dev *sadev)
|
||||
int pcmcia_neponset_init(struct sa1111_dev *sadev)
|
||||
{
|
||||
int ret = -ENODEV;
|
||||
|
||||
|
|
|
@ -638,7 +638,7 @@ static void __init sa1100_init_ports(void)
|
|||
PPSR |= PPC_TXD1 | PPC_TXD3;
|
||||
}
|
||||
|
||||
void __init sa1100_register_uart_fns(struct sa1100_port_fns *fns)
|
||||
void __devinit sa1100_register_uart_fns(struct sa1100_port_fns *fns)
|
||||
{
|
||||
if (fns->get_mctrl)
|
||||
sa1100_pops.get_mctrl = fns->get_mctrl;
|
||||
|
|
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