ARM: 8031/2: change fixmap mapping region to support 32 CPUs
In 32-bit ARM systems, the fixmap mapping region can support no more than 14 CPUs(total: 896k; one CPU: 64K). And we can configure NR_CPUS up to 32. So there is a mismatch. This patch moves fixmapping region downwards to region 0xffc00000- 0xffe00000. Then the fixmap mapping region can support up to 32 CPUs. Reviewed-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Liu Hua <sdu.liu@huawei.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Родитель
4221e2e6b3
Коммит
a05e54c103
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@ -41,7 +41,7 @@ fffe8000 fffeffff DTCM mapping area for platforms with
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fffe0000 fffe7fff ITCM mapping area for platforms with
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ITCM mounted inside the CPU.
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fff00000 fffdffff Fixmap mapping region. Addresses provided
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fffc0000 ffdfffff Fixmap mapping region. Addresses provided
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by fix_to_virt() will be located here.
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fee00000 feffffff Mapping of PCI I/O space. This is a static
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@ -1,20 +1,8 @@
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#ifndef _ASM_FIXMAP_H
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#define _ASM_FIXMAP_H
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/*
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* Nothing too fancy for now.
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*
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* On ARM we already have well known fixed virtual addresses imposed by
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* the architecture such as the vector page which is located at 0xffff0000,
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* therefore a second level page table is already allocated covering
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* 0xfff00000 upwards.
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*
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* The cache flushing code in proc-xscale.S uses the virtual area between
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* 0xfffe0000 and 0xfffeffff.
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*/
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#define FIXADDR_START 0xfff00000UL
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#define FIXADDR_TOP 0xfffe0000UL
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#define FIXADDR_START 0xffc00000UL
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#define FIXADDR_TOP 0xffe00000UL
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#define FIXADDR_SIZE (FIXADDR_TOP - FIXADDR_START)
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#define FIX_KMAP_NR_PTES (FIXADDR_SIZE >> PAGE_SHIFT)
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@ -18,6 +18,7 @@
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} while (0)
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extern pte_t *pkmap_page_table;
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extern pte_t *fixmap_page_table;
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extern void *kmap_high(struct page *page);
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extern void kunmap_high(struct page *page);
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@ -18,6 +18,21 @@
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#include <asm/tlbflush.h>
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#include "mm.h"
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pte_t *fixmap_page_table;
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static inline void set_fixmap_pte(int idx, pte_t pte)
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{
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unsigned long vaddr = __fix_to_virt(idx);
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set_pte_ext(fixmap_page_table + idx, pte, 0);
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local_flush_tlb_kernel_page(vaddr);
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}
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static inline pte_t get_fixmap_pte(unsigned long vaddr)
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{
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unsigned long idx = __virt_to_fix(vaddr);
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return *(fixmap_page_table + idx);
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}
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void *kmap(struct page *page)
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{
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might_sleep();
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@ -69,14 +84,14 @@ void *kmap_atomic(struct page *page)
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* With debugging enabled, kunmap_atomic forces that entry to 0.
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* Make sure it was indeed properly unmapped.
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*/
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BUG_ON(!pte_none(get_top_pte(vaddr)));
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BUG_ON(!pte_none(*(fixmap_page_table + idx)));
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#endif
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/*
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* When debugging is off, kunmap_atomic leaves the previous mapping
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* in place, so the contained TLB flush ensures the TLB is updated
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* with the new mapping.
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*/
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set_top_pte(vaddr, mk_pte(page, kmap_prot));
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set_fixmap_pte(idx, mk_pte(page, kmap_prot));
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return (void *)vaddr;
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}
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@ -95,7 +110,7 @@ void __kunmap_atomic(void *kvaddr)
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__cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE);
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#ifdef CONFIG_DEBUG_HIGHMEM
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BUG_ON(vaddr != __fix_to_virt(idx));
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set_top_pte(vaddr, __pte(0));
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set_fixmap_pte(idx, __pte(0));
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#else
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(void) idx; /* to kill a warning */
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#endif
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@ -119,9 +134,9 @@ void *kmap_atomic_pfn(unsigned long pfn)
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idx = type + KM_TYPE_NR * smp_processor_id();
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vaddr = __fix_to_virt(idx);
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#ifdef CONFIG_DEBUG_HIGHMEM
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BUG_ON(!pte_none(get_top_pte(vaddr)));
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BUG_ON(!pte_none(*(fixmap_page_table + idx)));
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#endif
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set_top_pte(vaddr, pfn_pte(pfn, kmap_prot));
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set_fixmap_pte(idx, pfn_pte(pfn, kmap_prot));
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return (void *)vaddr;
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}
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@ -133,5 +148,5 @@ struct page *kmap_atomic_to_page(const void *ptr)
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if (vaddr < FIXADDR_START)
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return virt_to_page(ptr);
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return pte_page(get_top_pte(vaddr));
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return pte_page(get_fixmap_pte(vaddr));
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}
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@ -35,6 +35,7 @@
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/pci.h>
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#include <asm/fixmap.h>
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#include "mm.h"
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#include "tcm.h"
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@ -1359,6 +1360,9 @@ static void __init kmap_init(void)
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#ifdef CONFIG_HIGHMEM
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pkmap_page_table = early_pte_alloc(pmd_off_k(PKMAP_BASE),
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PKMAP_BASE, _PAGE_KERNEL_TABLE);
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fixmap_page_table = early_pte_alloc(pmd_off_k(FIXADDR_START),
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FIXADDR_START, _PAGE_KERNEL_TABLE);
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#endif
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}
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