MIPS: SPRAM: Clean up support code a little
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -0,0 +1,10 @@
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#ifndef _MIPS_SPRAM_H
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#define _MIPS_SPRAM_H
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#ifdef CONFIG_CPU_MIPSR2
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extern __init void spram_config(void);
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#else
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static inline void spram_config(void) { };
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#endif /* CONFIG_CPU_MIPSR2 */
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#endif /* _MIPS_SPRAM_H */
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@ -23,7 +23,7 @@
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#include <asm/mipsregs.h>
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#include <asm/system.h>
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#include <asm/watch.h>
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#include <asm/spram.h>
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/*
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* Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
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* the implementation of the "wait" feature differs between CPU families. This
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@ -711,12 +711,6 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c)
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mips_probe_watch_registers(c);
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}
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#ifdef CONFIG_CPU_MIPSR2
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extern void spram_config(void);
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#else
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static inline void spram_config(void) {}
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#endif
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static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
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{
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decode_configs(c);
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@ -13,7 +13,6 @@
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#include <linux/ptrace.h>
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#include <linux/stddef.h>
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#include <asm/cpu.h>
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#include <asm/fpu.h>
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#include <asm/mipsregs.h>
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#include <asm/system.h>
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@ -198,8 +197,7 @@ static __cpuinit void probe_spram(char *type,
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offset += 2 * SPRAM_TAG_STRIDE;
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}
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}
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__cpuinit void spram_config(void)
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void __cpuinit spram_config(void)
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{
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struct cpuinfo_mips *c = ¤t_cpu_data;
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unsigned int config0;
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