OMAP3: Fixed ARM aux ctrl register save/restore
Current value is stored on SDRAM and it is written back during wakeup. Previously a static value of 0x72 was written there. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Acked-by: Thara Gopinath <thara@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -245,7 +245,8 @@ restore:
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mov r1, #0 @ set task id for ROM code in r1
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mov r2, #4 @ set some flags in r2, r6
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mov r6, #0xff
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adr r3, write_aux_control_params @ r3 points to parameters
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ldr r4, scratchpad_base
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ldr r3, [r4, #0xBC] @ r3 points to parameters
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mcr p15, 0, r0, c7, c10, 4 @ data write barrier
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mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
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.word 0xE1600071 @ call SMI monitor (smi #1)
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@ -253,14 +254,14 @@ restore:
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b logic_l1_restore
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l2_inv_api_params:
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.word 0x1, 0x00
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write_aux_control_params:
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.word 0x1, 0x72
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l2_inv_gp:
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/* Execute smi to invalidate L2 cache */
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mov r12, #0x1 @ set up to invalide L2
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smi: .word 0xE1600070 @ Call SMI monitor (smieq)
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/* Write to Aux control register to set some bits */
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mov r0, #0x72
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ldr r4, scratchpad_base
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ldr r3, [r4,#0xBC]
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ldr r0, [r3,#4]
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mov r12, #0x3
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.word 0xE1600070 @ Call SMI monitor (smieq)
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logic_l1_restore:
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@ -271,6 +272,7 @@ logic_l1_restore:
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ldr r4, scratchpad_base
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ldr r3, [r4,#0xBC]
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adds r3, r3, #8
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ldmia r3!, {r4-r6}
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mov sp, r4
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msr spsr_cxsf, r5
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@ -387,6 +389,9 @@ usettbr0:
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save_context_wfi:
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/*b save_context_wfi*/ @ enable to debug save code
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mov r8, r0 /* Store SDRAM address in r8 */
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mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register
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mov r4, #0x1 @ Number of parameters for restore call
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stmia r8!, {r4-r5}
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/* Check what that target sleep state is:stored in r1*/
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/* 1 - Only L1 and logic lost */
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/* 2 - Only L2 lost */
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