ARM: LPC32xx: Remove wrong re-initialization of MMC clock register
This patch fixes a bug, (wrongfully) resetting the value of LPC32XX_CLKPWR_MS_CTRL back to its initial contents (after careful setup). This was discovered only with a board/bootloader combination (EA3250) where the contents of the respective register wasn't already at the correct value on Linux boot. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
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@ -871,7 +871,7 @@ static unsigned long mmc_round_rate(struct clk *clk, unsigned long rate)
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static int mmc_set_rate(struct clk *clk, unsigned long rate)
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{
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u32 oldclk, tmp;
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u32 tmp;
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unsigned long prate, div, crate = mmc_round_rate(clk, rate);
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prate = clk->parent->get_rate(clk->parent);
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@ -879,16 +879,12 @@ static int mmc_set_rate(struct clk *clk, unsigned long rate)
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div = prate / crate;
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/* The MMC clock must be on when accessing an MMC register */
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oldclk = __raw_readl(LPC32XX_CLKPWR_MS_CTRL);
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__raw_writel(oldclk | LPC32XX_CLKPWR_MSCARD_SDCARD_EN,
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LPC32XX_CLKPWR_MS_CTRL);
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tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL) &
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~LPC32XX_CLKPWR_MSCARD_SDCARD_DIV(0xf);
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tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_DIV(div);
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tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_DIV(div) |
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LPC32XX_CLKPWR_MSCARD_SDCARD_EN;
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__raw_writel(tmp, LPC32XX_CLKPWR_MS_CTRL);
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__raw_writel(oldclk, LPC32XX_CLKPWR_MS_CTRL);
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return 0;
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}
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