gpio: ws16c48: make use of raw_spinlock variants
The ws16c48 gpio driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright <julia@ni.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Julia Cartwright
Linus Walleij
Родитель
99b9b45de8
Коммит
a0a584f0e9
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@ -51,7 +51,7 @@ struct ws16c48_gpio {
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struct gpio_chip chip;
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unsigned char io_state[6];
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unsigned char out_state[6];
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spinlock_t lock;
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raw_spinlock_t lock;
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unsigned long irq_mask;
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unsigned long flow_mask;
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unsigned base;
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@ -73,13 +73,13 @@ static int ws16c48_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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const unsigned mask = BIT(offset % 8);
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unsigned long flags;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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raw_spin_lock_irqsave(&ws16c48gpio->lock, flags);
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ws16c48gpio->io_state[port] |= mask;
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ws16c48gpio->out_state[port] &= ~mask;
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outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return 0;
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}
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@ -92,7 +92,7 @@ static int ws16c48_gpio_direction_output(struct gpio_chip *chip,
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const unsigned mask = BIT(offset % 8);
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unsigned long flags;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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raw_spin_lock_irqsave(&ws16c48gpio->lock, flags);
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ws16c48gpio->io_state[port] &= ~mask;
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if (value)
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@ -101,7 +101,7 @@ static int ws16c48_gpio_direction_output(struct gpio_chip *chip,
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ws16c48gpio->out_state[port] &= ~mask;
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outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return 0;
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}
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@ -114,17 +114,17 @@ static int ws16c48_gpio_get(struct gpio_chip *chip, unsigned offset)
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unsigned long flags;
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unsigned port_state;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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raw_spin_lock_irqsave(&ws16c48gpio->lock, flags);
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/* ensure that GPIO is set for input */
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if (!(ws16c48gpio->io_state[port] & mask)) {
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return -EINVAL;
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}
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port_state = inb(ws16c48gpio->base + port);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return !!(port_state & mask);
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}
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@ -136,11 +136,11 @@ static void ws16c48_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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const unsigned mask = BIT(offset % 8);
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unsigned long flags;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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raw_spin_lock_irqsave(&ws16c48gpio->lock, flags);
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/* ensure that GPIO is set for output */
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if (ws16c48gpio->io_state[port] & mask) {
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return;
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}
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@ -150,7 +150,7 @@ static void ws16c48_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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ws16c48gpio->out_state[port] &= ~mask;
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outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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}
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static void ws16c48_gpio_set_multiple(struct gpio_chip *chip,
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@ -178,14 +178,14 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip,
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iomask = mask[BIT_WORD(i)] & ~ws16c48gpio->io_state[port];
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bitmask = iomask & bits[BIT_WORD(i)];
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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raw_spin_lock_irqsave(&ws16c48gpio->lock, flags);
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/* update output state data and set device gpio register */
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ws16c48gpio->out_state[port] &= ~iomask;
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ws16c48gpio->out_state[port] |= bitmask;
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outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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/* prepare for next gpio register set */
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mask[BIT_WORD(i)] >>= gpio_reg_size;
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@ -207,7 +207,7 @@ static void ws16c48_irq_ack(struct irq_data *data)
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if (port > 2)
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return;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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raw_spin_lock_irqsave(&ws16c48gpio->lock, flags);
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port_state = ws16c48gpio->irq_mask >> (8*port);
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@ -216,7 +216,7 @@ static void ws16c48_irq_ack(struct irq_data *data)
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outb(port_state | mask, ws16c48gpio->base + 8 + port);
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outb(0xC0, ws16c48gpio->base + 7);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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}
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static void ws16c48_irq_mask(struct irq_data *data)
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@ -232,7 +232,7 @@ static void ws16c48_irq_mask(struct irq_data *data)
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if (port > 2)
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return;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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raw_spin_lock_irqsave(&ws16c48gpio->lock, flags);
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ws16c48gpio->irq_mask &= ~mask;
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@ -240,7 +240,7 @@ static void ws16c48_irq_mask(struct irq_data *data)
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outb(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port);
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outb(0xC0, ws16c48gpio->base + 7);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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}
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static void ws16c48_irq_unmask(struct irq_data *data)
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@ -256,7 +256,7 @@ static void ws16c48_irq_unmask(struct irq_data *data)
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if (port > 2)
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return;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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raw_spin_lock_irqsave(&ws16c48gpio->lock, flags);
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ws16c48gpio->irq_mask |= mask;
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@ -264,7 +264,7 @@ static void ws16c48_irq_unmask(struct irq_data *data)
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outb(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port);
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outb(0xC0, ws16c48gpio->base + 7);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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}
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static int ws16c48_irq_set_type(struct irq_data *data, unsigned flow_type)
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@ -280,7 +280,7 @@ static int ws16c48_irq_set_type(struct irq_data *data, unsigned flow_type)
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if (port > 2)
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return -EINVAL;
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spin_lock_irqsave(&ws16c48gpio->lock, flags);
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raw_spin_lock_irqsave(&ws16c48gpio->lock, flags);
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switch (flow_type) {
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case IRQ_TYPE_NONE:
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@ -292,7 +292,7 @@ static int ws16c48_irq_set_type(struct irq_data *data, unsigned flow_type)
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ws16c48gpio->flow_mask &= ~mask;
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break;
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default:
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return -EINVAL;
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}
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@ -300,7 +300,7 @@ static int ws16c48_irq_set_type(struct irq_data *data, unsigned flow_type)
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outb(ws16c48gpio->flow_mask >> (8*port), ws16c48gpio->base + 8 + port);
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outb(0xC0, ws16c48gpio->base + 7);
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spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
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return 0;
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}
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@ -387,7 +387,7 @@ static int ws16c48_probe(struct device *dev, unsigned int id)
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ws16c48gpio->chip.set_multiple = ws16c48_gpio_set_multiple;
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ws16c48gpio->base = base[id];
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spin_lock_init(&ws16c48gpio->lock);
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raw_spin_lock_init(&ws16c48gpio->lock);
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err = devm_gpiochip_add_data(dev, &ws16c48gpio->chip, ws16c48gpio);
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if (err) {
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