ath5k: Add AHB bus support.
AHB specific functions are now in ahb.c file. AHB bus is compiled in when CONFIG_ATHEROS_AR231X is set in kernel. All other platforms will use PCI bus. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Wojciech Dubowik <Wojciech.Dubowik@neratec.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Felix Fietkau
John W. Linville
Родитель
c31b5c9c80
Коммит
a0b907ee2a
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@ -1,10 +1,12 @@
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config ATH5K
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tristate "Atheros 5xxx wireless cards support"
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depends on PCI && MAC80211
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depends on (PCI || ATHEROS_AR231X) && MAC80211
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select MAC80211_LEDS
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select LEDS_CLASS
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select NEW_LEDS
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select AVERAGE
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select ATH5K_AHB if (ATHEROS_AR231X && !PCI)
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select ATH5K_PCI if (!ATHEROS_AR231X && PCI)
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---help---
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This module adds support for wireless adapters based on
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Atheros 5xxx chipset.
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@ -38,3 +40,16 @@ config ATH5K_DEBUG
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modprobe ath5k debug=0x00000400
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config ATH5K_AHB
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bool "Atheros 5xxx AHB bus support"
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depends on (ATHEROS_AR231X && !PCI)
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---help---
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This adds support for WiSoC type chipsets of the 5xxx Atheros
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family.
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config ATH5K_PCI
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bool "Atheros 5xxx PCI bus support"
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depends on (!ATHEROS_AR231X && PCI)
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---help---
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This adds support for PCI type chipsets of the 5xxx Atheros
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family.
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@ -15,5 +15,6 @@ ath5k-y += rfkill.o
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ath5k-y += ani.o
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ath5k-y += sysfs.o
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ath5k-$(CONFIG_ATH5K_DEBUG) += debug.o
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ath5k-y += pci.o
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ath5k-$(CONFIG_ATH5K_AHB) += ahb.o
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ath5k-$(CONFIG_ATH5K_PCI) += pci.o
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obj-$(CONFIG_ATH5K) += ath5k.o
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@ -0,0 +1,219 @@
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/*
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* Copyright (c) 2008-2009 Atheros Communications Inc.
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* Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <linux/nl80211.h>
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#include <linux/platform_device.h>
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#include <ar231x_platform.h>
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#include "ath5k.h"
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#include "debug.h"
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#include "base.h"
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#include "reg.h"
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#include "debug.h"
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/* return bus cachesize in 4B word units */
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static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz)
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{
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*csz = L1_CACHE_BYTES >> 2;
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}
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bool ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
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{
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struct ath5k_softc *sc = common->priv;
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struct platform_device *pdev = to_platform_device(sc->dev);
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struct ar231x_board_config *bcfg = pdev->dev.platform_data;
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u16 *eeprom, *eeprom_end;
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bcfg = pdev->dev.platform_data;
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eeprom = (u16 *) bcfg->radio;
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eeprom_end = ((void *) bcfg->config) + BOARD_CONFIG_BUFSZ;
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eeprom += off;
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if (eeprom > eeprom_end)
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return -EINVAL;
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*data = *eeprom;
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return 0;
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}
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int ath5k_hw_read_srev(struct ath5k_hw *ah)
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{
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struct ath5k_softc *sc = ah->ah_sc;
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struct platform_device *pdev = to_platform_device(sc->dev);
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struct ar231x_board_config *bcfg = pdev->dev.platform_data;
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ah->ah_mac_srev = bcfg->devid;
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return 0;
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}
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static const struct ath_bus_ops ath_ahb_bus_ops = {
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.ath_bus_type = ATH_AHB,
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.read_cachesize = ath5k_ahb_read_cachesize,
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.eeprom_read = ath5k_ahb_eeprom_read,
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};
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/*Initialization*/
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static int ath_ahb_probe(struct platform_device *pdev)
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{
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struct ar231x_board_config *bcfg = pdev->dev.platform_data;
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struct ath5k_softc *sc;
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struct ieee80211_hw *hw;
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struct resource *res;
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void __iomem *mem;
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int irq;
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int ret = 0;
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u32 reg;
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if (!pdev->dev.platform_data) {
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dev_err(&pdev->dev, "no platform data specified\n");
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ret = -EINVAL;
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goto err_out;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL) {
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dev_err(&pdev->dev, "no memory resource found\n");
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ret = -ENXIO;
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goto err_out;
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}
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mem = ioremap_nocache(res->start, res->end - res->start + 1);
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if (mem == NULL) {
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dev_err(&pdev->dev, "ioremap failed\n");
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ret = -ENOMEM;
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goto err_out;
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}
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res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (res == NULL) {
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dev_err(&pdev->dev, "no IRQ resource found\n");
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ret = -ENXIO;
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goto err_out;
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}
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irq = res->start;
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hw = ieee80211_alloc_hw(sizeof(struct ath5k_softc), &ath5k_hw_ops);
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if (hw == NULL) {
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dev_err(&pdev->dev, "no memory for ieee80211_hw\n");
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ret = -ENOMEM;
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goto err_out;
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}
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sc = hw->priv;
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sc->hw = hw;
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sc->dev = &pdev->dev;
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sc->iobase = mem;
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sc->irq = irq;
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sc->devid = bcfg->devid;
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if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
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/* Enable WMAC AHB arbitration */
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reg = __raw_readl((void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
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reg |= AR5K_AR2315_AHB_ARB_CTL_WLAN;
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__raw_writel(reg, (void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
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/* Enable global WMAC swapping */
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reg = __raw_readl((void __iomem *) AR5K_AR2315_BYTESWAP);
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reg |= AR5K_AR2315_BYTESWAP_WMAC;
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__raw_writel(reg, (void __iomem *) AR5K_AR2315_BYTESWAP);
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} else {
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/* Enable WMAC DMA access (assuming 5312 or 231x*/
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/* TODO: check other platforms */
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reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE);
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if (to_platform_device(sc->dev)->id == 0)
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reg |= AR5K_AR5312_ENABLE_WLAN0;
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else
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reg |= AR5K_AR5312_ENABLE_WLAN1;
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__raw_writel(reg, (void __iomem *) AR5K_AR5312_ENABLE);
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}
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ret = ath5k_init_softc(sc, &ath_ahb_bus_ops);
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if (ret != 0) {
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dev_err(&pdev->dev, "failed to attach device, err=%d\n", ret);
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ret = -ENODEV;
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goto err_free_hw;
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}
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platform_set_drvdata(pdev, hw);
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return 0;
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err_free_hw:
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ieee80211_free_hw(hw);
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platform_set_drvdata(pdev, NULL);
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err_out:
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return ret;
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}
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static int ath_ahb_remove(struct platform_device *pdev)
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{
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struct ar231x_board_config *bcfg = pdev->dev.platform_data;
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struct ieee80211_hw *hw = platform_get_drvdata(pdev);
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struct ath5k_softc *sc;
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u32 reg;
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if (!hw)
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return 0;
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sc = hw->priv;
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if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
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/* Disable WMAC AHB arbitration */
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reg = __raw_readl((void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
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reg &= ~AR5K_AR2315_AHB_ARB_CTL_WLAN;
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__raw_writel(reg, (void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
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} else {
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/*Stop DMA access */
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reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE);
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if (to_platform_device(sc->dev)->id == 0)
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reg &= ~AR5K_AR5312_ENABLE_WLAN0;
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else
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reg &= ~AR5K_AR5312_ENABLE_WLAN1;
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__raw_writel(reg, (void __iomem *) AR5K_AR5312_ENABLE);
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}
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ath5k_deinit_softc(sc);
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platform_set_drvdata(pdev, NULL);
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return 0;
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}
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static struct platform_driver ath_ahb_driver = {
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.probe = ath_ahb_probe,
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.remove = ath_ahb_remove,
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.driver = {
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.name = "ar231x-wmac",
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.owner = THIS_MODULE,
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},
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};
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static int __init
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ath5k_ahb_init(void)
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{
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return platform_driver_register(&ath_ahb_driver);
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}
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static void __exit
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ath5k_ahb_exit(void)
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{
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platform_driver_unregister(&ath_ahb_driver);
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}
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module_init(ath5k_ahb_init);
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module_exit(ath5k_ahb_exit);
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@ -319,12 +319,19 @@ struct ath5k_srev_name {
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#define AR5K_SREV_AR5311B 0x30 /* Spirit */
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#define AR5K_SREV_AR5211 0x40 /* Oahu */
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#define AR5K_SREV_AR5212 0x50 /* Venice */
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#define AR5K_SREV_AR5312_R2 0x52 /* AP31 */
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#define AR5K_SREV_AR5212_V4 0x54 /* ??? */
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#define AR5K_SREV_AR5213 0x55 /* ??? */
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#define AR5K_SREV_AR5312_R7 0x57 /* AP30 */
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#define AR5K_SREV_AR2313_R8 0x58 /* AP43 */
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#define AR5K_SREV_AR5213A 0x59 /* Hainan */
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#define AR5K_SREV_AR2413 0x78 /* Griffin lite */
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#define AR5K_SREV_AR2414 0x70 /* Griffin */
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#define AR5K_SREV_AR2315_R6 0x86 /* AP51-Light */
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#define AR5K_SREV_AR2315_R7 0x87 /* AP51-Full */
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#define AR5K_SREV_AR5424 0x90 /* Condor */
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#define AR5K_SREV_AR2317_R1 0x90 /* AP61-Light */
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#define AR5K_SREV_AR2317_R2 0x91 /* AP61-Full */
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#define AR5K_SREV_AR5413 0xa4 /* Eagle lite */
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#define AR5K_SREV_AR5414 0xa0 /* Eagle */
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#define AR5K_SREV_AR2415 0xb0 /* Talon */
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@ -1329,6 +1336,32 @@ static inline struct ath_regulatory *ath5k_hw_regulatory(struct ath5k_hw *ah)
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return &(ath5k_hw_common(ah)->regulatory);
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}
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#ifdef CONFIG_ATHEROS_AR231X
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#define AR5K_AR2315_PCI_BASE ((void __iomem *)0xb0100000)
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static inline void __iomem *ath5k_ahb_reg(struct ath5k_hw *ah, u16 reg)
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{
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/* On AR2315 and AR2317 the PCI clock domain registers
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* are outside of the WMAC register space */
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if (unlikely((reg >= 0x4000) && (reg < 0x5000) &&
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(ah->ah_mac_srev >= AR5K_SREV_AR2315_R6)))
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return AR5K_AR2315_PCI_BASE + reg;
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return ah->ah_iobase + reg;
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}
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static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
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{
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return __raw_readl(ath5k_ahb_reg(ah, reg));
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}
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static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
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{
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__raw_writel(val, ath5k_ahb_reg(ah, reg));
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}
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#else
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static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
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{
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return ioread32(ah->ah_iobase + reg);
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@ -1339,6 +1372,13 @@ static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
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iowrite32(val, ah->ah_iobase + reg);
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}
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#endif
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static inline enum ath_bus_type ath5k_get_bus_type(struct ath5k_hw *ah)
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{
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return ath5k_hw_common(ah)->bus_ops->ath_bus_type;
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}
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static inline void ath5k_read_cachesize(struct ath_common *common, int *csz)
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{
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common->bus_ops->read_cachesize(common, csz);
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@ -87,6 +87,15 @@ static void ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf);
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/* Known SREVs */
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static const struct ath5k_srev_name srev_names[] = {
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#ifdef CONFIG_ATHEROS_AR231X
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{ "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R2 },
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{ "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R7 },
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{ "2313", AR5K_VERSION_MAC, AR5K_SREV_AR2313_R8 },
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{ "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R6 },
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{ "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R7 },
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{ "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R1 },
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{ "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R2 },
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#else
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{ "5210", AR5K_VERSION_MAC, AR5K_SREV_AR5210 },
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{ "5311", AR5K_VERSION_MAC, AR5K_SREV_AR5311 },
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{ "5311A", AR5K_VERSION_MAC, AR5K_SREV_AR5311A },
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@ -105,6 +114,7 @@ static const struct ath5k_srev_name srev_names[] = {
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{ "5418", AR5K_VERSION_MAC, AR5K_SREV_AR5418 },
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{ "2425", AR5K_VERSION_MAC, AR5K_SREV_AR2425 },
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{ "2417", AR5K_VERSION_MAC, AR5K_SREV_AR2417 },
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#endif
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{ "xxxxx", AR5K_VERSION_MAC, AR5K_SREV_UNKNOWN },
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{ "5110", AR5K_VERSION_RAD, AR5K_SREV_RAD_5110 },
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{ "5111", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111 },
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@ -118,10 +128,12 @@ static const struct ath5k_srev_name srev_names[] = {
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{ "2112B", AR5K_VERSION_RAD, AR5K_SREV_RAD_2112B },
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{ "2413", AR5K_VERSION_RAD, AR5K_SREV_RAD_2413 },
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{ "5413", AR5K_VERSION_RAD, AR5K_SREV_RAD_5413 },
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{ "2316", AR5K_VERSION_RAD, AR5K_SREV_RAD_2316 },
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{ "2317", AR5K_VERSION_RAD, AR5K_SREV_RAD_2317 },
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{ "5424", AR5K_VERSION_RAD, AR5K_SREV_RAD_5424 },
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{ "5133", AR5K_VERSION_RAD, AR5K_SREV_RAD_5133 },
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#ifdef CONFIG_ATHEROS_AR231X
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{ "2316", AR5K_VERSION_RAD, AR5K_SREV_RAD_2316 },
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{ "2317", AR5K_VERSION_RAD, AR5K_SREV_RAD_2317 },
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#endif
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{ "xxxxx", AR5K_VERSION_RAD, AR5K_SREV_UNKNOWN },
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};
|
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|
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|
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|
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@ -161,14 +161,20 @@ int ath5k_init_leds(struct ath5k_softc *sc)
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{
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int ret = 0;
|
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struct ieee80211_hw *hw = sc->hw;
|
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#ifndef CONFIG_ATHEROS_AR231X
|
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struct pci_dev *pdev = sc->pdev;
|
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#endif
|
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char name[ATH5K_LED_MAX_NAME_LEN + 1];
|
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const struct pci_device_id *match;
|
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|
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if (!sc->pdev)
|
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return 0;
|
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|
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#ifdef CONFIG_ATHEROS_AR231X
|
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match = NULL;
|
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#else
|
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match = pci_match_id(&ath5k_led_devices[0], pdev);
|
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#endif
|
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if (match) {
|
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__set_bit(ATH_STAT_LEDSOFT, sc->status);
|
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sc->led_pin = ATH_PIN(match->driver_data);
|
||||
|
|
|
|||
|
|
@ -2562,3 +2562,28 @@
|
|||
*/
|
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#define AR5K_PHY_PDADC_TXPOWER_BASE 0xa280
|
||||
#define AR5K_PHY_PDADC_TXPOWER(_n) (AR5K_PHY_PDADC_TXPOWER_BASE + ((_n) << 2))
|
||||
|
||||
/*
|
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* Platform registers for WiSoC
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*/
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#define AR5K_AR5312_RESET 0xbc003020
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#define AR5K_AR5312_RESET_BB0_COLD 0x00000004
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#define AR5K_AR5312_RESET_BB1_COLD 0x00000200
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#define AR5K_AR5312_RESET_WMAC0 0x00002000
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#define AR5K_AR5312_RESET_BB0_WARM 0x00004000
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#define AR5K_AR5312_RESET_WMAC1 0x00020000
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#define AR5K_AR5312_RESET_BB1_WARM 0x00040000
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#define AR5K_AR5312_ENABLE 0xbc003080
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#define AR5K_AR5312_ENABLE_WLAN0 0x00000001
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#define AR5K_AR5312_ENABLE_WLAN1 0x00000008
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#define AR5K_AR2315_RESET 0xb1000004
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#define AR5K_AR2315_RESET_WMAC 0x00000001
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#define AR5K_AR2315_RESET_BB_WARM 0x00000002
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#define AR5K_AR2315_AHB_ARB_CTL 0xb1000008
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#define AR5K_AR2315_AHB_ARB_CTL_WLAN 0x00000002
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#define AR5K_AR2315_BYTESWAP 0xb100000c
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#define AR5K_AR2315_BYTESWAP_WMAC 0x00000002
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