SoC changes for omaps for v4.15 merge window that are mostly non-urgent
fixes and clean-up in preparation for dropping more platform data later on: - Fix am33xx/am437x MMC address space offsets - Fix overwriting clkctrl and modulemode values when dts data is used - Drop unused platform init code for omap_init_hdq - Drop unused struct omap_hwmod_mux_info - Remove duplicate define for dra722 es1.0 silicon revision - Add support for dra71x es2.1 - Make omap_dma_dev_info __initdata - A series of fixes for Coccinelle found issues -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlng6dwRHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXNHxw//U61yomGBb5cEjDnRwB0cYVkPWSFGgUvB HW125O5EWmN8+IHzsd9SHk6jrQ35LcNknQzbiG1F/E9X5C+xtnUGed3B/xHxeTl4 80HCYSBdZv4CnDJPK1JzYxKPSsfR6caTg57cWcxqs8mCjs7qTjUKCbqOouW9SyEh Vjd0QxTBbB8FIGn367WcZhacmbRikp549M//WC2VQUMln9AWzFaCXSuP1Od7jb+p juau0hwgmgH0aDh4T8jqp3xEm3nIqAmjCgPp9RQiAmmNMDVWd/SERQ4nVoylFiaX R25l7cZUF9hSC0TJSWxXVbSgnrObVId4jpi/kIOrQwPmJq1VdCS8Egv3jujULZjG dPeyvcOGWSwl7uiA5j13vtgQZgkUIG4yIlJul5IlSGgwBvv25zG6ot6ErC0h/Zli MwJ0UCGXet4PvX1lZLw5QHWHuUaWAL7qahOM0dZn7ki9xtJmMi125eMU9uBDpRVR aQAZxuiw58TdHzK/EHm5K3HSOSWj2AZKJnk52BWTB8F3AY4d/j5ZubHya532BSzh P1AMfvdrxZ7RpEWH92rhcC5JRtPFEpKYuUakdjV6mnWgNdQyDICQvIp5b3gC4Y1L wL3AdFeYFT/klK8UCwNN/q2JINBntbWPM2//YMcEM28IbZgSM0FVIwX+4bImjaL+ vq0zTJrWWjg= =oSR0 -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.15/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Pull "OMAP soc changes for omaps for v4.15 merge window" from Tony Lindgren: SoC changes for omaps for v4.15 merge window that are mostly non-urgent fixes and clean-up in preparation for dropping more platform data later on: - Fix am33xx/am437x MMC address space offsets - Fix overwriting clkctrl and modulemode values when dts data is used - Drop unused platform init code for omap_init_hdq - Drop unused struct omap_hwmod_mux_info - Remove duplicate define for dra722 es1.0 silicon revision - Add support for dra71x es2.1 - Make omap_dma_dev_info __initdata - A series of fixes for Coccinelle found issues * tag 'omap-for-v4.15/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP: Fix typos in two comment lines in _omap_dm_timer_request() ARM: OMAP: Use kcalloc() in omap_system_dma_probe() ARM: OMAP: Improve a size determination in two functions ARM: OMAP: Delete an error message for a failed memory allocation in two functions ARM: OMAP2+: make omap_dma_dev_info __initdata ARM: DRA722: Add support for DRA71x Silicon Rev 2.1 ARM: DRA722: remove redundant definition of 1.0 device ARM: OMAP2+: Drop unused omap_hwmod_mux_info ARM: OMAP2+: Drop unused omap_init_hdq ARM: OMAP2+: Fix overwriting of clkctrl and modulemode values ARM: OMAP2+: Fix MMC address space mismatch for am33xx and am43xx
This commit is contained in:
Arnd Bergmann
Коммит
a1bc4e7cee
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@ -223,7 +223,7 @@ static struct omap_system_dma_plat_info dma_plat_info __initdata = {
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.dma_read = dma_read,
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};
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static struct platform_device_info omap_dma_dev_info = {
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static struct platform_device_info omap_dma_dev_info __initdata = {
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.name = "omap-dma-engine",
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.id = -1,
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.dma_mask = DMA_BIT_MASK(32),
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@ -75,25 +75,3 @@ int omap_hdq1w_reset(struct omap_hwmod *oh)
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return 0;
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}
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#ifndef CONFIG_OF
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static int __init omap_init_hdq(void)
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{
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int id = -1;
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struct platform_device *pdev;
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struct omap_hwmod *oh;
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char *oh_name = "hdq1w";
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char *devname = "omap_hdq";
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oh = omap_hwmod_lookup(oh_name);
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if (!oh)
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return 0;
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pdev = omap_device_build(devname, id, oh, NULL, 0);
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WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
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devname, oh->name);
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return 0;
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}
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omap_arch_initcall(omap_init_hdq);
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#endif
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@ -693,9 +693,12 @@ void __init dra7xxx_check_revision(void)
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omap_revision = DRA722_REV_ES1_0;
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break;
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case 1:
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default:
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omap_revision = DRA722_REV_ES2_0;
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break;
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case 2:
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default:
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omap_revision = DRA722_REV_ES2_1;
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break;
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}
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break;
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@ -993,6 +993,34 @@ static int _enable_clocks(struct omap_hwmod *oh)
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return 0;
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}
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/**
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* _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
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* @oh: struct omap_hwmod *
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*/
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static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
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{
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if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
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return true;
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return false;
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}
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/**
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* _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
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* @oh: struct omap_hwmod *
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*/
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static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
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{
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if (oh->prcm.omap4.clkctrl_offs)
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return true;
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if (!oh->prcm.omap4.clkctrl_offs &&
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oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
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return true;
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return false;
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}
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/**
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* _disable_clocks - disable hwmod main clock and interface clocks
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* @oh: struct omap_hwmod *
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@ -1030,7 +1058,8 @@ static int _disable_clocks(struct omap_hwmod *oh)
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*/
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static void _omap4_enable_module(struct omap_hwmod *oh)
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{
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if (!oh->clkdm || !oh->prcm.omap4.modulemode)
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if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
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_omap4_clkctrl_managed_by_clkfwk(oh))
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return;
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pr_debug("omap_hwmod: %s: %s: %d\n",
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@ -1061,8 +1090,10 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
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if (oh->flags & HWMOD_NO_IDLEST)
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return 0;
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if (!oh->prcm.omap4.clkctrl_offs &&
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!(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
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if (_omap4_clkctrl_managed_by_clkfwk(oh))
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return 0;
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if (!_omap4_has_clkctrl_clock(oh))
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return 0;
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return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
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@ -1847,7 +1878,8 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
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{
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int v;
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if (!oh->clkdm || !oh->prcm.omap4.modulemode)
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if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
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_omap4_clkctrl_managed_by_clkfwk(oh))
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return -EINVAL;
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/*
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@ -2829,8 +2861,10 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
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if (!_find_mpu_rt_port(oh))
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return 0;
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if (!oh->prcm.omap4.clkctrl_offs &&
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!(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
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if (_omap4_clkctrl_managed_by_clkfwk(oh))
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return 0;
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if (!_omap4_has_clkctrl_clock(oh))
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return 0;
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/* XXX check module SIDLEMODE, hardreset status */
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@ -2986,8 +3020,7 @@ static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
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if (!oh)
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return -EINVAL;
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oh->prcm.omap4.clkctrl_offs = 0;
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oh->prcm.omap4.modulemode = 0;
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oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
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return 0;
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}
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@ -21,7 +21,6 @@
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*
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* To do:
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* - add interconnect error log structures
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* - add pinmuxing
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* - init_conn_id_bit (CONNID_BIT_VECTOR)
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* - implement default hwmod SMS/SDRC flags?
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* - move Linux-specific data ("non-ROM data") out
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@ -150,22 +149,6 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;
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#define DEBUG_AM33XXUART1_FLAGS DEBUG_OMAPUART_FLAGS
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#endif
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/**
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* struct omap_hwmod_mux_info - hwmod specific mux configuration
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* @pads: array of omap_device_pad entries
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* @nr_pads: number of omap_device_pad entries
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*
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* Note that this is currently built during init as needed.
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*/
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struct omap_hwmod_mux_info {
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int nr_pads;
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struct omap_device_pad *pads;
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int nr_pads_dynamic;
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struct omap_device_pad **pads_dynamic;
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int *irqs;
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bool enabled;
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};
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/**
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* struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
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* @name: name of the IRQ channel (module local name)
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@ -446,9 +429,12 @@ struct omap_hwmod_omap2_prcm {
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* HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET: Some IP blocks have a valid CLKCTRL
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* offset of zero; this flag bit should be set in those cases to
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* distinguish from hwmods that have no clkctrl offset.
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* HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK: Module clockctrl clock is managed
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* by the common clock framework and not hwmod.
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*/
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#define HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT (1 << 0)
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#define HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET (1 << 1)
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#define HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK (1 << 2)
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/**
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* struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
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@ -670,7 +656,6 @@ struct omap_hwmod {
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const char *name;
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struct omap_hwmod_class *class;
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struct omap_device *od;
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struct omap_hwmod_mux_info *mux;
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struct omap_hwmod_irq_info *mpu_irqs;
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struct omap_hwmod_dma_info *sdma_reqs;
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struct omap_hwmod_rst_info *rst_lines;
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@ -286,56 +286,26 @@ struct omap_hwmod_ocp_if am33xx_l4_ls__mcasp1 = {
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};
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/* l4 ls -> mmc0 */
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static struct omap_hwmod_addr_space am33xx_mmc0_addr_space[] = {
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{
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.pa_start = 0x48060100,
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.pa_end = 0x48060100 + SZ_4K - 1,
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.flags = ADDR_TYPE_RT,
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},
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{ }
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};
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struct omap_hwmod_ocp_if am33xx_l4_ls__mmc0 = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am33xx_mmc0_hwmod,
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.clk = "l4ls_gclk",
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.addr = am33xx_mmc0_addr_space,
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.user = OCP_USER_MPU,
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};
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/* l4 ls -> mmc1 */
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static struct omap_hwmod_addr_space am33xx_mmc1_addr_space[] = {
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{
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.pa_start = 0x481d8100,
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.pa_end = 0x481d8100 + SZ_4K - 1,
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.flags = ADDR_TYPE_RT,
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},
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{ }
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};
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struct omap_hwmod_ocp_if am33xx_l4_ls__mmc1 = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am33xx_mmc1_hwmod,
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.clk = "l4ls_gclk",
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.addr = am33xx_mmc1_addr_space,
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.user = OCP_USER_MPU,
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};
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/* l3 s -> mmc2 */
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static struct omap_hwmod_addr_space am33xx_mmc2_addr_space[] = {
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{
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.pa_start = 0x47810100,
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.pa_end = 0x47810100 + SZ_64K - 1,
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.flags = ADDR_TYPE_RT,
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},
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{ }
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};
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struct omap_hwmod_ocp_if am33xx_l3_s__mmc2 = {
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.master = &am33xx_l3_s_hwmod,
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.slave = &am33xx_mmc2_hwmod,
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.clk = "l3s_gclk",
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.addr = am33xx_mmc2_addr_space,
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.user = OCP_USER_MPU,
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};
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@ -778,9 +778,9 @@ struct omap_hwmod am33xx_mcasp1_hwmod = {
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/* 'mmc' class */
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static struct omap_hwmod_class_sysconfig am33xx_mmc_sysc = {
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.rev_offs = 0x1fc,
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.sysc_offs = 0x10,
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.syss_offs = 0x14,
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.rev_offs = 0x2fc,
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.sysc_offs = 0x110,
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.syss_offs = 0x114,
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.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
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SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
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SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
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@ -395,8 +395,8 @@ IS_OMAP_TYPE(3430, 0x3430)
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#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
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#define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))
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#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
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#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
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#define DRA722_REV_ES2_0 (DRA7XX_CLASS | (0x22 << 16) | (0x20 << 8))
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#define DRA722_REV_ES2_1 (DRA7XX_CLASS | (0x22 << 16) | (0x21 << 8))
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void omap2xxx_check_revision(void);
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void omap3xxx_check_revision(void);
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@ -1316,16 +1316,14 @@ static int omap_system_dma_probe(struct platform_device *pdev)
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enable_1510_mode = d->dev_caps & ENABLE_1510_MODE;
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dma_chan = devm_kcalloc(&pdev->dev, dma_lch_count,
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sizeof(struct omap_dma_lch), GFP_KERNEL);
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if (!dma_chan) {
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dev_err(&pdev->dev, "%s: kzalloc fail\n", __func__);
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sizeof(*dma_chan), GFP_KERNEL);
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if (!dma_chan)
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return -ENOMEM;
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}
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if (dma_omap2plus()) {
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dma_linked_lch = kzalloc(sizeof(struct dma_link_info) *
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dma_lch_count, GFP_KERNEL);
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dma_linked_lch = kcalloc(dma_lch_count,
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sizeof(*dma_linked_lch),
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GFP_KERNEL);
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if (!dma_linked_lch) {
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ret = -ENOMEM;
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goto exit_dma_lch_fail;
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|
|
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@ -254,8 +254,8 @@ static struct omap_dm_timer *_omap_dm_timer_request(int req_type, void *data)
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if (cap == (t->capability & cap)) {
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/*
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* If timer is not NULL, we have already found
|
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* one timer but it was not an exact match
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* because it had more capabilites that what
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* one timer. But it was not an exact match
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* because it had more capabilities than what
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* was required. Therefore, unreserve the last
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* timer found and see if this one is a better
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* match.
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@ -857,11 +857,9 @@ static int omap_dm_timer_probe(struct platform_device *pdev)
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return -ENODEV;
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}
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timer = devm_kzalloc(dev, sizeof(struct omap_dm_timer), GFP_KERNEL);
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if (!timer) {
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dev_err(dev, "%s: memory alloc failed!\n", __func__);
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timer = devm_kzalloc(dev, sizeof(*timer), GFP_KERNEL);
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if (!timer)
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return -ENOMEM;
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}
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timer->fclk = ERR_PTR(-ENODEV);
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timer->io_base = devm_ioremap_resource(dev, mem);
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