mfd: max77686: Add Maxim 77802 PMIC support
Maxim MAX77802 is a power management chip that contains 10 high efficiency Buck regulators, 32 Low-dropout (LDO) regulators used to power up application processors and peripherals, a 2-channel 32kHz clock outputs, a Real-Time-Clock (RTC) and a I2C interface to program the individual regulators, clocks outputs and the RTC. This patch adds support for MAX77802 to the MAX77686 driver and is based on a driver added to the Chrome OS kernel 3.8 by Simon Glass. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Родитель
ad83533a63
Коммит
a259f3896a
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@ -380,15 +380,15 @@ config MFD_MAX14577
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of the device.
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config MFD_MAX77686
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bool "Maxim Semiconductor MAX77686 PMIC Support"
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bool "Maxim Semiconductor MAX77686/802 PMIC Support"
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depends on I2C=y
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select MFD_CORE
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select REGMAP_I2C
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select REGMAP_IRQ
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select IRQ_DOMAIN
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help
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Say yes here to add support for Maxim Semiconductor MAX77686.
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This is a Power Management IC with RTC on chip.
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Say yes here to add support for Maxim Semiconductor MAX77686 and
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MAX77802 which are Power Management IC with an RTC on chip.
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This driver provides common support for accessing the device;
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additional drivers must be enabled in order to use the functionality
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of the device.
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@ -1,5 +1,5 @@
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/*
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* max77686.c - mfd core driver for the Maxim 77686
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* max77686.c - mfd core driver for the Maxim 77686/802
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*
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* Copyright (C) 2012 Samsung Electronics
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* Chiwoong Byun <woong.byun@smasung.com>
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@ -43,6 +43,74 @@ static const struct mfd_cell max77686_devs[] = {
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{ .name = "max77686-clk", },
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};
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static const struct mfd_cell max77802_devs[] = {
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{ .name = "max77802-pmic", },
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{ .name = "max77802-clk", },
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{ .name = "max77802-rtc", },
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};
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static bool max77802_pmic_is_accessible_reg(struct device *dev,
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unsigned int reg)
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{
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return (reg >= MAX77802_REG_DEVICE_ID && reg < MAX77802_REG_PMIC_END);
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}
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static bool max77802_rtc_is_accessible_reg(struct device *dev,
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unsigned int reg)
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{
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return (reg >= MAX77802_RTC_INT && reg < MAX77802_RTC_END);
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}
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static bool max77802_is_accessible_reg(struct device *dev, unsigned int reg)
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{
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return (max77802_pmic_is_accessible_reg(dev, reg) ||
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max77802_rtc_is_accessible_reg(dev, reg));
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}
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static bool max77802_pmic_is_precious_reg(struct device *dev, unsigned int reg)
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{
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return (reg == MAX77802_REG_INTSRC || reg == MAX77802_REG_INT1 ||
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reg == MAX77802_REG_INT2);
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}
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static bool max77802_rtc_is_precious_reg(struct device *dev, unsigned int reg)
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{
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return (reg == MAX77802_RTC_INT ||
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reg == MAX77802_RTC_UPDATE0 ||
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reg == MAX77802_RTC_UPDATE1);
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}
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static bool max77802_is_precious_reg(struct device *dev, unsigned int reg)
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{
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return (max77802_pmic_is_precious_reg(dev, reg) ||
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max77802_rtc_is_precious_reg(dev, reg));
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}
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static bool max77802_pmic_is_volatile_reg(struct device *dev, unsigned int reg)
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{
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return (max77802_is_precious_reg(dev, reg) ||
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reg == MAX77802_REG_STATUS1 || reg == MAX77802_REG_STATUS2 ||
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reg == MAX77802_REG_PWRON);
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}
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static bool max77802_rtc_is_volatile_reg(struct device *dev, unsigned int reg)
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{
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return (max77802_rtc_is_precious_reg(dev, reg) ||
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reg == MAX77802_RTC_SEC ||
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reg == MAX77802_RTC_MIN ||
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reg == MAX77802_RTC_HOUR ||
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reg == MAX77802_RTC_WEEKDAY ||
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reg == MAX77802_RTC_MONTH ||
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reg == MAX77802_RTC_YEAR ||
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reg == MAX77802_RTC_DATE);
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}
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static bool max77802_is_volatile_reg(struct device *dev, unsigned int reg)
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{
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return (max77802_pmic_is_volatile_reg(dev, reg) ||
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max77802_rtc_is_volatile_reg(dev, reg));
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}
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static struct regmap_config max77686_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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@ -53,6 +121,17 @@ static struct regmap_config max77686_rtc_regmap_config = {
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.val_bits = 8,
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};
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static struct regmap_config max77802_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.writeable_reg = max77802_is_accessible_reg,
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.readable_reg = max77802_is_accessible_reg,
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.precious_reg = max77802_is_precious_reg,
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.volatile_reg = max77802_is_volatile_reg,
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.name = "max77802-pmic",
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.cache_type = REGCACHE_RBTREE,
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};
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static const struct regmap_irq max77686_irqs[] = {
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/* INT1 interrupts */
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{ .reg_offset = 0, .mask = MAX77686_INT1_PWRONF_MSK, },
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@ -96,9 +175,34 @@ static const struct regmap_irq_chip max77686_rtc_irq_chip = {
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.num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
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};
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static const struct regmap_irq_chip max77802_irq_chip = {
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.name = "max77802-pmic",
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.status_base = MAX77802_REG_INT1,
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.mask_base = MAX77802_REG_INT1MSK,
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.num_regs = 2,
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.irqs = max77686_irqs, /* same masks as 77686 */
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.num_irqs = ARRAY_SIZE(max77686_irqs),
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};
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static const struct regmap_irq_chip max77802_rtc_irq_chip = {
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.name = "max77802-rtc",
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.status_base = MAX77802_RTC_INT,
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.mask_base = MAX77802_RTC_INTM,
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.num_regs = 1,
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.irqs = max77686_rtc_irqs, /* same masks as 77686 */
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.num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
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};
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static const struct of_device_id max77686_pmic_dt_match[] = {
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{.compatible = "maxim,max77686", .data = NULL},
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{},
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{
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.compatible = "maxim,max77686",
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.data = (void *)TYPE_MAX77686,
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},
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{
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.compatible = "maxim,max77802",
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.data = (void *)TYPE_MAX77802,
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},
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{ },
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};
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static struct max77686_platform_data *max77686_i2c_parse_dt_pdata(struct device
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@ -119,8 +223,15 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
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{
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struct max77686_dev *max77686 = NULL;
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struct max77686_platform_data *pdata = dev_get_platdata(&i2c->dev);
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const struct of_device_id *match;
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unsigned int data;
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int ret = 0;
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const struct regmap_config *config;
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const struct regmap_irq_chip *irq_chip;
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const struct regmap_irq_chip *rtc_irq_chip;
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struct regmap **rtc_regmap;
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const struct mfd_cell *cells;
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int n_devs;
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if (IS_ENABLED(CONFIG_OF) && i2c->dev.of_node && !pdata)
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pdata = max77686_i2c_parse_dt_pdata(&i2c->dev);
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@ -135,15 +246,40 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
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if (!max77686)
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return -ENOMEM;
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if (i2c->dev.of_node) {
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match = of_match_node(max77686_pmic_dt_match, i2c->dev.of_node);
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if (!match)
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return -EINVAL;
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max77686->type = (int)match->data;
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} else {
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max77686->type = id->driver_data;
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}
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i2c_set_clientdata(i2c, max77686);
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max77686->dev = &i2c->dev;
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max77686->i2c = i2c;
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max77686->type = id->driver_data;
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max77686->wakeup = pdata->wakeup;
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max77686->irq = i2c->irq;
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max77686->regmap = devm_regmap_init_i2c(i2c, &max77686_regmap_config);
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if (max77686->type == TYPE_MAX77686) {
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config = &max77686_regmap_config;
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irq_chip = &max77686_irq_chip;
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rtc_irq_chip = &max77686_rtc_irq_chip;
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rtc_regmap = &max77686->rtc_regmap;
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cells = max77686_devs;
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n_devs = ARRAY_SIZE(max77686_devs);
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} else {
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config = &max77802_regmap_config;
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irq_chip = &max77802_irq_chip;
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rtc_irq_chip = &max77802_rtc_irq_chip;
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rtc_regmap = &max77686->regmap;
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cells = max77802_devs;
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n_devs = ARRAY_SIZE(max77802_devs);
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}
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max77686->regmap = devm_regmap_init_i2c(i2c, config);
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if (IS_ERR(max77686->regmap)) {
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ret = PTR_ERR(max77686->regmap);
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dev_err(max77686->dev, "Failed to allocate register map: %d\n",
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@ -158,41 +294,46 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
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return -ENODEV;
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}
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max77686->rtc = i2c_new_dummy(i2c->adapter, I2C_ADDR_RTC);
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if (!max77686->rtc) {
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dev_err(max77686->dev, "Failed to allocate I2C device for RTC\n");
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return -ENODEV;
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}
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i2c_set_clientdata(max77686->rtc, max77686);
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if (max77686->type == TYPE_MAX77686) {
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max77686->rtc = i2c_new_dummy(i2c->adapter, I2C_ADDR_RTC);
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if (!max77686->rtc) {
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dev_err(max77686->dev,
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"Failed to allocate I2C device for RTC\n");
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return -ENODEV;
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}
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i2c_set_clientdata(max77686->rtc, max77686);
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max77686->rtc_regmap = devm_regmap_init_i2c(max77686->rtc,
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&max77686_rtc_regmap_config);
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if (IS_ERR(max77686->rtc_regmap)) {
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ret = PTR_ERR(max77686->rtc_regmap);
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dev_err(max77686->dev, "failed to allocate RTC regmap: %d\n",
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ret);
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goto err_unregister_i2c;
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max77686->rtc_regmap =
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devm_regmap_init_i2c(max77686->rtc,
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&max77686_rtc_regmap_config);
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if (IS_ERR(max77686->rtc_regmap)) {
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ret = PTR_ERR(max77686->rtc_regmap);
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dev_err(max77686->dev,
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"failed to allocate RTC regmap: %d\n",
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ret);
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goto err_unregister_i2c;
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}
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}
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ret = regmap_add_irq_chip(max77686->regmap, max77686->irq,
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IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
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IRQF_SHARED, 0, &max77686_irq_chip,
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IRQF_SHARED, 0, irq_chip,
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&max77686->irq_data);
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if (ret) {
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dev_err(&i2c->dev, "failed to add PMIC irq chip: %d\n", ret);
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goto err_unregister_i2c;
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}
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ret = regmap_add_irq_chip(max77686->rtc_regmap, max77686->irq,
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ret = regmap_add_irq_chip(*rtc_regmap, max77686->irq,
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IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
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IRQF_SHARED, 0, &max77686_rtc_irq_chip,
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IRQF_SHARED, 0, rtc_irq_chip,
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&max77686->rtc_irq_data);
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if (ret) {
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dev_err(&i2c->dev, "failed to add RTC irq chip: %d\n", ret);
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goto err_del_irqc;
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}
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ret = mfd_add_devices(max77686->dev, -1, max77686_devs,
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ARRAY_SIZE(max77686_devs), NULL, 0, NULL);
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ret = mfd_add_devices(max77686->dev, -1, cells, n_devs, NULL, 0, NULL);
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if (ret < 0) {
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dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret);
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goto err_del_rtc_irqc;
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@ -205,7 +346,8 @@ err_del_rtc_irqc:
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err_del_irqc:
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regmap_del_irq_chip(max77686->irq, max77686->irq_data);
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err_unregister_i2c:
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i2c_unregister_device(max77686->rtc);
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if (max77686->type == TYPE_MAX77686)
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i2c_unregister_device(max77686->rtc);
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return ret;
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}
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@ -219,7 +361,8 @@ static int max77686_i2c_remove(struct i2c_client *i2c)
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regmap_del_irq_chip(max77686->irq, max77686->rtc_irq_data);
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regmap_del_irq_chip(max77686->irq, max77686->irq_data);
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i2c_unregister_device(max77686->rtc);
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if (max77686->type == TYPE_MAX77686)
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i2c_unregister_device(max77686->rtc);
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return 0;
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}
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@ -294,6 +437,6 @@ static void __exit max77686_i2c_exit(void)
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}
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module_exit(max77686_i2c_exit);
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MODULE_DESCRIPTION("MAXIM 77686 multi-function core driver");
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MODULE_DESCRIPTION("MAXIM 77686/802 multi-function core driver");
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MODULE_AUTHOR("Chiwoong Byun <woong.byun@samsung.com>");
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MODULE_LICENSE("GPL");
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@ -1,5 +1,5 @@
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/*
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* max77686-private.h - Voltage regulator driver for the Maxim 77686
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* max77686-private.h - Voltage regulator driver for the Maxim 77686/802
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*
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* Copyright (C) 2012 Samsung Electrnoics
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* Chiwoong Byun <woong.byun@samsung.com>
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@ -28,6 +28,7 @@
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#define MAX77686_REG_INVALID (0xff)
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/* MAX77686 PMIC registers */
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enum max77686_pmic_reg {
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MAX77686_REG_DEVICE_ID = 0x00,
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MAX77686_REG_INTSRC = 0x01,
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@ -181,6 +182,210 @@ enum max77686_rtc_reg {
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MAX77686_ALARM2_DATE = 0x1B,
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};
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/* MAX77802 PMIC registers */
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enum max77802_pmic_reg {
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MAX77802_REG_DEVICE_ID = 0x00,
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MAX77802_REG_INTSRC = 0x01,
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MAX77802_REG_INT1 = 0x02,
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MAX77802_REG_INT2 = 0x03,
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MAX77802_REG_INT1MSK = 0x04,
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MAX77802_REG_INT2MSK = 0x05,
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MAX77802_REG_STATUS1 = 0x06,
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MAX77802_REG_STATUS2 = 0x07,
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MAX77802_REG_PWRON = 0x08,
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/* Reserved: 0x09 */
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MAX77802_REG_MRSTB = 0x0A,
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MAX77802_REG_EPWRHOLD = 0x0B,
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/* Reserved: 0x0C-0x0D */
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MAX77802_REG_BOOSTCTRL = 0x0E,
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MAX77802_REG_BOOSTOUT = 0x0F,
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MAX77802_REG_BUCK1CTRL = 0x10,
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MAX77802_REG_BUCK1DVS1 = 0x11,
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MAX77802_REG_BUCK1DVS2 = 0x12,
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MAX77802_REG_BUCK1DVS3 = 0x13,
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MAX77802_REG_BUCK1DVS4 = 0x14,
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MAX77802_REG_BUCK1DVS5 = 0x15,
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MAX77802_REG_BUCK1DVS6 = 0x16,
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MAX77802_REG_BUCK1DVS7 = 0x17,
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MAX77802_REG_BUCK1DVS8 = 0x18,
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/* Reserved: 0x19 */
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MAX77802_REG_BUCK2CTRL1 = 0x1A,
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MAX77802_REG_BUCK2CTRL2 = 0x1B,
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MAX77802_REG_BUCK2PHTRAN = 0x1C,
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MAX77802_REG_BUCK2DVS1 = 0x1D,
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MAX77802_REG_BUCK2DVS2 = 0x1E,
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MAX77802_REG_BUCK2DVS3 = 0x1F,
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MAX77802_REG_BUCK2DVS4 = 0x20,
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MAX77802_REG_BUCK2DVS5 = 0x21,
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MAX77802_REG_BUCK2DVS6 = 0x22,
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MAX77802_REG_BUCK2DVS7 = 0x23,
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MAX77802_REG_BUCK2DVS8 = 0x24,
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/* Reserved: 0x25-0x26 */
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MAX77802_REG_BUCK3CTRL1 = 0x27,
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MAX77802_REG_BUCK3DVS1 = 0x28,
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MAX77802_REG_BUCK3DVS2 = 0x29,
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MAX77802_REG_BUCK3DVS3 = 0x2A,
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MAX77802_REG_BUCK3DVS4 = 0x2B,
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MAX77802_REG_BUCK3DVS5 = 0x2C,
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MAX77802_REG_BUCK3DVS6 = 0x2D,
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MAX77802_REG_BUCK3DVS7 = 0x2E,
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MAX77802_REG_BUCK3DVS8 = 0x2F,
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/* Reserved: 0x30-0x36 */
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MAX77802_REG_BUCK4CTRL1 = 0x37,
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MAX77802_REG_BUCK4DVS1 = 0x38,
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MAX77802_REG_BUCK4DVS2 = 0x39,
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MAX77802_REG_BUCK4DVS3 = 0x3A,
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MAX77802_REG_BUCK4DVS4 = 0x3B,
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MAX77802_REG_BUCK4DVS5 = 0x3C,
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MAX77802_REG_BUCK4DVS6 = 0x3D,
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||||
MAX77802_REG_BUCK4DVS7 = 0x3E,
|
||||
MAX77802_REG_BUCK4DVS8 = 0x3F,
|
||||
/* Reserved: 0x40 */
|
||||
MAX77802_REG_BUCK5CTRL = 0x41,
|
||||
MAX77802_REG_BUCK5OUT = 0x42,
|
||||
/* Reserved: 0x43 */
|
||||
MAX77802_REG_BUCK6CTRL = 0x44,
|
||||
MAX77802_REG_BUCK6DVS1 = 0x45,
|
||||
MAX77802_REG_BUCK6DVS2 = 0x46,
|
||||
MAX77802_REG_BUCK6DVS3 = 0x47,
|
||||
MAX77802_REG_BUCK6DVS4 = 0x48,
|
||||
MAX77802_REG_BUCK6DVS5 = 0x49,
|
||||
MAX77802_REG_BUCK6DVS6 = 0x4A,
|
||||
MAX77802_REG_BUCK6DVS7 = 0x4B,
|
||||
MAX77802_REG_BUCK6DVS8 = 0x4C,
|
||||
/* Reserved: 0x4D */
|
||||
MAX77802_REG_BUCK7CTRL = 0x4E,
|
||||
MAX77802_REG_BUCK7OUT = 0x4F,
|
||||
/* Reserved: 0x50 */
|
||||
MAX77802_REG_BUCK8CTRL = 0x51,
|
||||
MAX77802_REG_BUCK8OUT = 0x52,
|
||||
/* Reserved: 0x53 */
|
||||
MAX77802_REG_BUCK9CTRL = 0x54,
|
||||
MAX77802_REG_BUCK9OUT = 0x55,
|
||||
/* Reserved: 0x56 */
|
||||
MAX77802_REG_BUCK10CTRL = 0x57,
|
||||
MAX77802_REG_BUCK10OUT = 0x58,
|
||||
|
||||
/* Reserved: 0x59-0x5F */
|
||||
|
||||
MAX77802_REG_LDO1CTRL1 = 0x60,
|
||||
MAX77802_REG_LDO2CTRL1 = 0x61,
|
||||
MAX77802_REG_LDO3CTRL1 = 0x62,
|
||||
MAX77802_REG_LDO4CTRL1 = 0x63,
|
||||
MAX77802_REG_LDO5CTRL1 = 0x64,
|
||||
MAX77802_REG_LDO6CTRL1 = 0x65,
|
||||
MAX77802_REG_LDO7CTRL1 = 0x66,
|
||||
MAX77802_REG_LDO8CTRL1 = 0x67,
|
||||
MAX77802_REG_LDO9CTRL1 = 0x68,
|
||||
MAX77802_REG_LDO10CTRL1 = 0x69,
|
||||
MAX77802_REG_LDO11CTRL1 = 0x6A,
|
||||
MAX77802_REG_LDO12CTRL1 = 0x6B,
|
||||
MAX77802_REG_LDO13CTRL1 = 0x6C,
|
||||
MAX77802_REG_LDO14CTRL1 = 0x6D,
|
||||
MAX77802_REG_LDO15CTRL1 = 0x6E,
|
||||
/* Reserved: 0x6F */
|
||||
MAX77802_REG_LDO17CTRL1 = 0x70,
|
||||
MAX77802_REG_LDO18CTRL1 = 0x71,
|
||||
MAX77802_REG_LDO19CTRL1 = 0x72,
|
||||
MAX77802_REG_LDO20CTRL1 = 0x73,
|
||||
MAX77802_REG_LDO21CTRL1 = 0x74,
|
||||
MAX77802_REG_LDO22CTRL1 = 0x75,
|
||||
MAX77802_REG_LDO23CTRL1 = 0x76,
|
||||
MAX77802_REG_LDO24CTRL1 = 0x77,
|
||||
MAX77802_REG_LDO25CTRL1 = 0x78,
|
||||
MAX77802_REG_LDO26CTRL1 = 0x79,
|
||||
MAX77802_REG_LDO27CTRL1 = 0x7A,
|
||||
MAX77802_REG_LDO28CTRL1 = 0x7B,
|
||||
MAX77802_REG_LDO29CTRL1 = 0x7C,
|
||||
MAX77802_REG_LDO30CTRL1 = 0x7D,
|
||||
/* Reserved: 0x7E */
|
||||
MAX77802_REG_LDO32CTRL1 = 0x7F,
|
||||
MAX77802_REG_LDO33CTRL1 = 0x80,
|
||||
MAX77802_REG_LDO34CTRL1 = 0x81,
|
||||
MAX77802_REG_LDO35CTRL1 = 0x82,
|
||||
/* Reserved: 0x83-0x8F */
|
||||
MAX77802_REG_LDO1CTRL2 = 0x90,
|
||||
MAX77802_REG_LDO2CTRL2 = 0x91,
|
||||
MAX77802_REG_LDO3CTRL2 = 0x92,
|
||||
MAX77802_REG_LDO4CTRL2 = 0x93,
|
||||
MAX77802_REG_LDO5CTRL2 = 0x94,
|
||||
MAX77802_REG_LDO6CTRL2 = 0x95,
|
||||
MAX77802_REG_LDO7CTRL2 = 0x96,
|
||||
MAX77802_REG_LDO8CTRL2 = 0x97,
|
||||
MAX77802_REG_LDO9CTRL2 = 0x98,
|
||||
MAX77802_REG_LDO10CTRL2 = 0x99,
|
||||
MAX77802_REG_LDO11CTRL2 = 0x9A,
|
||||
MAX77802_REG_LDO12CTRL2 = 0x9B,
|
||||
MAX77802_REG_LDO13CTRL2 = 0x9C,
|
||||
MAX77802_REG_LDO14CTRL2 = 0x9D,
|
||||
MAX77802_REG_LDO15CTRL2 = 0x9E,
|
||||
/* Reserved: 0x9F */
|
||||
MAX77802_REG_LDO17CTRL2 = 0xA0,
|
||||
MAX77802_REG_LDO18CTRL2 = 0xA1,
|
||||
MAX77802_REG_LDO19CTRL2 = 0xA2,
|
||||
MAX77802_REG_LDO20CTRL2 = 0xA3,
|
||||
MAX77802_REG_LDO21CTRL2 = 0xA4,
|
||||
MAX77802_REG_LDO22CTRL2 = 0xA5,
|
||||
MAX77802_REG_LDO23CTRL2 = 0xA6,
|
||||
MAX77802_REG_LDO24CTRL2 = 0xA7,
|
||||
MAX77802_REG_LDO25CTRL2 = 0xA8,
|
||||
MAX77802_REG_LDO26CTRL2 = 0xA9,
|
||||
MAX77802_REG_LDO27CTRL2 = 0xAA,
|
||||
MAX77802_REG_LDO28CTRL2 = 0xAB,
|
||||
MAX77802_REG_LDO29CTRL2 = 0xAC,
|
||||
MAX77802_REG_LDO30CTRL2 = 0xAD,
|
||||
/* Reserved: 0xAE */
|
||||
MAX77802_REG_LDO32CTRL2 = 0xAF,
|
||||
MAX77802_REG_LDO33CTRL2 = 0xB0,
|
||||
MAX77802_REG_LDO34CTRL2 = 0xB1,
|
||||
MAX77802_REG_LDO35CTRL2 = 0xB2,
|
||||
/* Reserved: 0xB3 */
|
||||
|
||||
MAX77802_REG_BBAT_CHG = 0xB4,
|
||||
MAX77802_REG_32KHZ = 0xB5,
|
||||
|
||||
MAX77802_REG_PMIC_END = 0xB6,
|
||||
};
|
||||
|
||||
enum max77802_rtc_reg {
|
||||
MAX77802_RTC_INT = 0xC0,
|
||||
MAX77802_RTC_INTM = 0xC1,
|
||||
MAX77802_RTC_CONTROLM = 0xC2,
|
||||
MAX77802_RTC_CONTROL = 0xC3,
|
||||
MAX77802_RTC_UPDATE0 = 0xC4,
|
||||
MAX77802_RTC_UPDATE1 = 0xC5,
|
||||
MAX77802_WTSR_SMPL_CNTL = 0xC6,
|
||||
MAX77802_RTC_SEC = 0xC7,
|
||||
MAX77802_RTC_MIN = 0xC8,
|
||||
MAX77802_RTC_HOUR = 0xC9,
|
||||
MAX77802_RTC_WEEKDAY = 0xCA,
|
||||
MAX77802_RTC_MONTH = 0xCB,
|
||||
MAX77802_RTC_YEAR = 0xCC,
|
||||
MAX77802_RTC_DATE = 0xCD,
|
||||
MAX77802_RTC_AE1 = 0xCE,
|
||||
MAX77802_ALARM1_SEC = 0xCF,
|
||||
MAX77802_ALARM1_MIN = 0xD0,
|
||||
MAX77802_ALARM1_HOUR = 0xD1,
|
||||
MAX77802_ALARM1_WEEKDAY = 0xD2,
|
||||
MAX77802_ALARM1_MONTH = 0xD3,
|
||||
MAX77802_ALARM1_YEAR = 0xD4,
|
||||
MAX77802_ALARM1_DATE = 0xD5,
|
||||
MAX77802_RTC_AE2 = 0xD6,
|
||||
MAX77802_ALARM2_SEC = 0xD7,
|
||||
MAX77802_ALARM2_MIN = 0xD8,
|
||||
MAX77802_ALARM2_HOUR = 0xD9,
|
||||
MAX77802_ALARM2_WEEKDAY = 0xDA,
|
||||
MAX77802_ALARM2_MONTH = 0xDB,
|
||||
MAX77802_ALARM2_YEAR = 0xDC,
|
||||
MAX77802_ALARM2_DATE = 0xDD,
|
||||
|
||||
MAX77802_RTC_END = 0xDF,
|
||||
};
|
||||
|
||||
enum max77686_irq_source {
|
||||
PMIC_INT1 = 0,
|
||||
PMIC_INT2,
|
||||
|
@ -250,6 +455,7 @@ struct max77686_dev {
|
|||
|
||||
enum max77686_types {
|
||||
TYPE_MAX77686,
|
||||
TYPE_MAX77802,
|
||||
};
|
||||
|
||||
extern int max77686_irq_init(struct max77686_dev *max77686);
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* max77686.h - Driver for the Maxim 77686
|
||||
* max77686.h - Driver for the Maxim 77686/802
|
||||
*
|
||||
* Copyright (C) 2012 Samsung Electrnoics
|
||||
* Chiwoong Byun <woong.byun@samsung.com>
|
||||
|
@ -71,6 +71,54 @@ enum max77686_regulators {
|
|||
MAX77686_REG_MAX,
|
||||
};
|
||||
|
||||
/* MAX77802 regulator IDs */
|
||||
enum max77802_regulators {
|
||||
MAX77802_BUCK1 = 0,
|
||||
MAX77802_BUCK2,
|
||||
MAX77802_BUCK3,
|
||||
MAX77802_BUCK4,
|
||||
MAX77802_BUCK5,
|
||||
MAX77802_BUCK6,
|
||||
MAX77802_BUCK7,
|
||||
MAX77802_BUCK8,
|
||||
MAX77802_BUCK9,
|
||||
MAX77802_BUCK10,
|
||||
MAX77802_LDO1,
|
||||
MAX77802_LDO2,
|
||||
MAX77802_LDO3,
|
||||
MAX77802_LDO4,
|
||||
MAX77802_LDO5,
|
||||
MAX77802_LDO6,
|
||||
MAX77802_LDO7,
|
||||
MAX77802_LDO8,
|
||||
MAX77802_LDO9,
|
||||
MAX77802_LDO10,
|
||||
MAX77802_LDO11,
|
||||
MAX77802_LDO12,
|
||||
MAX77802_LDO13,
|
||||
MAX77802_LDO14,
|
||||
MAX77802_LDO15,
|
||||
MAX77802_LDO17,
|
||||
MAX77802_LDO18,
|
||||
MAX77802_LDO19,
|
||||
MAX77802_LDO20,
|
||||
MAX77802_LDO21,
|
||||
MAX77802_LDO23,
|
||||
MAX77802_LDO24,
|
||||
MAX77802_LDO25,
|
||||
MAX77802_LDO26,
|
||||
MAX77802_LDO27,
|
||||
MAX77802_LDO28,
|
||||
MAX77802_LDO29,
|
||||
MAX77802_LDO30,
|
||||
MAX77802_LDO32,
|
||||
MAX77802_LDO33,
|
||||
MAX77802_LDO34,
|
||||
MAX77802_LDO35,
|
||||
|
||||
MAX77802_REG_MAX,
|
||||
};
|
||||
|
||||
struct max77686_regulator_data {
|
||||
int id;
|
||||
struct regulator_init_data *initdata;
|
||||
|
@ -83,6 +131,13 @@ enum max77686_opmode {
|
|||
MAX77686_OPMODE_STANDBY,
|
||||
};
|
||||
|
||||
enum max77802_opmode {
|
||||
MAX77802_OPMODE_OFF,
|
||||
MAX77802_OPMODE_STANDBY,
|
||||
MAX77802_OPMODE_LP,
|
||||
MAX77802_OPMODE_NORMAL,
|
||||
};
|
||||
|
||||
struct max77686_opmode_data {
|
||||
int id;
|
||||
int mode;
|
||||
|
|
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