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@ -25,7 +25,7 @@
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#include <linux/circ_buf.h>
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#include <trace/events/dma_fence.h>
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#include "i915_guc_submission.h"
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#include "intel_guc_submission.h"
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#include "i915_drv.h"
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/**
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@ -102,7 +102,7 @@ static int __reserve_doorbell(struct intel_guc_client *client)
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* priority contexts, the second half for high-priority ones.
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*/
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offset = 0;
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end = GUC_NUM_DOORBELLS/2;
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end = GUC_NUM_DOORBELLS / 2;
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if (is_high_priority(client)) {
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offset = end;
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end += offset;
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@ -221,7 +221,8 @@ static int __destroy_doorbell(struct intel_guc_client *client)
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/* Doorbell release flow requires that we wait for GEN8_DRB_VALID bit
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* to go to zero after updating db_status before we call the GuC to
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* release the doorbell */
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* release the doorbell
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*/
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if (wait_for_us(!(I915_READ(GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID), 10))
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WARN_ONCE(true, "Doorbell never became invalid after disable\n");
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@ -270,7 +271,7 @@ static int destroy_doorbell(struct intel_guc_client *client)
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return 0;
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}
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static unsigned long __select_cacheline(struct intel_guc* guc)
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static unsigned long __select_cacheline(struct intel_guc *guc)
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{
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unsigned long offset;
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@ -281,7 +282,7 @@ static unsigned long __select_cacheline(struct intel_guc* guc)
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guc->db_cacheline += cache_line_size();
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DRM_DEBUG_DRIVER("reserved cacheline 0x%lx, next 0x%x, linesize %u\n",
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offset, guc->db_cacheline, cache_line_size());
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offset, guc->db_cacheline, cache_line_size());
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return offset;
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}
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@ -367,7 +368,8 @@ static void guc_stage_desc_init(struct intel_guc *guc,
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desc = __get_stage_desc(client);
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memset(desc, 0, sizeof(*desc));
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desc->attribute = GUC_STAGE_DESC_ATTR_ACTIVE | GUC_STAGE_DESC_ATTR_KERNEL;
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desc->attribute = GUC_STAGE_DESC_ATTR_ACTIVE |
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GUC_STAGE_DESC_ATTR_KERNEL;
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if (is_high_priority(client))
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desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
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desc->stage_id = client->stage_id;
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@ -403,7 +405,8 @@ static void guc_stage_desc_init(struct intel_guc *guc,
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guc_ggtt_offset(ce->state) + LRC_STATE_PN * PAGE_SIZE;
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/* XXX: In direct submission, the GuC wants the HW context id
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* here. In proxy submission, it wants the stage id */
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* here. In proxy submission, it wants the stage id
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*/
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lrc->context_id = (client->stage_id << GUC_ELC_CTXID_OFFSET) |
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(guc_engine_id << GUC_ELC_ENGINE_OFFSET);
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@ -416,7 +419,7 @@ static void guc_stage_desc_init(struct intel_guc *guc,
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}
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DRM_DEBUG_DRIVER("Host engines 0x%x => GuC engines used 0x%x\n",
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client->engines, desc->engines_used);
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client->engines, desc->engines_used);
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WARN_ON(desc->engines_used == 0);
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/*
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@ -551,7 +554,8 @@ static void guc_add_request(struct intel_guc *guc,
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{
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struct intel_guc_client *client = guc->execbuf_client;
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struct intel_engine_cs *engine = rq->engine;
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u32 ctx_desc = lower_32_bits(intel_lr_context_descriptor(rq->ctx, engine));
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u32 ctx_desc = lower_32_bits(intel_lr_context_descriptor(rq->ctx,
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engine));
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u32 ring_tail = intel_ring_set_tail(rq->ring, rq->tail) / sizeof(u64);
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spin_lock(&client->wq_lock);
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@ -777,7 +781,8 @@ static void guc_dequeue(struct intel_engine_cs *engine)
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INIT_LIST_HEAD(&rq->priotree.link);
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__i915_gem_request_submit(rq);
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trace_i915_gem_request_in(rq, port_index(port, execlists));
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trace_i915_gem_request_in(rq,
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port_index(port, execlists));
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last = rq;
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submit = true;
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}
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@ -910,7 +915,8 @@ static int guc_init_doorbell_hw(struct intel_guc *guc)
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if (recreate_first_client) {
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ret = __reserve_doorbell(client);
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if (unlikely(ret)) {
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DRM_ERROR("Couldn't re-reserve first client db: %d\n", ret);
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DRM_ERROR("Couldn't re-reserve first client db: %d\n",
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ret);
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return ret;
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}
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@ -918,7 +924,8 @@ static int guc_init_doorbell_hw(struct intel_guc *guc)
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}
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/* Now for every client (and not only execbuf_client) make sure their
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* doorbells are known by the GuC */
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* doorbells are known by the GuC
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*/
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ret = __create_doorbell(guc->execbuf_client);
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if (ret)
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return ret;
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@ -941,11 +948,11 @@ static int guc_init_doorbell_hw(struct intel_guc *guc)
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* @dev_priv: driver private data structure
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* @engines: The set of engines to enable for this client
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* @priority: four levels priority _CRITICAL, _HIGH, _NORMAL and _LOW
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* The kernel client to replace ExecList submission is created with
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* NORMAL priority. Priority of a client for scheduler can be HIGH,
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* while a preemption context can use CRITICAL.
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* The kernel client to replace ExecList submission is created with
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* NORMAL priority. Priority of a client for scheduler can be HIGH,
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* while a preemption context can use CRITICAL.
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* @ctx: the context that owns the client (we use the default render
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* context)
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* context)
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*
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* Return: An intel_guc_client object if success, else NULL.
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*/
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@ -973,7 +980,7 @@ guc_client_alloc(struct drm_i915_private *dev_priv,
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spin_lock_init(&client->wq_lock);
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ret = ida_simple_get(&guc->stage_ids, 0, GUC_MAX_STAGE_DESCRIPTORS,
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GFP_KERNEL);
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GFP_KERNEL);
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if (ret < 0)
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goto err_client;
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@ -1042,7 +1049,8 @@ static void guc_client_free(struct intel_guc_client *client)
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/* FIXME: in many cases, by the time we get here the GuC has been
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* reset, so we cannot destroy the doorbell properly. Ignore the
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* error message for now */
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* error message for now
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*/
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destroy_doorbell(client);
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guc_stage_desc_fini(client->guc, client);
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i915_gem_object_unpin_map(client->vma->obj);
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@ -1178,7 +1186,8 @@ static int guc_ads_create(struct intel_guc *guc)
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* because our GuC shared data is there.
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*/
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blob->ads.golden_context_lrca =
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guc_ggtt_offset(dev_priv->kernel_context->engine[RCS].state) + skipped_offset;
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guc_ggtt_offset(dev_priv->kernel_context->engine[RCS].state) +
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skipped_offset;
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/*
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* The GuC expects us to exclude the portion of the context image that
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@ -1187,7 +1196,8 @@ static int guc_ads_create(struct intel_guc *guc)
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* dwords). Weird guc is weird.
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*/
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for_each_engine(engine, dev_priv, id)
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blob->ads.eng_state_size[engine->guc_id] = engine->context_size - skipped_size;
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blob->ads.eng_state_size[engine->guc_id] =
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engine->context_size - skipped_size;
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base = guc_ggtt_offset(vma);
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blob->ads.scheduler_policies = base + ptr_offset(blob, policies);
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@ -1317,7 +1327,9 @@ static void guc_interrupts_capture(struct drm_i915_private *dev_priv)
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enum intel_engine_id id;
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int irqs;
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/* tell all command streamers to forward interrupts (but not vblank) to GuC */
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/* tell all command streamers to forward interrupts (but not vblank)
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* to GuC
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*/
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irqs = _MASKED_BIT_ENABLE(GFX_INTERRUPT_STEERING);
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for_each_engine(engine, dev_priv, id)
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I915_WRITE(RING_MODE_GEN7(engine), irqs);
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@ -1435,7 +1447,9 @@ int intel_guc_submission_enable(struct intel_guc *guc)
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guc_interrupts_capture(dev_priv);
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for_each_engine(engine, dev_priv, id) {
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struct intel_engine_execlists * const execlists = &engine->execlists;
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struct intel_engine_execlists * const execlists =
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&engine->execlists;
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execlists->tasklet.func = guc_submission_tasklet;
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engine->park = guc_submission_park;
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engine->unpark = guc_submission_unpark;
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