amd-xgbe: Checkpatch driver fixes
This patch contains fixes identified by checkpatch when run with the strict option. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Lendacky, Thomas
David S. Miller
Родитель
e6f0562ff4
Коммит
a2ea14d772
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@ -271,7 +271,6 @@
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#define DMA_PBL_X8_DISABLE 0x00
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#define DMA_PBL_X8_ENABLE 0x01
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/* MAC register offsets */
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#define MAC_TCR 0x0000
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#define MAC_RCR 0x0004
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@ -792,7 +791,6 @@
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#define MTL_Q_DISABLED 0x00
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#define MTL_Q_ENABLED 0x02
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/* MTL traffic class register offsets
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* Multiple traffic classes can be active. The first class has registers
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* that begin at 0x1100. Each subsequent queue has registers that
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@ -815,7 +813,6 @@
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#define MTL_TSA_SP 0x00
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#define MTL_TSA_ETS 0x02
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/* PCS MMD select register offset
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* The MMD select register is used for accessing PCS registers
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* when the underlying APB3 interface is using indirect addressing.
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@ -825,7 +822,6 @@
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*/
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#define PCS_MMD_SELECT 0xff
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/* Descriptor/Packet entry bit positions and sizes */
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#define RX_PACKET_ERRORS_CRC_INDEX 2
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#define RX_PACKET_ERRORS_CRC_WIDTH 1
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@ -929,7 +925,6 @@
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#define MDIO_AN_COMP_STAT 0x0030
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#endif
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/* Bit setting and getting macros
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* The get macro will extract the current bit field value from within
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* the variable
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@ -957,7 +952,6 @@ do { \
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((0x1 << (_width)) - 1)) << (_index))); \
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} while (0)
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/* Bit setting and getting macros based on register fields
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* The get macro uses the bit field definitions formed using the input
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* names to extract the current bit field value from within the
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@ -986,7 +980,6 @@ do { \
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_prefix##_##_field##_INDEX, \
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_prefix##_##_field##_WIDTH, (_val))
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/* Macros for reading or writing registers
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* The ioread macros will get bit fields or full values using the
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* register definitions formed using the input names
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@ -1014,7 +1007,6 @@ do { \
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XGMAC_IOWRITE((_pdata), _reg, reg_val); \
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} while (0)
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/* Macros for reading or writing MTL queue or traffic class registers
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* Similar to the standard read and write macros except that the
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* base register value is calculated by the queue or traffic class number
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@ -1041,7 +1033,6 @@ do { \
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XGMAC_MTL_IOWRITE((_pdata), (_n), _reg, reg_val); \
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} while (0)
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/* Macros for reading or writing DMA channel registers
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* Similar to the standard read and write macros except that the
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* base register value is obtained from the ring
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@ -1066,7 +1057,6 @@ do { \
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XGMAC_DMA_IOWRITE((_channel), _reg, reg_val); \
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} while (0)
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/* Macros for building, reading or writing register values or bits
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* within the register values of XPCS registers.
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*/
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@ -1076,7 +1066,6 @@ do { \
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#define XPCS_IOREAD(_pdata, _off) \
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ioread32((_pdata)->xpcs_regs + (_off))
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/* Macros for building, reading or writing register values or bits
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* using MDIO. Different from above because of the use of standardized
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* Linux include values. No shifting is performed with the bit
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@ -120,7 +120,6 @@
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#include "xgbe.h"
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#include "xgbe-common.h"
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static int xgbe_dcb_ieee_getets(struct net_device *netdev,
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struct ieee_ets *ets)
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{
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@ -121,7 +121,6 @@
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#include "xgbe.h"
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#include "xgbe-common.h"
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static ssize_t xgbe_common_read(char __user *buffer, size_t count,
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loff_t *ppos, unsigned int value)
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{
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@ -117,7 +117,6 @@
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#include "xgbe.h"
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#include "xgbe-common.h"
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static void xgbe_unmap_skb(struct xgbe_prv_data *, struct xgbe_ring_data *);
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static void xgbe_free_ring(struct xgbe_prv_data *pdata,
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@ -524,11 +523,8 @@ static void xgbe_realloc_skb(struct xgbe_channel *channel)
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/* Allocate skb & assign to each rdesc */
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skb = dev_alloc_skb(pdata->rx_buf_size);
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if (skb == NULL) {
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netdev_alert(pdata->netdev,
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"failed to allocate skb\n");
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if (skb == NULL)
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break;
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}
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skb_dma = dma_map_single(pdata->dev, skb->data,
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pdata->rx_buf_size, DMA_FROM_DEVICE);
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if (dma_mapping_error(pdata->dev, skb_dma)) {
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@ -122,7 +122,6 @@
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#include "xgbe.h"
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#include "xgbe-common.h"
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static unsigned int xgbe_usec_to_riwt(struct xgbe_prv_data *pdata,
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unsigned int usec)
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{
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@ -126,7 +126,6 @@
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#include "xgbe.h"
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#include "xgbe-common.h"
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static int xgbe_poll(struct napi_struct *, int);
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static void xgbe_set_rx_mode(struct net_device *);
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@ -121,7 +121,6 @@
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#include "xgbe.h"
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#include "xgbe-common.h"
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struct xgbe_stats {
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char stat_string[ETH_GSTRING_LEN];
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int stat_size;
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@ -173,6 +172,7 @@ static const struct xgbe_stats xgbe_gstring_stats[] = {
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XGMAC_MMC_STAT("rx_watchdog_errors", rxwatchdogerror),
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XGMAC_MMC_STAT("rx_pause_frames", rxpauseframes),
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};
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#define XGBE_STATS_COUNT ARRAY_SIZE(xgbe_gstring_stats)
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static void xgbe_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
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@ -128,7 +128,6 @@
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#include "xgbe.h"
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#include "xgbe-common.h"
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MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_VERSION(XGBE_DRV_VERSION);
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@ -123,7 +123,6 @@
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#include "xgbe.h"
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#include "xgbe-common.h"
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static int xgbe_mdio_read(struct mii_bus *mii, int prtad, int mmd_reg)
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{
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struct xgbe_prv_data *pdata = mii->priv;
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@ -122,7 +122,6 @@
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#include "xgbe.h"
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#include "xgbe-common.h"
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static cycle_t xgbe_cc_read(const struct cyclecounter *cc)
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{
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struct xgbe_prv_data *pdata = container_of(cc,
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@ -128,7 +128,6 @@
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#include <linux/net_tstamp.h>
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#include <net/dcbnl.h>
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#define XGBE_DRV_NAME "amd-xgbe"
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#define XGBE_DRV_VERSION "1.0.0-a"
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#define XGBE_DRV_DESC "AMD 10 Gigabit Ethernet Driver"
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@ -198,7 +197,6 @@
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((_ring)->rdata + \
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((_idx) & ((_ring)->rdesc_count - 1)))
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/* Default coalescing parameters */
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#define XGMAC_INIT_DMA_TX_USECS 50
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#define XGMAC_INIT_DMA_TX_FRAMES 25
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