[PATCH] ppc32: Added support for the Book-E style Watchdog Timer
PowerPC 40x and Book-E processors support a watchdog timer at the processor core level. The timer has implementation dependent timeout frequencies that can be configured by software. One the first Watchdog timeout we get a critical exception. It is left to board specific code to determine what should happen at this point. If nothing is done and another timeout period expires the processor may attempt to reset the machine. Command line parameters: wdt=0 : disable watchdog (default) wdt=1 : enable watchdog wdt_period=N : N sets the value of the Watchdog Timer Period. The Watchdog Timer Period meaning is implementation specific. Check User Manual for the processor for more details. This patch is based off of work done by Takeharu Kato. Signed-off-by: Matt McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Kumar Gala
Linus Torvalds
Родитель
886b9fa499
Коммит
a2f40ccd29
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@ -228,6 +228,26 @@ advantechwdt.c -- Advantech Single Board Computer
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The GETSTATUS call returns if the device is open or not.
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[FIXME -- silliness again?]
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booke_wdt.c -- PowerPC BookE Watchdog Timer
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Timeout default varies according to frequency, supports
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SETTIMEOUT
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Watchdog can not be turned off, CONFIG_WATCHDOG_NOWAYOUT
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does not make sense
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GETSUPPORT returns the watchdog_info struct, and
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GETSTATUS returns the supported options. GETBOOTSTATUS
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returns a 1 if the last reset was caused by the
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watchdog and a 0 otherwise. This watchdog can not be
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disabled once it has been started. The wdt_period kernel
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parameter selects which bit of the time base changing
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from 0->1 will trigger the watchdog exception. Changing
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the timeout from the ioctl calls will change the
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wdt_period as defined above. Finally if you would like to
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replace the default Watchdog Handler you can implement the
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WatchdogHandler() function in your own code.
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eurotechwdt.c -- Eurotech CPU-1220/1410
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The timeout can be set using the SETTIMEOUT ioctl and defaults
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@ -462,7 +462,11 @@ interrupt_base:
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/* Watchdog Timer Interrupt */
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/* TODO: Add watchdog support */
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#ifdef CONFIG_BOOKE_WDT
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CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException)
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#else
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CRITICAL_EXCEPTION(0x1020, WatchdogTimer, UnknownException)
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#endif
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/* Data TLB Error Interrupt */
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START_EXCEPTION(DataTLBError)
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@ -448,7 +448,9 @@ label:
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/* 0x1020 - Watchdog Timer (WDT) Exception
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*/
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#ifdef CONFIG_BOOKE_WDT
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CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException)
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#else
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CRITICAL_EXCEPTION(0x1020, WDTException, UnknownException)
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#endif
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@ -564,8 +564,11 @@ interrupt_base:
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EXCEPTION(0x3100, FixedIntervalTimer, UnknownException, EXC_XFER_EE)
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/* Watchdog Timer Interrupt */
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/* TODO: Add watchdog support */
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#ifdef CONFIG_BOOKE_WDT
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CRITICAL_EXCEPTION(0x3200, WatchdogTimer, WatchdogException)
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#else
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CRITICAL_EXCEPTION(0x3200, WatchdogTimer, UnknownException)
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#endif
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/* Data TLB Error Interrupt */
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START_EXCEPTION(DataTLBError)
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@ -615,6 +615,30 @@ machine_init(unsigned long r3, unsigned long r4, unsigned long r5,
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if (ppc_md.progress)
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ppc_md.progress("id mach(): done", 0x200);
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}
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#ifdef CONFIG_BOOKE_WDT
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/* Checks wdt=x and wdt_period=xx command-line option */
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int __init early_parse_wdt(char *p)
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{
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extern u32 wdt_enable;
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if (p && strncmp(p, "0", 1) != 0)
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wdt_enable = 1;
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return 0;
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}
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early_param("wdt", early_parse_wdt);
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int __init early_parse_wdt_period (char *p)
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{
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extern u32 wdt_period;
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if (p)
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wdt_period = simple_strtoul(p, NULL, 0);
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return 0;
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}
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early_param("wdt_period", early_parse_wdt_period);
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#endif /* CONFIG_BOOKE_WDT */
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/* Checks "l2cr=xxxx" command-line option */
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int __init ppc_setup_l2cr(char *str)
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@ -904,6 +904,25 @@ void SPEFloatingPointException(struct pt_regs *regs)
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}
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#endif
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#ifdef CONFIG_BOOKE_WDT
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/*
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* Default handler for a Watchdog exception,
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* spins until a reboot occurs
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*/
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void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
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{
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/* Generic WatchdogHandler, implement your own */
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mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
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return;
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}
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void WatchdogException(struct pt_regs *regs)
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{
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printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
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WatchdogHandler(regs);
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}
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#endif
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void __init trap_init(void)
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{
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}
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@ -48,10 +48,6 @@
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extern void abort(void);
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extern void ppc4xx_find_bridges(void);
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extern void ppc4xx_wdt_heartbeat(void);
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extern int wdt_enable;
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extern unsigned long wdt_period;
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/* Global Variables */
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bd_t __res;
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@ -257,22 +253,6 @@ ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
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*(char *) (r7 + KERNELBASE) = 0;
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strcpy(cmd_line, (char *) (r6 + KERNELBASE));
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}
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#if defined(CONFIG_PPC405_WDT)
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/* Look for wdt= option on command line */
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if (strstr(cmd_line, "wdt=")) {
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int valid_wdt = 0;
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char *p, *q;
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for (q = cmd_line; (p = strstr(q, "wdt=")) != 0;) {
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q = p + 4;
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if (p > cmd_line && p[-1] != ' ')
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continue;
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wdt_period = simple_strtoul(q, &q, 0);
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valid_wdt = 1;
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++q;
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}
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wdt_enable = valid_wdt;
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}
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#endif
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/* Initialize machine-dependent vectors */
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@ -287,11 +267,6 @@ ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
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ppc_md.calibrate_decr = ppc4xx_calibrate_decr;
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#ifdef CONFIG_PPC405_WDT
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ppc_md.heartbeat = ppc4xx_wdt_heartbeat;
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#endif
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ppc_md.heartbeat_count = 0;
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ppc_md.find_end_of_memory = ppc4xx_find_end_of_memory;
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ppc_md.setup_io_mappings = ppc4xx_map_io;
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@ -346,6 +346,10 @@ config 8xx_WDT
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tristate "MPC8xx Watchdog Timer"
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depends on WATCHDOG && 8xx
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config BOOKE_WDT
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tristate "PowerPC Book-E Watchdog Timer"
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depends on WATCHDOG && (BOOKE || 4xx)
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# MIPS Architecture
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config INDYDOG
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@ -34,6 +34,7 @@ obj-$(CONFIG_IXP4XX_WATCHDOG) += ixp4xx_wdt.o
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obj-$(CONFIG_IXP2000_WATCHDOG) += ixp2000_wdt.o
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obj-$(CONFIG_8xx_WDT) += mpc8xx_wdt.o
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obj-$(CONFIG_WATCHDOG_RTAS) += wdrtas.o
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obj-$(CONFIG_BOOKE_WDT) += booke_wdt.o
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# Only one watchdog can succeed. We probe the hardware watchdog
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# drivers first, then the softdog driver. This means if your hardware
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@ -0,0 +1,191 @@
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/*
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* drivers/char/watchdog/booke_wdt.c
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*
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* Watchdog timer for PowerPC Book-E systems
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*
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* Author: Matthew McClintock
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* Maintainer: Kumar Gala <kumar.gala@freescale.com>
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*
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* Copyright 2005 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/fs.h>
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#include <linux/miscdevice.h>
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#include <linux/notifier.h>
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#include <linux/watchdog.h>
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#include <asm/reg_booke.h>
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#include <asm/uaccess.h>
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/* If the kernel parameter wdt_enable=1, the watchdog will be enabled at boot.
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* Also, the wdt_period sets the watchdog timer period timeout.
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* For E500 cpus the wdt_period sets which bit changing from 0->1 will
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* trigger a watchog timeout. This watchdog timeout will occur 3 times, the
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* first time nothing will happen, the second time a watchdog exception will
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* occur, and the final time the board will reset.
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*/
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#ifdef CONFIG_FSL_BOOKE
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#define WDT_PERIOD_DEFAULT 63 /* Ex. wdt_period=28 bus=333Mhz , reset=~40sec */
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#else
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#define WDT_PERIOD_DEFAULT 4 /* Refer to the PPC40x and PPC4xx manuals */
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#endif /* for timing information */
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u32 wdt_enable = 0;
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u32 wdt_period = WDT_PERIOD_DEFAULT;
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#ifdef CONFIG_FSL_BOOKE
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#define WDTP(x) ((((63-x)&0x3)<<30)|(((63-x)&0x3c)<<15))
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#else
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#define WDTP(x) (TCR_WP(x))
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#endif
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/*
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* booke_wdt_enable:
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*/
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static __inline__ void booke_wdt_enable(void)
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{
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u32 val;
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val = mfspr(SPRN_TCR);
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val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(wdt_period));
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mtspr(SPRN_TCR, val);
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}
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/*
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* booke_wdt_ping:
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*/
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static __inline__ void booke_wdt_ping(void)
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{
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mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
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}
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/*
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* booke_wdt_write:
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*/
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static ssize_t booke_wdt_write (struct file *file, const char *buf,
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size_t count, loff_t *ppos)
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{
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booke_wdt_ping();
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return count;
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}
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static struct watchdog_info ident = {
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
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.firmware_version = 0,
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.identity = "PowerPC Book-E Watchdog",
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};
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/*
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* booke_wdt_ioctl:
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*/
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static int booke_wdt_ioctl (struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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u32 tmp = 0;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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if (copy_to_user ((struct watchdog_info *) arg, &ident,
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sizeof(struct watchdog_info)))
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return -EFAULT;
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case WDIOC_GETSTATUS:
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return put_user(ident.options, (u32 *) arg);
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case WDIOC_GETBOOTSTATUS:
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/* XXX: something is clearing TSR */
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tmp = mfspr(SPRN_TSR) & TSR_WRS(3);
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/* returns 1 if last reset was caused by the WDT */
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return (tmp ? 1 : 0);
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case WDIOC_KEEPALIVE:
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booke_wdt_ping();
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return 0;
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case WDIOC_SETTIMEOUT:
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if (get_user(wdt_period, (u32 *) arg))
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return -EFAULT;
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mtspr(SPRN_TCR, (mfspr(SPRN_TCR)&~WDTP(0))|WDTP(wdt_period));
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return 0;
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case WDIOC_GETTIMEOUT:
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return put_user(wdt_period, (u32 *) arg);
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case WDIOC_SETOPTIONS:
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if (get_user(tmp, (u32 *) arg))
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return -EINVAL;
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if (tmp == WDIOS_ENABLECARD) {
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booke_wdt_ping();
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break;
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} else
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return -EINVAL;
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return 0;
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default:
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return -ENOIOCTLCMD;
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}
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return 0;
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}
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/*
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* booke_wdt_open:
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*/
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static int booke_wdt_open (struct inode *inode, struct file *file)
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{
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if (wdt_enable == 0) {
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wdt_enable = 1;
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booke_wdt_enable();
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printk (KERN_INFO "PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n",
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wdt_period);
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}
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return 0;
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}
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static struct file_operations booke_wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = booke_wdt_write,
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.ioctl = booke_wdt_ioctl,
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.open = booke_wdt_open,
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};
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static struct miscdevice booke_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &booke_wdt_fops,
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};
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static void __exit booke_wdt_exit(void)
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{
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misc_deregister(&booke_wdt_miscdev);
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}
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/*
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* booke_wdt_init:
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*/
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static int __init booke_wdt_init(void)
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{
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int ret = 0;
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printk (KERN_INFO "PowerPC Book-E Watchdog Timer Loaded\n");
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ident.firmware_version = cpu_specs[0].pvr_value;
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ret = misc_register(&booke_wdt_miscdev);
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if (ret) {
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printk (KERN_CRIT "Cannot register miscdev on minor=%d (err=%d)\n",
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WATCHDOG_MINOR, ret);
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return ret;
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}
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if (wdt_enable == 1) {
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printk (KERN_INFO "PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n",
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wdt_period);
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booke_wdt_enable();
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}
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return ret;
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}
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device_initcall(booke_wdt_init);
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