V4L/DVB (9062): Add support for Prolink Pixelview Global Extreme
Thanks to Sidney Matias <sidney.matias@gmail.com> for getting GPIO values and testing on this device. Cc: Sidney Matias <sidney.matias@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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9b00019139
Коммит
a31d2bb773
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@ -72,3 +72,4 @@
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71 -> Omicom SS4 DVB-S/S2 PCI [A044:2011]
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72 -> TBS 8920 DVB-S/S2 [8920:8888]
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73 -> TeVii S420 DVB-S [d420:9022]
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74 -> Prolink Pixelview Global Extreme [1554:4976]
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@ -1628,6 +1628,36 @@ static const struct cx88_board cx88_boards[] = {
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.gpio2 = 0x0cfb,
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},
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},
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[CX88_BOARD_PROLINK_PV_GLOBAL_XTREME] = {
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.name = "Prolink Pixelview Global Extreme",
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.tuner_type = TUNER_XC2028,
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.tuner_addr = 0x61,
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.input = { {
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.type = CX88_VMUX_TELEVISION,
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.vmux = 0,
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.gpio0 = 0x04fb,
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.gpio1 = 0x04080,
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.gpio2 = 0x0cf7,
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}, {
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.type = CX88_VMUX_COMPOSITE1,
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.vmux = 1,
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.gpio0 = 0x04fb,
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.gpio1 = 0x04080,
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.gpio2 = 0x0cfb,
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}, {
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.type = CX88_VMUX_SVIDEO,
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.vmux = 2,
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.gpio0 = 0x04fb,
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.gpio1 = 0x04080,
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.gpio2 = 0x0cfb,
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} },
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.radio = {
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.type = CX88_RADIO,
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.gpio0 = 0x04ff,
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.gpio1 = 0x04080,
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.gpio2 = 0x0cf7,
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},
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},
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/* Both radio, analog and ATSC work with this board.
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However, for analog to work, s5h1409 gate should be open,
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otherwise, tuner-xc3028 won't be detected.
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@ -2125,6 +2155,10 @@ static const struct cx88_subid cx88_subids[] = {
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.subvendor = 0x1554,
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.subdevice = 0x4935,
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.card = CX88_BOARD_PROLINK_PV_8000GT,
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}, {
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.subvendor = 0x1554,
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.subdevice = 0x4976,
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.card = CX88_BOARD_PROLINK_PV_GLOBAL_XTREME,
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}, {
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.subvendor = 0x17de,
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.subdevice = 0x08c1,
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@ -2429,6 +2463,7 @@ static int cx88_xc2028_tuner_callback(struct cx88_core *core,
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return cx88_xc3028_geniatech_tuner_callback(core,
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command, arg);
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case CX88_BOARD_PROLINK_PV_8000GT:
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case CX88_BOARD_PROLINK_PV_GLOBAL_XTREME:
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return cx88_pv_8000gt_callback(core, command, arg);
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case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
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case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
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@ -2582,6 +2617,7 @@ static void cx88_card_setup_pre_i2c(struct cx88_core *core)
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udelay(1000);
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break;
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case CX88_BOARD_PROLINK_PV_GLOBAL_XTREME:
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case CX88_BOARD_PROLINK_PV_8000GT:
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cx_write(MO_GP2_IO, 0xcf7);
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mdelay(50);
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@ -2629,9 +2665,10 @@ void cx88_setup_xc3028(struct cx88_core *core, struct xc2028_ctrl *ctl)
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case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
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ctl->demod = XC3028_FE_OREN538;
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break;
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case CX88_BOARD_PROLINK_PV_GLOBAL_XTREME:
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case CX88_BOARD_PROLINK_PV_8000GT:
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/*
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* This board uses non-MTS firmware
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* Those boards uses non-MTS firmware
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*/
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break;
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default:
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@ -261,6 +261,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
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ir->polling = 1; /* ms */
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break;
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case CX88_BOARD_PROLINK_PV_8000GT:
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case CX88_BOARD_PROLINK_PV_GLOBAL_XTREME:
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ir_codes = ir_codes_pixelview_new;
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ir->gpio_addr = MO_GP1_IO;
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ir->mask_keycode = 0x3f;
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@ -227,6 +227,7 @@ extern struct sram_channel cx88_sram_channels[];
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#define CX88_BOARD_OMICOM_SS4_PCI 71
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#define CX88_BOARD_TBS_8920 72
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#define CX88_BOARD_TEVII_S420 73
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#define CX88_BOARD_PROLINK_PV_GLOBAL_XTREME 74
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enum cx88_itype {
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CX88_VMUX_COMPOSITE1 = 1,
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