IB/mlx4: Add mechanism to support flow steering over IB links
The mlx4 device requires adding IB flow spec to rules that apply over infiniband link layer. This patch adds a mechanism to add such a rule. If higher levels e.g. IP/UDP/TCP flow specs are provided, the device requires us to add an empty wild-carded IB rule. Furthermore, the device requires the QPN to be put in the rule. Add here specific parsing support for IB empty rules and the ability to self-generate missing specs based on existing ones. Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
This commit is contained in:
Matan Barak
Roland Dreier
Родитель
0a9b7d59d5
Коммит
a37a1a4284
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@ -55,6 +55,7 @@
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#define DRV_RELDATE "April 4, 2008"
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#define MLX4_IB_FLOW_MAX_PRIO 0xFFF
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#define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
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MODULE_AUTHOR("Roland Dreier");
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MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
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@ -825,6 +826,7 @@ struct mlx4_ib_steering {
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};
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static int parse_flow_attr(struct mlx4_dev *dev,
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u32 qp_num,
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union ib_flow_spec *ib_spec,
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struct _rule_hw *mlx4_spec)
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{
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@ -840,6 +842,14 @@ static int parse_flow_attr(struct mlx4_dev *dev,
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mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
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mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
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break;
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case IB_FLOW_SPEC_IB:
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type = MLX4_NET_TRANS_RULE_ID_IB;
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mlx4_spec->ib.l3_qpn =
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cpu_to_be32(qp_num);
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mlx4_spec->ib.qpn_mask =
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cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
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break;
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case IB_FLOW_SPEC_IPV4:
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type = MLX4_NET_TRANS_RULE_ID_IPV4;
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@ -871,6 +881,115 @@ static int parse_flow_attr(struct mlx4_dev *dev,
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return mlx4_hw_rule_sz(dev, type);
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}
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struct default_rules {
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__u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
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__u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
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__u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
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__u8 link_layer;
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};
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static const struct default_rules default_table[] = {
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{
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.mandatory_fields = {IB_FLOW_SPEC_IPV4},
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.mandatory_not_fields = {IB_FLOW_SPEC_ETH},
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.rules_create_list = {IB_FLOW_SPEC_IB},
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.link_layer = IB_LINK_LAYER_INFINIBAND
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}
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};
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static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
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struct ib_flow_attr *flow_attr)
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{
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int i, j, k;
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void *ib_flow;
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const struct default_rules *pdefault_rules = default_table;
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u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
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for (i = 0; i < sizeof(default_table)/sizeof(default_table[0]); i++,
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pdefault_rules++) {
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__u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
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memset(&field_types, 0, sizeof(field_types));
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if (link_layer != pdefault_rules->link_layer)
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continue;
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ib_flow = flow_attr + 1;
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/* we assume the specs are sorted */
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for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
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j < flow_attr->num_of_specs; k++) {
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union ib_flow_spec *current_flow =
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(union ib_flow_spec *)ib_flow;
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/* same layer but different type */
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if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
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(pdefault_rules->mandatory_fields[k] &
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IB_FLOW_SPEC_LAYER_MASK)) &&
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(current_flow->type !=
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pdefault_rules->mandatory_fields[k]))
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goto out;
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/* same layer, try match next one */
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if (current_flow->type ==
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pdefault_rules->mandatory_fields[k]) {
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j++;
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ib_flow +=
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((union ib_flow_spec *)ib_flow)->size;
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}
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}
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ib_flow = flow_attr + 1;
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for (j = 0; j < flow_attr->num_of_specs;
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j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
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for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
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/* same layer and same type */
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if (((union ib_flow_spec *)ib_flow)->type ==
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pdefault_rules->mandatory_not_fields[k])
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goto out;
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return i;
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}
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out:
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return -1;
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}
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static int __mlx4_ib_create_default_rules(
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struct mlx4_ib_dev *mdev,
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struct ib_qp *qp,
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const struct default_rules *pdefault_rules,
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struct _rule_hw *mlx4_spec) {
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int size = 0;
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int i;
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for (i = 0; i < sizeof(pdefault_rules->rules_create_list)/
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sizeof(pdefault_rules->rules_create_list[0]); i++) {
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int ret;
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union ib_flow_spec ib_spec;
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switch (pdefault_rules->rules_create_list[i]) {
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case 0:
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/* no rule */
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continue;
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case IB_FLOW_SPEC_IB:
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ib_spec.type = IB_FLOW_SPEC_IB;
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ib_spec.size = sizeof(struct ib_flow_spec_ib);
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break;
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default:
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/* invalid rule */
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return -EINVAL;
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}
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/* We must put empty rule, qpn is being ignored */
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ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
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mlx4_spec);
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if (ret < 0) {
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pr_info("invalid parsing\n");
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return -EINVAL;
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}
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mlx4_spec = (void *)mlx4_spec + ret;
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size += ret;
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}
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return size;
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}
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static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
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int domain,
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enum mlx4_net_trans_promisc_mode flow_type,
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@ -882,6 +1001,7 @@ static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_att
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struct mlx4_ib_dev *mdev = to_mdev(qp->device);
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struct mlx4_cmd_mailbox *mailbox;
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struct mlx4_net_trans_rule_hw_ctrl *ctrl;
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int default_flow;
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static const u16 __mlx4_domain[] = {
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[IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
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@ -916,8 +1036,21 @@ static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_att
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ib_flow = flow_attr + 1;
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size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
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/* Add default flows */
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default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
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if (default_flow >= 0) {
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ret = __mlx4_ib_create_default_rules(
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mdev, qp, default_table + default_flow,
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mailbox->buf + size);
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if (ret < 0) {
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mlx4_free_cmd_mailbox(mdev->dev, mailbox);
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return -EINVAL;
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}
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size += ret;
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}
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for (i = 0; i < flow_attr->num_of_specs; i++) {
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ret = parse_flow_attr(mdev->dev, ib_flow, mailbox->buf + size);
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ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
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mailbox->buf + size);
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if (ret < 0) {
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mlx4_free_cmd_mailbox(mdev->dev, mailbox);
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return -EINVAL;
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