OMAP4: prcm_mpu: Fix indent in few macros
Some maros were not well aligned. Re-align them. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -31,7 +31,6 @@
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OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE + (inst) + (reg))
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/* PRCM_MPU instances */
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#define OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST 0x0000
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#define OMAP4430_PRCM_MPU_DEVICE_PRM_INST 0x0200
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#define OMAP4430_PRCM_MPU_CPU0_INST 0x0400
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@ -52,46 +51,46 @@
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*/
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/* PRCM_MPU.OCP_SOCKET_PRCM register offsets */
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#define OMAP4_REVISION_PRCM_OFFSET 0x0000
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#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000)
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#define OMAP4_REVISION_PRCM_OFFSET 0x0000
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#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000)
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/* PRCM_MPU.DEVICE_PRM register offsets */
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#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000
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#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000)
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#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004
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#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004)
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#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000
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#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000)
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#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004
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#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004)
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/* PRCM_MPU.CPU0 register offsets */
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#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000)
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#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004)
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#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008
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#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008)
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#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c
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#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c)
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#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010
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#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010)
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#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014
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#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014)
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#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018
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#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018)
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#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000)
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#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004)
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#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008
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#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008)
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#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c
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#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c)
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#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010
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#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010)
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#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014
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#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014)
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#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018
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#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018)
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/* PRCM_MPU.CPU1 register offsets */
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#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000)
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#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004)
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#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008
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#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008)
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#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c
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#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c)
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#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010
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#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010)
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#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014
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#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014)
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#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018
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#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)
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#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000)
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#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004)
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#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008
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#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008)
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#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c
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#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c)
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#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010
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#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010)
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#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014
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#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014)
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#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018
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#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)
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/* Function prototypes */
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# ifndef __ASSEMBLER__
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