ARM: dts: sunxi: h3/h5: Fix simple-bus unit address format error
This patch remove leading 0 of unit address and so remove lots of warning when building DT with W=1. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Corentin LABBE
Chen-Yu Tsai
Родитель
a3ccbc0097
Коммит
a3fd57f55d
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@ -91,7 +91,7 @@
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reg = <0x01c00000 0x1000>;
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};
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dma: dma-controller@01c02000 {
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dma: dma-controller@1c02000 {
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compatible = "allwinner,sun8i-h3-dma";
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reg = <0x01c02000 0x1000>;
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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@ -100,7 +100,7 @@
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#dma-cells = <1>;
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};
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mmc0: mmc@01c0f000 {
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mmc0: mmc@1c0f000 {
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/* compatible and clocks are in per SoC .dtsi file */
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reg = <0x01c0f000 0x1000>;
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resets = <&ccu RST_BUS_MMC0>;
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@ -111,7 +111,7 @@
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#size-cells = <0>;
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};
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mmc1: mmc@01c10000 {
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mmc1: mmc@1c10000 {
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/* compatible and clocks are in per SoC .dtsi file */
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reg = <0x01c10000 0x1000>;
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resets = <&ccu RST_BUS_MMC1>;
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@ -122,7 +122,7 @@
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#size-cells = <0>;
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};
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mmc2: mmc@01c11000 {
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mmc2: mmc@1c11000 {
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/* compatible and clocks are in per SoC .dtsi file */
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reg = <0x01c11000 0x1000>;
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resets = <&ccu RST_BUS_MMC2>;
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@ -133,7 +133,7 @@
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#size-cells = <0>;
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};
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usb_otg: usb@01c19000 {
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usb_otg: usb@1c19000 {
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compatible = "allwinner,sun8i-h3-musb";
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reg = <0x01c19000 0x400>;
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clocks = <&ccu CLK_BUS_OTG>;
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@ -146,7 +146,7 @@
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status = "disabled";
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};
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usbphy: phy@01c19400 {
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usbphy: phy@1c19400 {
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compatible = "allwinner,sun8i-h3-usb-phy";
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reg = <0x01c19400 0x2c>,
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<0x01c1a800 0x4>,
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@ -178,7 +178,7 @@
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#phy-cells = <1>;
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};
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ehci0: usb@01c1a000 {
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ehci0: usb@1c1a000 {
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compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
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reg = <0x01c1a000 0x100>;
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interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
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@ -187,7 +187,7 @@
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status = "disabled";
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};
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ohci0: usb@01c1a400 {
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ohci0: usb@1c1a400 {
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compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
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reg = <0x01c1a400 0x100>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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@ -197,7 +197,7 @@
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status = "disabled";
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};
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ehci1: usb@01c1b000 {
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ehci1: usb@1c1b000 {
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compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
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reg = <0x01c1b000 0x100>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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@ -208,7 +208,7 @@
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status = "disabled";
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};
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ohci1: usb@01c1b400 {
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ohci1: usb@1c1b400 {
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compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
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reg = <0x01c1b400 0x100>;
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interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
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@ -220,7 +220,7 @@
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status = "disabled";
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};
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ehci2: usb@01c1c000 {
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ehci2: usb@1c1c000 {
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compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
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reg = <0x01c1c000 0x100>;
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interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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@ -231,7 +231,7 @@
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status = "disabled";
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};
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ohci2: usb@01c1c400 {
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ohci2: usb@1c1c400 {
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compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
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reg = <0x01c1c400 0x100>;
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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@ -243,7 +243,7 @@
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status = "disabled";
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};
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ehci3: usb@01c1d000 {
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ehci3: usb@1c1d000 {
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compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
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reg = <0x01c1d000 0x100>;
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interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
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@ -254,7 +254,7 @@
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status = "disabled";
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};
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ohci3: usb@01c1d400 {
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ohci3: usb@1c1d400 {
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compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
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reg = <0x01c1d400 0x100>;
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interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
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@ -266,7 +266,7 @@
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status = "disabled";
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};
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ccu: clock@01c20000 {
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ccu: clock@1c20000 {
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/* compatible is in per SoC .dtsi file */
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reg = <0x01c20000 0x400>;
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clocks = <&osc24M>, <&osc32k>;
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@ -275,7 +275,7 @@
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#reset-cells = <1>;
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};
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pio: pinctrl@01c20800 {
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pio: pinctrl@1c20800 {
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/* compatible is in per SoC .dtsi file */
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reg = <0x01c20800 0x400>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
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@ -388,7 +388,7 @@
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};
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};
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timer@01c20c00 {
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timer@1c20c00 {
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compatible = "allwinner,sun4i-a10-timer";
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reg = <0x01c20c00 0xa0>;
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interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
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@ -396,7 +396,7 @@
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clocks = <&osc24M>;
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};
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spi0: spi@01c68000 {
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spi0: spi@1c68000 {
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compatible = "allwinner,sun8i-h3-spi";
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reg = <0x01c68000 0x1000>;
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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@ -412,7 +412,7 @@
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#size-cells = <0>;
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};
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spi1: spi@01c69000 {
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spi1: spi@1c69000 {
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compatible = "allwinner,sun8i-h3-spi";
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reg = <0x01c69000 0x1000>;
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interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
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@ -428,13 +428,13 @@
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#size-cells = <0>;
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};
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wdt0: watchdog@01c20ca0 {
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wdt0: watchdog@1c20ca0 {
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compatible = "allwinner,sun6i-a31-wdt";
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reg = <0x01c20ca0 0x20>;
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interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
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};
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spdif: spdif@01c21000 {
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spdif: spdif@1c21000 {
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#sound-dai-cells = <0>;
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compatible = "allwinner,sun8i-h3-spdif";
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reg = <0x01c21000 0x400>;
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@ -447,7 +447,7 @@
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status = "disabled";
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};
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pwm: pwm@01c21400 {
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pwm: pwm@1c21400 {
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compatible = "allwinner,sun8i-h3-pwm";
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reg = <0x01c21400 0x8>;
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clocks = <&osc24M>;
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@ -455,7 +455,7 @@
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status = "disabled";
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};
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i2s0: i2s@01c22000 {
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i2s0: i2s@1c22000 {
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#sound-dai-cells = <0>;
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compatible = "allwinner,sun8i-h3-i2s";
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reg = <0x01c22000 0x400>;
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@ -468,7 +468,7 @@
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status = "disabled";
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};
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i2s1: i2s@01c22400 {
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i2s1: i2s@1c22400 {
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#sound-dai-cells = <0>;
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compatible = "allwinner,sun8i-h3-i2s";
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reg = <0x01c22400 0x400>;
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@ -481,7 +481,7 @@
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status = "disabled";
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};
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codec: codec@01c22c00 {
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codec: codec@1c22c00 {
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#sound-dai-cells = <0>;
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compatible = "allwinner,sun8i-h3-codec";
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reg = <0x01c22c00 0x400>;
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@ -495,7 +495,7 @@
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status = "disabled";
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};
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uart0: serial@01c28000 {
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uart0: serial@1c28000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c28000 0x400>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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@ -508,7 +508,7 @@
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status = "disabled";
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};
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uart1: serial@01c28400 {
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uart1: serial@1c28400 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c28400 0x400>;
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interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
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@ -521,7 +521,7 @@
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status = "disabled";
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};
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uart2: serial@01c28800 {
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uart2: serial@1c28800 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c28800 0x400>;
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interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
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@ -534,7 +534,7 @@
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status = "disabled";
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};
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uart3: serial@01c28c00 {
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uart3: serial@1c28c00 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c28c00 0x400>;
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interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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@ -547,7 +547,7 @@
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status = "disabled";
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};
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i2c0: i2c@01c2ac00 {
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i2c0: i2c@1c2ac00 {
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compatible = "allwinner,sun6i-a31-i2c";
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reg = <0x01c2ac00 0x400>;
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interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
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@ -560,7 +560,7 @@
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#size-cells = <0>;
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};
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i2c1: i2c@01c2b000 {
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i2c1: i2c@1c2b000 {
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compatible = "allwinner,sun6i-a31-i2c";
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reg = <0x01c2b000 0x400>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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@ -573,7 +573,7 @@
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#size-cells = <0>;
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};
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i2c2: i2c@01c2b400 {
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i2c2: i2c@1c2b400 {
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compatible = "allwinner,sun6i-a31-i2c";
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reg = <0x01c2b000 0x400>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
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@ -586,7 +586,7 @@
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#size-cells = <0>;
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};
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gic: interrupt-controller@01c81000 {
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gic: interrupt-controller@1c81000 {
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compatible = "arm,gic-400";
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reg = <0x01c81000 0x1000>,
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<0x01c82000 0x2000>,
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@ -597,7 +597,7 @@
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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};
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rtc: rtc@01f00000 {
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rtc: rtc@1f00000 {
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compatible = "allwinner,sun6i-a31-rtc";
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reg = <0x01f00000 0x54>;
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interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
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@ -614,12 +614,12 @@
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#reset-cells = <1>;
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};
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codec_analog: codec-analog@01f015c0 {
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codec_analog: codec-analog@1f015c0 {
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compatible = "allwinner,sun8i-h3-codec-analog";
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reg = <0x01f015c0 0x4>;
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};
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ir: ir@01f02000 {
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ir: ir@1f02000 {
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compatible = "allwinner,sun5i-a13-ir";
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clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
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clock-names = "apb", "ir";
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@ -629,7 +629,7 @@
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status = "disabled";
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};
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r_pio: pinctrl@01f02c00 {
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r_pio: pinctrl@1f02c00 {
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compatible = "allwinner,sun8i-h3-r-pinctrl";
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reg = <0x01f02c00 0x400>;
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interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
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