Merge branch 'for-next/smccc' into for-next/core
Add support for versions v1.2 and 1.3 of the SMC calling convention. * for-next/smccc: arm64: smccc: Support SMCCC v1.3 SVE register saving hint arm64: smccc: Add support for SMCCCv1.2 extended input/output registers
This commit is contained in:
Will Deacon
Коммит
a4a49140ae
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@ -140,6 +140,15 @@ int main(void)
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DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2));
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DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id));
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DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state));
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DEFINE(ARM_SMCCC_1_2_REGS_X0_OFFS, offsetof(struct arm_smccc_1_2_regs, a0));
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DEFINE(ARM_SMCCC_1_2_REGS_X2_OFFS, offsetof(struct arm_smccc_1_2_regs, a2));
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DEFINE(ARM_SMCCC_1_2_REGS_X4_OFFS, offsetof(struct arm_smccc_1_2_regs, a4));
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DEFINE(ARM_SMCCC_1_2_REGS_X6_OFFS, offsetof(struct arm_smccc_1_2_regs, a6));
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DEFINE(ARM_SMCCC_1_2_REGS_X8_OFFS, offsetof(struct arm_smccc_1_2_regs, a8));
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DEFINE(ARM_SMCCC_1_2_REGS_X10_OFFS, offsetof(struct arm_smccc_1_2_regs, a10));
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DEFINE(ARM_SMCCC_1_2_REGS_X12_OFFS, offsetof(struct arm_smccc_1_2_regs, a12));
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DEFINE(ARM_SMCCC_1_2_REGS_X14_OFFS, offsetof(struct arm_smccc_1_2_regs, a14));
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DEFINE(ARM_SMCCC_1_2_REGS_X16_OFFS, offsetof(struct arm_smccc_1_2_regs, a16));
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BLANK();
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DEFINE(HIBERN_PBE_ORIG, offsetof(struct pbe, orig_address));
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DEFINE(HIBERN_PBE_ADDR, offsetof(struct pbe, address));
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@ -7,8 +7,34 @@
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#include <asm/asm-offsets.h>
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#include <asm/assembler.h>
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#include <asm/thread_info.h>
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/*
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* If we have SMCCC v1.3 and (as is likely) no SVE state in
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* the registers then set the SMCCC hint bit to say there's no
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* need to preserve it. Do this by directly adjusting the SMCCC
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* function value which is already stored in x0 ready to be called.
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*/
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SYM_FUNC_START(__arm_smccc_sve_check)
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ldr_l x16, smccc_has_sve_hint
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cbz x16, 2f
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get_current_task x16
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ldr x16, [x16, #TSK_TI_FLAGS]
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tbnz x16, #TIF_FOREIGN_FPSTATE, 1f // Any live FP state?
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tbnz x16, #TIF_SVE, 2f // Does that state include SVE?
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1: orr x0, x0, ARM_SMCCC_1_3_SVE_HINT
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2: ret
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SYM_FUNC_END(__arm_smccc_sve_check)
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EXPORT_SYMBOL(__arm_smccc_sve_check)
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.macro SMCCC instr
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alternative_if ARM64_SVE
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bl __arm_smccc_sve_check
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alternative_else_nop_endif
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\instr #0
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ldr x4, [sp]
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stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]
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@ -43,3 +69,60 @@ SYM_FUNC_START(__arm_smccc_hvc)
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SMCCC hvc
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SYM_FUNC_END(__arm_smccc_hvc)
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EXPORT_SYMBOL(__arm_smccc_hvc)
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.macro SMCCC_1_2 instr
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/* Save `res` and free a GPR that won't be clobbered */
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stp x1, x19, [sp, #-16]!
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/* Ensure `args` won't be clobbered while loading regs in next step */
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mov x19, x0
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/* Load the registers x0 - x17 from the struct arm_smccc_1_2_regs */
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ldp x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS]
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ldp x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS]
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ldp x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS]
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ldp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS]
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ldp x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS]
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ldp x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS]
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ldp x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS]
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ldp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS]
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ldp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS]
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\instr #0
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/* Load the `res` from the stack */
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ldr x19, [sp]
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/* Store the registers x0 - x17 into the result structure */
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stp x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS]
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stp x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS]
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stp x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS]
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stp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS]
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stp x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS]
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stp x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS]
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stp x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS]
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stp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS]
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stp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS]
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/* Restore original x19 */
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ldp xzr, x19, [sp], #16
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ret
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.endm
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/*
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* void arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
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* struct arm_smccc_1_2_regs *res);
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*/
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SYM_FUNC_START(arm_smccc_1_2_hvc)
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SMCCC_1_2 hvc
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SYM_FUNC_END(arm_smccc_1_2_hvc)
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EXPORT_SYMBOL(arm_smccc_1_2_hvc)
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/*
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* void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args,
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* struct arm_smccc_1_2_regs *res);
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*/
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SYM_FUNC_START(arm_smccc_1_2_smc)
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SMCCC_1_2 smc
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SYM_FUNC_END(arm_smccc_1_2_smc)
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EXPORT_SYMBOL(arm_smccc_1_2_smc)
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@ -15,6 +15,7 @@ static u32 smccc_version = ARM_SMCCC_VERSION_1_0;
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static enum arm_smccc_conduit smccc_conduit = SMCCC_CONDUIT_NONE;
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bool __ro_after_init smccc_trng_available = false;
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u64 __ro_after_init smccc_has_sve_hint = false;
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void __init arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit)
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{
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@ -22,6 +23,9 @@ void __init arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit)
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smccc_conduit = conduit;
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smccc_trng_available = smccc_probe_trng();
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if (IS_ENABLED(CONFIG_ARM64_SVE) &&
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smccc_version >= ARM_SMCCC_VERSION_1_3)
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smccc_has_sve_hint = true;
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}
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enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void)
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@ -63,6 +63,9 @@
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#define ARM_SMCCC_VERSION_1_0 0x10000
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#define ARM_SMCCC_VERSION_1_1 0x10001
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#define ARM_SMCCC_VERSION_1_2 0x10002
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#define ARM_SMCCC_VERSION_1_3 0x10003
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#define ARM_SMCCC_1_3_SVE_HINT 0x10000
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#define ARM_SMCCC_VERSION_FUNC_ID \
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ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
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@ -216,6 +219,8 @@ u32 arm_smccc_get_version(void);
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void __init arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit);
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extern u64 smccc_has_sve_hint;
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/**
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* struct arm_smccc_res - Result from SMC/HVC call
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* @a0-a3 result values from registers 0 to 3
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@ -227,6 +232,61 @@ struct arm_smccc_res {
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unsigned long a3;
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};
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#ifdef CONFIG_ARM64
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/**
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* struct arm_smccc_1_2_regs - Arguments for or Results from SMC/HVC call
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* @a0-a17 argument values from registers 0 to 17
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*/
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struct arm_smccc_1_2_regs {
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unsigned long a0;
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unsigned long a1;
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unsigned long a2;
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unsigned long a3;
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unsigned long a4;
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unsigned long a5;
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unsigned long a6;
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unsigned long a7;
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unsigned long a8;
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unsigned long a9;
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unsigned long a10;
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unsigned long a11;
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unsigned long a12;
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unsigned long a13;
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unsigned long a14;
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unsigned long a15;
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unsigned long a16;
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unsigned long a17;
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};
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/**
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* arm_smccc_1_2_hvc() - make HVC calls
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* @args: arguments passed via struct arm_smccc_1_2_regs
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* @res: result values via struct arm_smccc_1_2_regs
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*
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* This function is used to make HVC calls following SMC Calling Convention
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* v1.2 or above. The content of the supplied param are copied from the
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* structure to registers prior to the HVC instruction. The return values
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* are updated with the content from registers on return from the HVC
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* instruction.
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*/
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asmlinkage void arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
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struct arm_smccc_1_2_regs *res);
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/**
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* arm_smccc_1_2_smc() - make SMC calls
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* @args: arguments passed via struct arm_smccc_1_2_regs
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* @res: result values via struct arm_smccc_1_2_regs
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*
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* This function is used to make SMC calls following SMC Calling Convention
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* v1.2 or above. The content of the supplied param are copied from the
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* structure to registers prior to the SMC instruction. The return values
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* are updated with the content from registers on return from the SMC
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* instruction.
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*/
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asmlinkage void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args,
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struct arm_smccc_1_2_regs *res);
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#endif
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/**
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* struct arm_smccc_quirk - Contains quirk information
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* @id: quirk identification
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@ -240,6 +300,15 @@ struct arm_smccc_quirk {
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} state;
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};
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/**
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* __arm_smccc_sve_check() - Set the SVE hint bit when doing SMC calls
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*
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* Sets the SMCCC hint bit to indicate if there is live state in the SVE
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* registers, this modifies x0 in place and should never be called from C
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* code.
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*/
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asmlinkage unsigned long __arm_smccc_sve_check(unsigned long x0);
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/**
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* __arm_smccc_smc() - make SMC calls
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* @a0-a7: arguments passed in registers 0 to 7
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@ -297,6 +366,20 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
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#endif
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/* nVHE hypervisor doesn't have a current thread so needs separate checks */
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#if defined(CONFIG_ARM64_SVE) && !defined(__KVM_NVHE_HYPERVISOR__)
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#define SMCCC_SVE_CHECK ALTERNATIVE("nop \n", "bl __arm_smccc_sve_check \n", \
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ARM64_SVE)
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#define smccc_sve_clobbers "x16", "x30", "cc",
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#else
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#define SMCCC_SVE_CHECK
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#define smccc_sve_clobbers
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#endif
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#define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x
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#define __count_args(...) \
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@ -364,7 +447,7 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
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#define ___constraints(count) \
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: __constraint_read_ ## count \
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: "memory"
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: smccc_sve_clobbers "memory"
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#define __constraints(count) ___constraints(count)
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/*
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@ -379,7 +462,8 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
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register unsigned long r2 asm("r2"); \
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register unsigned long r3 asm("r3"); \
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__declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
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asm volatile(inst "\n" : \
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asm volatile(SMCCC_SVE_CHECK \
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inst "\n" : \
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"=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \
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__constraints(__count_args(__VA_ARGS__))); \
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if (___res) \
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