arm: dts: socfpga: Change some clocks of gate-clk type to perip-clk
Some of the clocks that were designated gate-clk do not have a gate, so change those clocks to be of periph-clk type. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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@ -245,14 +245,14 @@
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mpu_periph_clk: mpu_periph_clk {
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#clock-cells = <0>;
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compatible = "altr,socfpga-gate-clk";
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compatible = "altr,socfpga-perip-clk";
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clocks = <&mpuclk>;
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fixed-divider = <4>;
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};
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mpu_l2_ram_clk: mpu_l2_ram_clk {
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#clock-cells = <0>;
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compatible = "altr,socfpga-gate-clk";
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compatible = "altr,socfpga-perip-clk";
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clocks = <&mpuclk>;
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fixed-divider = <2>;
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};
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@ -266,8 +266,9 @@
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l3_main_clk: l3_main_clk {
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#clock-cells = <0>;
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compatible = "altr,socfpga-gate-clk";
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compatible = "altr,socfpga-perip-clk";
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clocks = <&mainclk>;
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fixed-divider = <1>;
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};
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l3_mp_clk: l3_mp_clk {
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