igb: Refractoring function pointers in igb_get_invariants function
This patch simplifies igb_get_invariants function by moving all implemented function pointers in this function to individual separate functions, based on their functionalities, this would make debugging much easier. Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Akeem G. Abodunrin
Jeff Kirsher
Родитель
a1bf1f44c6
Коммит
a6053d76bd
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@ -395,13 +395,9 @@ static s32 igb_init_mac_params_82575(struct e1000_hw *hw)
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static s32 igb_get_invariants_82575(struct e1000_hw *hw)
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{
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struct e1000_phy_info *phy = &hw->phy;
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struct e1000_nvm_info *nvm = &hw->nvm;
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struct e1000_mac_info *mac = &hw->mac;
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struct e1000_dev_spec_82575 * dev_spec = &hw->dev_spec._82575;
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u32 eecd;
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s32 ret_val;
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u16 size;
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u32 ctrl_ext = 0;
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switch (hw->device_id) {
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@ -462,7 +458,7 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)
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* SerDes mode on the 82575. There can be an external PHY attached
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* on the SGMII interface. For this, we'll set sgmii_active to true.
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*/
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phy->media_type = e1000_media_type_copper;
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hw->phy.media_type = e1000_media_type_copper;
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dev_spec->sgmii_active = false;
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ctrl_ext = rd32(E1000_CTRL_EXT);
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@ -478,154 +474,15 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)
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break;
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}
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/* Set mta register count */
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mac->mta_reg_count = 128;
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/* Set rar entry count */
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switch (mac->type) {
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case e1000_82576:
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mac->rar_entry_count = E1000_RAR_ENTRIES_82576;
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break;
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case e1000_82580:
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mac->rar_entry_count = E1000_RAR_ENTRIES_82580;
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break;
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case e1000_i350:
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mac->rar_entry_count = E1000_RAR_ENTRIES_I350;
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break;
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default:
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mac->rar_entry_count = E1000_RAR_ENTRIES_82575;
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break;
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}
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/* reset */
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if (mac->type >= e1000_82580)
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mac->ops.reset_hw = igb_reset_hw_82580;
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else
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mac->ops.reset_hw = igb_reset_hw_82575;
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if (mac->type >= e1000_i210) {
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mac->ops.acquire_swfw_sync = igb_acquire_swfw_sync_i210;
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mac->ops.release_swfw_sync = igb_release_swfw_sync_i210;
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} else {
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mac->ops.acquire_swfw_sync = igb_acquire_swfw_sync_82575;
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mac->ops.release_swfw_sync = igb_release_swfw_sync_82575;
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}
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/* Set if part includes ASF firmware */
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mac->asf_firmware_present = true;
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/* Set if manageability features are enabled. */
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mac->arc_subsystem_valid =
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(rd32(E1000_FWSM) & E1000_FWSM_MODE_MASK)
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? true : false;
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/* enable EEE on i350 parts and later parts */
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if (mac->type >= e1000_i350)
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dev_spec->eee_disable = false;
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else
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dev_spec->eee_disable = true;
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/* physical interface link setup */
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mac->ops.setup_physical_interface =
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(hw->phy.media_type == e1000_media_type_copper)
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? igb_setup_copper_link_82575
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: igb_setup_serdes_link_82575;
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/* mac initialization and operations */
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ret_val = igb_init_mac_params_82575(hw);
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if (ret_val)
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goto out;
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/* NVM initialization */
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eecd = rd32(E1000_EECD);
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size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
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E1000_EECD_SIZE_EX_SHIFT);
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/*
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* Added to a constant, "size" becomes the left-shift value
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* for setting word_size.
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*/
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size += NVM_WORD_SIZE_BASE_SHIFT;
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/*
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* Check for invalid size
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*/
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if ((hw->mac.type == e1000_82576) && (size > 15)) {
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pr_notice("The NVM size is not valid, defaulting to 32K\n");
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size = 15;
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}
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nvm->word_size = 1 << size;
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if (hw->mac.type < e1000_i210) {
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nvm->opcode_bits = 8;
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nvm->delay_usec = 1;
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switch (nvm->override) {
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case e1000_nvm_override_spi_large:
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nvm->page_size = 32;
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nvm->address_bits = 16;
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break;
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case e1000_nvm_override_spi_small:
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nvm->page_size = 8;
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nvm->address_bits = 8;
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break;
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default:
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nvm->page_size = eecd
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& E1000_EECD_ADDR_BITS ? 32 : 8;
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nvm->address_bits = eecd
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& E1000_EECD_ADDR_BITS ? 16 : 8;
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break;
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}
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if (nvm->word_size == (1 << 15))
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nvm->page_size = 128;
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nvm->type = e1000_nvm_eeprom_spi;
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} else
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nvm->type = e1000_nvm_flash_hw;
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/* NVM Function Pointers */
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switch (hw->mac.type) {
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case e1000_82580:
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nvm->ops.validate = igb_validate_nvm_checksum_82580;
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nvm->ops.update = igb_update_nvm_checksum_82580;
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nvm->ops.acquire = igb_acquire_nvm_82575;
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nvm->ops.release = igb_release_nvm_82575;
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if (nvm->word_size < (1 << 15))
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nvm->ops.read = igb_read_nvm_eerd;
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else
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nvm->ops.read = igb_read_nvm_spi;
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nvm->ops.write = igb_write_nvm_spi;
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break;
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case e1000_i350:
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nvm->ops.validate = igb_validate_nvm_checksum_i350;
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nvm->ops.update = igb_update_nvm_checksum_i350;
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nvm->ops.acquire = igb_acquire_nvm_82575;
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nvm->ops.release = igb_release_nvm_82575;
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if (nvm->word_size < (1 << 15))
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nvm->ops.read = igb_read_nvm_eerd;
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else
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nvm->ops.read = igb_read_nvm_spi;
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nvm->ops.write = igb_write_nvm_spi;
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break;
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case e1000_i210:
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nvm->ops.validate = igb_validate_nvm_checksum_i210;
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nvm->ops.update = igb_update_nvm_checksum_i210;
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nvm->ops.acquire = igb_acquire_nvm_i210;
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nvm->ops.release = igb_release_nvm_i210;
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nvm->ops.read = igb_read_nvm_srrd_i210;
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nvm->ops.write = igb_write_nvm_srwr_i210;
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nvm->ops.valid_led_default = igb_valid_led_default_i210;
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break;
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case e1000_i211:
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nvm->ops.acquire = igb_acquire_nvm_i210;
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nvm->ops.release = igb_release_nvm_i210;
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nvm->ops.read = igb_read_nvm_i211;
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nvm->ops.valid_led_default = igb_valid_led_default_i210;
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nvm->ops.validate = NULL;
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nvm->ops.update = NULL;
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nvm->ops.write = NULL;
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break;
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default:
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nvm->ops.validate = igb_validate_nvm_checksum;
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nvm->ops.update = igb_update_nvm_checksum;
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nvm->ops.acquire = igb_acquire_nvm_82575;
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nvm->ops.release = igb_release_nvm_82575;
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if (nvm->word_size < (1 << 15))
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nvm->ops.read = igb_read_nvm_eerd;
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else
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nvm->ops.read = igb_read_nvm_spi;
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nvm->ops.write = igb_write_nvm_spi;
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break;
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}
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ret_val = igb_init_nvm_params_82575(hw);
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if (ret_val)
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goto out;
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/* if part supports SR-IOV then initialize mailbox parameters */
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switch (mac->type) {
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@ -638,107 +495,10 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)
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}
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/* setup PHY parameters */
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if (phy->media_type != e1000_media_type_copper) {
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phy->type = e1000_phy_none;
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return 0;
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}
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ret_val = igb_init_phy_params_82575(hw);
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phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
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phy->reset_delay_us = 100;
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ctrl_ext = rd32(E1000_CTRL_EXT);
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/* PHY function pointers */
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if (igb_sgmii_active_82575(hw)) {
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phy->ops.reset = igb_phy_hw_reset_sgmii_82575;
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ctrl_ext |= E1000_CTRL_I2C_ENA;
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} else {
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phy->ops.reset = igb_phy_hw_reset;
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ctrl_ext &= ~E1000_CTRL_I2C_ENA;
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}
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wr32(E1000_CTRL_EXT, ctrl_ext);
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igb_reset_mdicnfg_82580(hw);
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if (igb_sgmii_active_82575(hw) && !igb_sgmii_uses_mdio_82575(hw)) {
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phy->ops.read_reg = igb_read_phy_reg_sgmii_82575;
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phy->ops.write_reg = igb_write_phy_reg_sgmii_82575;
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} else if ((hw->mac.type == e1000_82580)
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|| (hw->mac.type == e1000_i350)) {
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phy->ops.read_reg = igb_read_phy_reg_82580;
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phy->ops.write_reg = igb_write_phy_reg_82580;
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} else if (hw->phy.type >= e1000_phy_i210) {
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phy->ops.read_reg = igb_read_phy_reg_gs40g;
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phy->ops.write_reg = igb_write_phy_reg_gs40g;
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} else {
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phy->ops.read_reg = igb_read_phy_reg_igp;
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phy->ops.write_reg = igb_write_phy_reg_igp;
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}
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/* set lan id */
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hw->bus.func = (rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) >>
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E1000_STATUS_FUNC_SHIFT;
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/* Set phy->phy_addr and phy->id. */
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ret_val = igb_get_phy_id_82575(hw);
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if (ret_val)
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out:
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return ret_val;
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/* Verify phy id and set remaining function pointers */
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switch (phy->id) {
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case I347AT4_E_PHY_ID:
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case M88E1112_E_PHY_ID:
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case M88E1111_I_PHY_ID:
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phy->type = e1000_phy_m88;
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phy->ops.get_phy_info = igb_get_phy_info_m88;
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if (phy->id == I347AT4_E_PHY_ID ||
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phy->id == M88E1112_E_PHY_ID)
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phy->ops.get_cable_length = igb_get_cable_length_m88_gen2;
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else
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phy->ops.get_cable_length = igb_get_cable_length_m88;
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if (phy->id == I210_I_PHY_ID) {
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phy->ops.get_cable_length =
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igb_get_cable_length_m88_gen2;
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phy->ops.set_d0_lplu_state =
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igb_set_d0_lplu_state_82580;
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phy->ops.set_d3_lplu_state =
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igb_set_d3_lplu_state_82580;
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}
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phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88;
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break;
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case IGP03E1000_E_PHY_ID:
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phy->type = e1000_phy_igp_3;
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phy->ops.get_phy_info = igb_get_phy_info_igp;
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phy->ops.get_cable_length = igb_get_cable_length_igp_2;
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phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_igp;
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phy->ops.set_d0_lplu_state = igb_set_d0_lplu_state_82575;
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phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state;
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break;
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case I82580_I_PHY_ID:
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case I350_I_PHY_ID:
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phy->type = e1000_phy_82580;
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phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_82580;
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phy->ops.get_cable_length = igb_get_cable_length_82580;
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phy->ops.get_phy_info = igb_get_phy_info_82580;
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phy->ops.set_d0_lplu_state = igb_set_d0_lplu_state_82580;
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phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580;
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break;
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case I210_I_PHY_ID:
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phy->type = e1000_phy_i210;
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phy->ops.get_phy_info = igb_get_phy_info_m88;
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phy->ops.check_polarity = igb_check_polarity_m88;
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phy->ops.get_cable_length = igb_get_cable_length_m88_gen2;
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phy->ops.set_d0_lplu_state = igb_set_d0_lplu_state_82580;
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phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580;
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phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88;
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break;
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default:
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return -E1000_ERR_PHY;
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}
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return 0;
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}
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/**
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