soundwire: qcom: add auto enumeration support
Qualcomm SoundWire controller supports Auto Enumeration of the devices within the IP. This patch enables support for this feature. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20210330144719.13284-9-srinivas.kandagatla@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Srinivas Kandagatla
Vinod Koul
Родитель
01ad444e3b
Коммит
a6e6581942
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@ -57,6 +57,8 @@
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#define SWRM_CMD_FIFO_RD_FIFO_ADDR 0x318
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#define SWRM_RD_FIFO_CMD_ID_MASK GENMASK(11, 8)
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#define SWRM_ENUMERATOR_CFG_ADDR 0x500
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#define SWRM_ENUMERATOR_SLAVE_DEV_ID_1(m) (0x530 + 0x8 * (m))
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#define SWRM_ENUMERATOR_SLAVE_DEV_ID_2(m) (0x534 + 0x8 * (m))
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#define SWRM_MCP_FRAME_CTRL_BANK_ADDR(m) (0x101C + 0x40 * (m))
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#define SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK GENMASK(2, 0)
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#define SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK GENMASK(7, 3)
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@ -143,6 +145,7 @@ struct qcom_swrm_ctrl {
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enum sdw_slave_status status[SDW_MAX_DEVICES];
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int (*reg_read)(struct qcom_swrm_ctrl *ctrl, int reg, u32 *val);
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int (*reg_write)(struct qcom_swrm_ctrl *ctrl, int reg, int val);
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u32 slave_status;
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};
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struct qcom_swrm_data {
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@ -343,6 +346,7 @@ static void qcom_swrm_get_device_status(struct qcom_swrm_ctrl *ctrl)
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int i;
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ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val);
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ctrl->slave_status = val;
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for (i = 0; i < SDW_MAX_DEVICES; i++) {
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u32 s;
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@ -353,10 +357,74 @@ static void qcom_swrm_get_device_status(struct qcom_swrm_ctrl *ctrl)
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}
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}
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static void qcom_swrm_set_slave_dev_num(struct sdw_bus *bus,
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struct sdw_slave *slave, int devnum)
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{
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struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);
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u32 status;
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ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &status);
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status = (status >> (devnum * SWRM_MCP_SLV_STATUS_SZ));
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status &= SWRM_MCP_SLV_STATUS_MASK;
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if (status == SDW_SLAVE_ATTACHED) {
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if (slave)
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slave->dev_num = devnum;
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mutex_lock(&bus->bus_lock);
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set_bit(devnum, bus->assigned);
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mutex_unlock(&bus->bus_lock);
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}
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}
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static int qcom_swrm_enumerate(struct sdw_bus *bus)
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{
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struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);
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struct sdw_slave *slave, *_s;
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struct sdw_slave_id id;
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u32 val1, val2;
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bool found;
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u64 addr;
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int i;
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char *buf1 = (char *)&val1, *buf2 = (char *)&val2;
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for (i = 1; i <= SDW_MAX_DEVICES; i++) {
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/*SCP_Devid5 - Devid 4*/
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ctrl->reg_read(ctrl, SWRM_ENUMERATOR_SLAVE_DEV_ID_1(i), &val1);
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/*SCP_Devid3 - DevId 2 Devid 1 Devid 0*/
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ctrl->reg_read(ctrl, SWRM_ENUMERATOR_SLAVE_DEV_ID_2(i), &val2);
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if (!val1 && !val2)
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break;
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addr = buf2[1] | (buf2[0] << 8) | (buf1[3] << 16) |
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((u64)buf1[2] << 24) | ((u64)buf1[1] << 32) |
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((u64)buf1[0] << 40);
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sdw_extract_slave_id(bus, addr, &id);
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found = false;
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/* Now compare with entries */
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list_for_each_entry_safe(slave, _s, &bus->slaves, node) {
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if (sdw_compare_devid(slave, id) == 0) {
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qcom_swrm_set_slave_dev_num(bus, slave, i);
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found = true;
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break;
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}
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}
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if (!found) {
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qcom_swrm_set_slave_dev_num(bus, NULL, i);
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sdw_slave_add(bus, &id, NULL);
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}
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}
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return 0;
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}
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static irqreturn_t qcom_swrm_irq_handler(int irq, void *dev_id)
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{
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struct qcom_swrm_ctrl *swrm = dev_id;
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u32 value, intr_sts, intr_sts_masked;
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u32 value, intr_sts, intr_sts_masked, slave_status;
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u32 i;
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u8 devnum = 0;
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int ret = IRQ_HANDLED;
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@ -385,8 +453,15 @@ static irqreturn_t qcom_swrm_irq_handler(int irq, void *dev_id)
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case SWRM_INTERRUPT_STATUS_CHANGE_ENUM_SLAVE_STATUS:
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dev_err_ratelimited(swrm->dev, "%s: SWR new slave attached\n",
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__func__);
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qcom_swrm_get_device_status(swrm);
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sdw_handle_slave_status(&swrm->bus, swrm->status);
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swrm->reg_read(swrm, SWRM_MCP_SLV_STATUS, &slave_status);
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if (swrm->slave_status == slave_status) {
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dev_err(swrm->dev, "Slave status not changed %x\n",
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slave_status);
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} else {
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qcom_swrm_get_device_status(swrm);
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qcom_swrm_enumerate(&swrm->bus);
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sdw_handle_slave_status(&swrm->bus, swrm->status);
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}
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break;
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case SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET:
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dev_err_ratelimited(swrm->dev,
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@ -473,8 +548,8 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
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ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);
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/* Disable Auto enumeration */
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ctrl->reg_write(ctrl, SWRM_ENUMERATOR_CFG_ADDR, 0);
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/* Enable Auto enumeration */
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ctrl->reg_write(ctrl, SWRM_ENUMERATOR_CFG_ADDR, 1);
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ctrl->intr_mask = SWRM_INTERRUPT_STATUS_RMSK;
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/* Mask soundwire interrupts */
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@ -508,6 +583,7 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
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ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN,
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SWRM_INTERRUPT_STATUS_RMSK);
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}
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ctrl->slave_status = 0;
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return 0;
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}
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