iio: adc: intel_mrfld_adc: Add Basin Cove ADC driver
Exposes the ADC device present on, at least, Intel Merrifield platform. Based on work done by: Yang Bin <bin.yang@intel.com> Huiquan Zhong <huiquan.zhong@intel.com> Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Pavan Kumar S <pavan.kumar.s@intel.com> Though it has been heavily rewritten for upstream. Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Vincent Pelletier
Jonathan Cameron
Родитель
eb1850c562
Коммит
a711866273
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@ -432,6 +432,17 @@ config INGENIC_ADC
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This driver can also be built as a module. If so, the module will be
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called ingenic_adc.
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config INTEL_MRFLD_ADC
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tristate "Intel Merrifield Basin Cove ADC driver"
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depends on INTEL_SOC_PMIC_MRFLD
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help
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Say yes here to have support for Basin Cove power management IC (PMIC) ADC
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device. Depending on platform configuration, this general purpose ADC can
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be used for sampling sensors such as thermal resistors.
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To compile this driver as a module, choose M here: the module will be
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called intel_mrfld_adc.
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config IMX7D_ADC
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tristate "Freescale IMX7D ADC driver"
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depends on ARCH_MXC || COMPILE_TEST
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@ -42,6 +42,7 @@ obj-$(CONFIG_HX711) += hx711.o
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obj-$(CONFIG_IMX7D_ADC) += imx7d_adc.o
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obj-$(CONFIG_INA2XX_ADC) += ina2xx-adc.o
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obj-$(CONFIG_INGENIC_ADC) += ingenic-adc.o
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obj-$(CONFIG_INTEL_MRFLD_ADC) += intel_mrfld_adc.o
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obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
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obj-$(CONFIG_LPC18XX_ADC) += lpc18xx_adc.o
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obj-$(CONFIG_LPC32XX_ADC) += lpc32xx_adc.o
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@ -0,0 +1,262 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* ADC driver for Basin Cove PMIC
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*
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* Copyright (C) 2012 Intel Corporation
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* Author: Bin Yang <bin.yang@intel.com>
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*
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* Rewritten for upstream by:
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* Vincent Pelletier <plr.vincent@gmail.com>
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* Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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*/
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#include <linux/bitops.h>
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#include <linux/completion.h>
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#include <linux/interrupt.h>
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#include <linux/mfd/intel_soc_pmic.h>
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#include <linux/mfd/intel_soc_pmic_mrfld.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/iio/driver.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/machine.h>
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#include <asm/unaligned.h>
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#define BCOVE_GPADCREQ 0xDC
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#define BCOVE_GPADCREQ_BUSY BIT(0)
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#define BCOVE_GPADCREQ_IRQEN BIT(1)
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#define BCOVE_ADCIRQ_ALL ( \
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BCOVE_ADCIRQ_BATTEMP | \
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BCOVE_ADCIRQ_SYSTEMP | \
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BCOVE_ADCIRQ_BATTID | \
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BCOVE_ADCIRQ_VIBATT | \
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BCOVE_ADCIRQ_CCTICK)
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#define BCOVE_ADC_TIMEOUT msecs_to_jiffies(1000)
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static const u8 mrfld_adc_requests[] = {
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BCOVE_ADCIRQ_VIBATT,
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BCOVE_ADCIRQ_BATTID,
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BCOVE_ADCIRQ_VIBATT,
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BCOVE_ADCIRQ_SYSTEMP,
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BCOVE_ADCIRQ_BATTEMP,
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BCOVE_ADCIRQ_BATTEMP,
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BCOVE_ADCIRQ_SYSTEMP,
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BCOVE_ADCIRQ_SYSTEMP,
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BCOVE_ADCIRQ_SYSTEMP,
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};
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struct mrfld_adc {
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struct regmap *regmap;
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struct completion completion;
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/* Lock to protect the IPC transfers */
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struct mutex lock;
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};
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static irqreturn_t mrfld_adc_thread_isr(int irq, void *data)
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{
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struct iio_dev *indio_dev = data;
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struct mrfld_adc *adc = iio_priv(indio_dev);
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complete(&adc->completion);
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return IRQ_HANDLED;
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}
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static int mrfld_adc_single_conv(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *result)
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{
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struct mrfld_adc *adc = iio_priv(indio_dev);
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struct regmap *regmap = adc->regmap;
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unsigned int req;
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long timeout;
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u8 buf[2];
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int ret;
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reinit_completion(&adc->completion);
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regmap_update_bits(regmap, BCOVE_MADCIRQ, BCOVE_ADCIRQ_ALL, 0);
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regmap_update_bits(regmap, BCOVE_MIRQLVL1, BCOVE_LVL1_ADC, 0);
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ret = regmap_read_poll_timeout(regmap, BCOVE_GPADCREQ, req,
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!(req & BCOVE_GPADCREQ_BUSY),
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2000, 1000000);
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if (ret)
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goto done;
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req = mrfld_adc_requests[chan->channel];
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ret = regmap_write(regmap, BCOVE_GPADCREQ, BCOVE_GPADCREQ_IRQEN | req);
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if (ret)
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goto done;
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timeout = wait_for_completion_interruptible_timeout(&adc->completion,
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BCOVE_ADC_TIMEOUT);
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if (timeout < 0) {
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ret = timeout;
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goto done;
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}
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if (timeout == 0) {
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ret = -ETIMEDOUT;
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goto done;
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}
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ret = regmap_bulk_read(regmap, chan->address, buf, 2);
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if (ret)
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goto done;
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*result = get_unaligned_be16(buf);
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ret = IIO_VAL_INT;
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done:
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regmap_update_bits(regmap, BCOVE_MIRQLVL1, BCOVE_LVL1_ADC, 0xff);
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regmap_update_bits(regmap, BCOVE_MADCIRQ, BCOVE_ADCIRQ_ALL, 0xff);
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return ret;
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}
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static int mrfld_adc_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct mrfld_adc *adc = iio_priv(indio_dev);
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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mutex_lock(&adc->lock);
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ret = mrfld_adc_single_conv(indio_dev, chan, val);
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mutex_unlock(&adc->lock);
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return ret;
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default:
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return -EINVAL;
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}
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}
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static const struct iio_info mrfld_adc_iio_info = {
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.read_raw = &mrfld_adc_read_raw,
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};
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#define BCOVE_ADC_CHANNEL(_type, _channel, _datasheet_name, _address) \
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{ \
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.indexed = 1, \
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.type = _type, \
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.channel = _channel, \
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.address = _address, \
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.datasheet_name = _datasheet_name, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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}
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static const struct iio_chan_spec mrfld_adc_channels[] = {
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BCOVE_ADC_CHANNEL(IIO_VOLTAGE, 0, "CH0", 0xE9),
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BCOVE_ADC_CHANNEL(IIO_RESISTANCE, 1, "CH1", 0xEB),
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BCOVE_ADC_CHANNEL(IIO_CURRENT, 2, "CH2", 0xED),
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BCOVE_ADC_CHANNEL(IIO_TEMP, 3, "CH3", 0xCC),
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BCOVE_ADC_CHANNEL(IIO_TEMP, 4, "CH4", 0xC8),
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BCOVE_ADC_CHANNEL(IIO_TEMP, 5, "CH5", 0xCA),
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BCOVE_ADC_CHANNEL(IIO_TEMP, 6, "CH6", 0xC2),
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BCOVE_ADC_CHANNEL(IIO_TEMP, 7, "CH7", 0xC4),
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BCOVE_ADC_CHANNEL(IIO_TEMP, 8, "CH8", 0xC6),
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};
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static struct iio_map iio_maps[] = {
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IIO_MAP("CH0", "bcove-battery", "VBATRSLT"),
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IIO_MAP("CH1", "bcove-battery", "BATTID"),
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IIO_MAP("CH2", "bcove-battery", "IBATRSLT"),
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IIO_MAP("CH3", "bcove-temp", "PMICTEMP"),
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IIO_MAP("CH4", "bcove-temp", "BATTEMP0"),
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IIO_MAP("CH5", "bcove-temp", "BATTEMP1"),
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IIO_MAP("CH6", "bcove-temp", "SYSTEMP0"),
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IIO_MAP("CH7", "bcove-temp", "SYSTEMP1"),
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IIO_MAP("CH8", "bcove-temp", "SYSTEMP2"),
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{}
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};
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static int mrfld_adc_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct intel_soc_pmic *pmic = dev_get_drvdata(dev->parent);
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struct iio_dev *indio_dev;
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struct mrfld_adc *adc;
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int irq;
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int ret;
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indio_dev = devm_iio_device_alloc(dev, sizeof(*indio_dev));
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if (!indio_dev)
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return -ENOMEM;
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adc = iio_priv(indio_dev);
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mutex_init(&adc->lock);
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init_completion(&adc->completion);
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adc->regmap = pmic->regmap;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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ret = devm_request_threaded_irq(dev, irq, NULL, mrfld_adc_thread_isr,
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IRQF_ONESHOT | IRQF_SHARED, pdev->name,
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indio_dev);
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if (ret)
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return ret;
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platform_set_drvdata(pdev, indio_dev);
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indio_dev->dev.parent = dev;
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indio_dev->name = pdev->name;
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indio_dev->channels = mrfld_adc_channels;
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indio_dev->num_channels = ARRAY_SIZE(mrfld_adc_channels);
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indio_dev->info = &mrfld_adc_iio_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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ret = iio_map_array_register(indio_dev, iio_maps);
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if (ret)
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return ret;
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ret = devm_iio_device_register(dev, indio_dev);
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if (ret < 0)
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goto err_array_unregister;
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return 0;
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err_array_unregister:
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iio_map_array_unregister(indio_dev);
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return ret;
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}
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static int mrfld_adc_remove(struct platform_device *pdev)
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{
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struct iio_dev *indio_dev = platform_get_drvdata(pdev);
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iio_map_array_unregister(indio_dev);
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return 0;
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}
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static const struct platform_device_id mrfld_adc_id_table[] = {
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{ .name = "mrfld_bcove_adc" },
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{}
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};
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MODULE_DEVICE_TABLE(platform, mrfld_adc_id_table);
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static struct platform_driver mrfld_adc_driver = {
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.driver = {
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.name = "mrfld_bcove_adc",
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},
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.probe = mrfld_adc_probe,
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.remove = mrfld_adc_remove,
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.id_table = mrfld_adc_id_table,
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};
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module_platform_driver(mrfld_adc_driver);
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MODULE_AUTHOR("Bin Yang <bin.yang@intel.com>");
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MODULE_AUTHOR("Vincent Pelletier <plr.vincent@gmail.com>");
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MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
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MODULE_DESCRIPTION("ADC driver for Basin Cove PMIC");
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MODULE_LICENSE("GPL v2");
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