bnx2x: Fix link down in 57712 following LFA
In case of link flap avoidance between PXE boot and bnx2x, set the appropriate PHY DEVAD even if LFA kicks in. Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Barak Witkowski <barak@broadcom.com> Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -3295,6 +3295,21 @@ static void bnx2x_serdes_deassert(struct bnx2x *bp, u8 port)
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DEFAULT_PHY_DEV_ADDR);
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}
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static void bnx2x_xgxs_specific_func(struct bnx2x_phy *phy,
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struct link_params *params,
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u32 action)
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{
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struct bnx2x *bp = params->bp;
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switch (action) {
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case PHY_INIT:
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/* Set correct devad */
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REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + params->port*0x18, 0);
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REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + params->port*0x18,
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phy->def_md_devad);
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break;
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}
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}
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static void bnx2x_xgxs_deassert(struct link_params *params)
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{
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struct bnx2x *bp = params->bp;
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@ -3309,10 +3324,8 @@ static void bnx2x_xgxs_deassert(struct link_params *params)
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REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR, val);
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udelay(500);
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REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, val);
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REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + port*0x18, 0);
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REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18,
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params->phy[INT_PHY].def_md_devad);
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bnx2x_xgxs_specific_func(¶ms->phy[INT_PHY], params,
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PHY_INIT);
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}
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static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy,
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@ -10999,7 +11012,7 @@ static struct bnx2x_phy phy_xgxs = {
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.format_fw_ver = (format_fw_ver_t)NULL,
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.hw_reset = (hw_reset_t)NULL,
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.set_link_led = (set_link_led_t)NULL,
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.phy_specific_func = (phy_specific_func_t)NULL
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.phy_specific_func = (phy_specific_func_t)bnx2x_xgxs_specific_func
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};
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static struct bnx2x_phy phy_warpcore = {
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.type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT,
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