Fix a suspend/resume regression (crash) on TI AM3/AM4 SoC's.
Signed-off-by: Ingo Molnar <mingo@kernel.org> -----BEGIN PGP SIGNATURE----- iQJFBAABCgAvFiEEBpT5eoXrXCwVQwEKEnMQ0APhK1gFAl8cDeIRHG1pbmdvQGtl cm5lbC5vcmcACgkQEnMQ0APhK1gVeA/8Cs67mJ9j3oto917z1GLElBVy7A+od/Pn TqWEtwmonJA/ZM/TvuvfFxHFg6kgPlDx0x5pHYUows/8DGsftdveDQw4bGhrCN0i Xghcn4gB+jdOaykpLQacEukYt/nPU0IOf79XqySiu774lWHvzwQI+2MIb7xBHBMO npUXFzgeSlgjFkMm1lVa9QVPwVc1zQ6gKPJdLpDlrgW3cCrenM7QCAg3NG3Gx5TT OXK4QZEvIuym+HWwbZRA2mOUSjm8U1Z1o95jiWUro7o5Xe+Agqi5zsLJc7lxX57+ LYwrXNx/zPZ+oBlzZhZZrAxn1bJP7DVS13ZCEL9Miy0Uslr7QBPyoGHiV4P8tL3v cOn7kY+P7YT96Fx3ahkK3pJN+nUZIAsRrwZbgOP4bZHKdVi3zqUEilSdZNcXBZ9y nj9mY/2pX9SOMIvoaosku2hkKs5EKIkh3qzhvbfA8fXsQC3lttrPGRW7hgPmxm7W Fa+6liOi+t+d0rGgmi1fhHSn/L2gzmsLy5R1l6XyK15nDSALd4TrdtDrlJ8vbbl5 oRAN9mt9qPqNCQQKjcnAIXuPeJp2Pt6KphlPApHVa3J/eVzug1dFWyjia/e+js8W Gejz1TV6SDdU137TmC4E6suAZ5nRSEBwiE+MiNnnG0DIvz7cp5FSIWCXOgt5WPl5 BXS4CSwnF24= =7P/h -----END PGP SIGNATURE----- Merge tag 'timers-urgent-2020-07-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into master Pull timer fix from Ingo Molnar: "Fix a suspend/resume regression (crash) on TI AM3/AM4 SoC's" * tag 'timers-urgent-2020-07-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource/drivers/timer-ti-dm: Fix suspend and resume for am3 and am4
This commit is contained in:
Linus Torvalds
Коммит
a7b36c2b13
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@ -2865,6 +2865,24 @@ static int sysc_check_disabled_devices(struct sysc *ddata)
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return error;
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}
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/*
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* Ignore timers tagged with no-reset and no-idle. These are likely in use,
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* for example by drivers/clocksource/timer-ti-dm-systimer.c. If more checks
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* are needed, we could also look at the timer register configuration.
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*/
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static int sysc_check_active_timer(struct sysc *ddata)
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{
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if (ddata->cap->type != TI_SYSC_OMAP2_TIMER &&
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ddata->cap->type != TI_SYSC_OMAP4_TIMER)
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return 0;
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if ((ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) &&
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(ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE))
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return -EBUSY;
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return 0;
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}
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static const struct of_device_id sysc_match_table[] = {
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{ .compatible = "simple-bus", },
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{ /* sentinel */ },
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@ -2921,6 +2939,10 @@ static int sysc_probe(struct platform_device *pdev)
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if (error)
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return error;
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error = sysc_check_active_timer(ddata);
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if (error)
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return error;
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error = sysc_get_clocks(ddata);
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if (error)
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return error;
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@ -19,7 +19,7 @@
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/* For type1, set SYSC_OMAP2_CLOCKACTIVITY for fck off on idle, l4 clock on */
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#define DMTIMER_TYPE1_ENABLE ((1 << 9) | (SYSC_IDLE_SMART << 3) | \
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SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_AUTOIDLE)
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#define DMTIMER_TYPE1_DISABLE (SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)
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#define DMTIMER_TYPE2_ENABLE (SYSC_IDLE_SMART_WKUP << 2)
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#define DMTIMER_RESET_WAIT 100000
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@ -44,6 +44,8 @@ struct dmtimer_systimer {
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u8 ctrl;
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u8 wakeup;
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u8 ifctrl;
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struct clk *fck;
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struct clk *ick;
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unsigned long rate;
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};
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@ -298,16 +300,20 @@ static void __init dmtimer_systimer_select_best(void)
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}
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/* Interface clocks are only available on some SoCs variants */
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static int __init dmtimer_systimer_init_clock(struct device_node *np,
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static int __init dmtimer_systimer_init_clock(struct dmtimer_systimer *t,
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struct device_node *np,
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const char *name,
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unsigned long *rate)
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{
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struct clk *clock;
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unsigned long r;
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bool is_ick = false;
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int error;
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is_ick = !strncmp(name, "ick", 3);
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clock = of_clk_get_by_name(np, name);
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if ((PTR_ERR(clock) == -EINVAL) && !strncmp(name, "ick", 3))
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if ((PTR_ERR(clock) == -EINVAL) && is_ick)
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return 0;
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else if (IS_ERR(clock))
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return PTR_ERR(clock);
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@ -320,6 +326,11 @@ static int __init dmtimer_systimer_init_clock(struct device_node *np,
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if (!r)
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return -ENODEV;
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if (is_ick)
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t->ick = clock;
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else
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t->fck = clock;
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*rate = r;
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return 0;
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@ -339,7 +350,10 @@ static void dmtimer_systimer_enable(struct dmtimer_systimer *t)
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static void dmtimer_systimer_disable(struct dmtimer_systimer *t)
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{
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writel_relaxed(0, t->base + t->sysc);
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if (!dmtimer_systimer_revision1(t))
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return;
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writel_relaxed(DMTIMER_TYPE1_DISABLE, t->base + t->sysc);
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}
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static int __init dmtimer_systimer_setup(struct device_node *np,
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@ -366,13 +380,13 @@ static int __init dmtimer_systimer_setup(struct device_node *np,
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pr_err("%s: clock source init failed: %i\n", __func__, error);
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/* For ti-sysc, we have timer clocks at the parent module level */
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error = dmtimer_systimer_init_clock(np->parent, "fck", &rate);
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error = dmtimer_systimer_init_clock(t, np->parent, "fck", &rate);
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if (error)
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goto err_unmap;
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t->rate = rate;
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error = dmtimer_systimer_init_clock(np->parent, "ick", &rate);
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error = dmtimer_systimer_init_clock(t, np->parent, "ick", &rate);
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if (error)
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goto err_unmap;
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@ -496,12 +510,18 @@ static void omap_clockevent_idle(struct clock_event_device *evt)
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struct dmtimer_systimer *t = &clkevt->t;
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dmtimer_systimer_disable(t);
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clk_disable(t->fck);
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}
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static void omap_clockevent_unidle(struct clock_event_device *evt)
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{
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struct dmtimer_clockevent *clkevt = to_dmtimer_clockevent(evt);
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struct dmtimer_systimer *t = &clkevt->t;
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int error;
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error = clk_enable(t->fck);
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if (error)
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pr_err("could not enable timer fck on resume: %i\n", error);
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dmtimer_systimer_enable(t);
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writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->irq_ena);
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@ -570,8 +590,8 @@ static int __init dmtimer_clockevent_init(struct device_node *np)
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3, /* Timer internal resynch latency */
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0xffffffff);
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if (of_device_is_compatible(np, "ti,am33xx") ||
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of_device_is_compatible(np, "ti,am43")) {
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if (of_machine_is_compatible("ti,am33xx") ||
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of_machine_is_compatible("ti,am43")) {
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dev->suspend = omap_clockevent_idle;
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dev->resume = omap_clockevent_unidle;
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}
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@ -616,12 +636,18 @@ static void dmtimer_clocksource_suspend(struct clocksource *cs)
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clksrc->loadval = readl_relaxed(t->base + t->counter);
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dmtimer_systimer_disable(t);
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clk_disable(t->fck);
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}
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static void dmtimer_clocksource_resume(struct clocksource *cs)
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{
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struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs);
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struct dmtimer_systimer *t = &clksrc->t;
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int error;
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error = clk_enable(t->fck);
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if (error)
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pr_err("could not enable timer fck on resume: %i\n", error);
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dmtimer_systimer_enable(t);
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writel_relaxed(clksrc->loadval, t->base + t->counter);
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@ -653,8 +679,8 @@ static int __init dmtimer_clocksource_init(struct device_node *np)
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dev->mask = CLOCKSOURCE_MASK(32);
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dev->flags = CLOCK_SOURCE_IS_CONTINUOUS;
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if (of_device_is_compatible(np, "ti,am33xx") ||
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of_device_is_compatible(np, "ti,am43")) {
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/* Unlike for clockevent, legacy code sets suspend only for am4 */
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if (of_machine_is_compatible("ti,am43")) {
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dev->suspend = dmtimer_clocksource_suspend;
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dev->resume = dmtimer_clocksource_resume;
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}
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