sfc: Allow resets to be upgraded; use atomic ops for safety
Currently an attempt to schedule any reset is ignored if a reset is already pending. This ignores the relative scopes - if the requested reset is greater in scope then the scheduled reset should be upgraded accordingly. There are also some race conditions which could lead to a reset request being lost. Deal with them by using atomic operations on a bitmask. This also makes tests on reset_pending easier to get right. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
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4017dbdc14
Коммит
a7d529ae21
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@ -229,8 +229,7 @@ static int efx_process_channel(struct efx_channel *channel, int budget)
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struct efx_nic *efx = channel->efx;
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int spent;
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if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
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!channel->enabled))
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if (unlikely(efx->reset_pending || !channel->enabled))
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return 0;
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spent = efx_nic_process_eventq(channel, budget);
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@ -1461,7 +1460,7 @@ static void efx_start_all(struct efx_nic *efx)
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* reset_pending [modified from an atomic context], we instead guarantee
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* that efx_mcdi_mode_poll() isn't reverted erroneously */
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efx_mcdi_mode_event(efx);
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if (efx->reset_pending != RESET_TYPE_NONE)
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if (efx->reset_pending)
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efx_mcdi_mode_poll(efx);
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/* Start the hardware monitor if there is one. Otherwise (we're link
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@ -2118,8 +2117,10 @@ int efx_reset(struct efx_nic *efx, enum reset_type method)
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goto out;
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}
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/* Allow resets to be rescheduled. */
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efx->reset_pending = RESET_TYPE_NONE;
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/* Clear flags for the scopes we covered. We assume the NIC and
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* driver are now quiescent so that there is no race here.
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*/
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efx->reset_pending &= -(1 << (method + 1));
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/* Reinitialise bus-mastering, which may have been turned off before
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* the reset was scheduled. This is still appropriate, even in the
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@ -2154,12 +2155,13 @@ out:
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static void efx_reset_work(struct work_struct *data)
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{
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struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
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unsigned long pending = ACCESS_ONCE(efx->reset_pending);
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if (efx->reset_pending == RESET_TYPE_NONE)
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if (!pending)
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return;
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/* If we're not RUNNING then don't reset. Leave the reset_pending
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* flag set so that efx_pci_probe_main will be retried */
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* flags set so that efx_pci_probe_main will be retried */
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if (efx->state != STATE_RUNNING) {
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netif_info(efx, drv, efx->net_dev,
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"scheduled reset quenched. NIC not RUNNING\n");
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@ -2167,7 +2169,7 @@ static void efx_reset_work(struct work_struct *data)
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}
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rtnl_lock();
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(void)efx_reset(efx, efx->reset_pending);
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(void)efx_reset(efx, fls(pending) - 1);
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rtnl_unlock();
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}
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@ -2175,12 +2177,6 @@ void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
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{
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enum reset_type method;
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if (efx->reset_pending != RESET_TYPE_NONE) {
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netif_info(efx, drv, efx->net_dev,
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"quenching already scheduled reset\n");
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return;
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}
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switch (type) {
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case RESET_TYPE_INVISIBLE:
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case RESET_TYPE_ALL:
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@ -2208,7 +2204,7 @@ void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
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netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
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RESET_TYPE(method));
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efx->reset_pending = method;
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set_bit(method, &efx->reset_pending);
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/* efx_process_channel() will no longer read events once a
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* reset is scheduled. So switch back to poll'd MCDI completions. */
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@ -2288,7 +2284,6 @@ static int efx_init_struct(struct efx_nic *efx, const struct efx_nic_type *type,
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efx->pci_dev = pci_dev;
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efx->msg_enable = debug;
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efx->state = STATE_INIT;
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efx->reset_pending = RESET_TYPE_NONE;
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strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
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efx->net_dev = net_dev;
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@ -2510,7 +2505,7 @@ static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
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cancel_work_sync(&efx->reset_work);
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if (rc == 0) {
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if (efx->reset_pending != RESET_TYPE_NONE) {
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if (efx->reset_pending) {
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/* If there was a scheduled reset during
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* probe, the NIC is probably hosed anyway */
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efx_pci_remove_main(efx);
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@ -2521,11 +2516,12 @@ static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
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}
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/* Retry if a recoverably reset event has been scheduled */
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if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
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(efx->reset_pending != RESET_TYPE_ALL))
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if (efx->reset_pending &
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~(1 << RESET_TYPE_INVISIBLE | 1 << RESET_TYPE_ALL) ||
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!efx->reset_pending)
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goto fail3;
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efx->reset_pending = RESET_TYPE_NONE;
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efx->reset_pending = 0;
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}
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if (rc) {
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@ -2609,7 +2605,7 @@ static int efx_pm_poweroff(struct device *dev)
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efx->type->fini(efx);
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efx->reset_pending = RESET_TYPE_NONE;
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efx->reset_pending = 0;
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pci_save_state(pci_dev);
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return pci_set_power_state(pci_dev, PCI_D3hot);
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@ -134,6 +134,8 @@ enum efx_loopback_mode {
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* other valuesspecify reasons, which efx_schedule_reset() will choose
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* a method for.
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*
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* Reset methods are numbered in order of increasing scope.
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*
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* @RESET_TYPE_INVISIBLE: don't reset the PHYs or interrupts
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* @RESET_TYPE_ALL: reset everything but PCI core blocks
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* @RESET_TYPE_WORLD: reset everything, save & restore PCI config
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@ -147,7 +149,6 @@ enum efx_loopback_mode {
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* @RESET_TYPE_MC_FAILURE: MC reboot/assertion
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*/
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enum reset_type {
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RESET_TYPE_NONE = -1,
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RESET_TYPE_INVISIBLE = 0,
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RESET_TYPE_ALL = 1,
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RESET_TYPE_WORLD = 2,
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@ -536,7 +536,7 @@ void falcon_reconfigure_mac_wrapper(struct efx_nic *efx)
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efx_oword_t reg;
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int link_speed, isolate;
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isolate = (efx->reset_pending != RESET_TYPE_NONE);
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isolate = !!ACCESS_ONCE(efx->reset_pending);
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switch (link_state->speed) {
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case 10000: link_speed = 3; break;
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@ -645,7 +645,7 @@ struct efx_filter_state;
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* @irq_rx_moderation: IRQ moderation time for RX event queues
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* @msg_enable: Log message enable flags
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* @state: Device state flag. Serialised by the rtnl_lock.
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* @reset_pending: Pending reset method (normally RESET_TYPE_NONE)
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* @reset_pending: Bitmask for pending resets
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* @tx_queue: TX DMA queues
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* @rx_queue: RX DMA queues
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* @channel: Channels
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@ -728,7 +728,7 @@ struct efx_nic {
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u32 msg_enable;
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enum nic_state state;
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enum reset_type reset_pending;
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unsigned long reset_pending;
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struct efx_channel *channel[EFX_MAX_CHANNELS];
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char channel_name[EFX_MAX_CHANNELS][IFNAMSIZ + 6];
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