Allwinner SoC additions for 3.14
Two drivers are merged through for 3.14: - The A10/A20 RTC driver - The A31 reset controller IP -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJStL8PAAoJEBx+YmzsjxAg6rMP/39ZGMeKoUVpbcm1kFR12sYd WKj1D2QxYG9gljs06esH9R//Kfs4eWdkFKQuTxkaE7gL44ShTQe6BH9GEsmu+Kv0 Rv30NICUb2/OlMxZxwg6Of9kjuK4M0xQGPJlwRZfhIQ1MikWwLeq579TQO1QLjsi OdEtOMe9VpUq+igKPxmN24WtdFN7EHJ64ei06TYXNLCKlAph1/0wgxdX99Mc7Un2 pVOcmDSu2tqadAVyU0mpfAws0UKCrM+MHaMfoRXSnpTp8EpIoSbtwAsacc+WmMaw Wx0OI2+N6+3p8b3F8LDajJmdpLBlaVZzrM1VfTaZQ+e57fOnTU72q1f9tOXYnUPo vKyh1EO02O93TSQpSuGzZ51+7vTi6kuimSZgHcDNMhRpeqIaO+cm94DeLpRpwi/F FmfaQ5ixzD+jxCtRl2dzSHInxvGGPu20/7pmVK9qQBc39GliKJU3Ca3G86FjibzK B+1aWfPUTZ0gRIlvQ7VYruPTtXbKJKr8WIU1mpCpCVlkpiSISZR2meSlZhDrzeVq +Y2w4Jvy6wbqb6jCV1ivNuB3Hg9Xlqz+cjGJEkZ5Y6izbN/YANf+02StB4oFody5 l7eRme7t/CkYgaBlQYJp4dkbGhdA+kIozbunqtg4p8rgo6mGiTP03hcnpEiUM9n3 nVvAIkZE8mc1GZBTXnHa =7spL -----END PGP SIGNATURE----- Merge tag 'sunxi-drivers-for-3.14' of https://github.com/mripard/linux into next/drivers From Maxime Ripard: Allwinner SoC additions for 3.14 Two drivers are merged through for 3.14: - The A10/A20 RTC driver - The A31 reset controller IP * tag 'sunxi-drivers-for-3.14' of https://github.com/mripard/linux: ARM: sun4i/sun7i: RTC driver ARM: sun4i/sun7i: DT documentation for RTC driver reset: Add Allwinner SoCs Reset Controller Driver Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
Коммит
a7fb16fad6
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@ -0,0 +1,17 @@
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* sun4i/sun7i Real Time Clock
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RTC controller for the Allwinner A10/A20
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Required properties:
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- compatible : Should be "allwinner,sun4i-rtc" or "allwinner,sun7i-a20-rtc"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: IRQ line for the RTC.
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Example:
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rtc: rtc@01c20d00 {
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compatible = "allwinner,sun4i-rtc";
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reg = <0x01c20d00 0x20>;
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interrupts = <24>;
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};
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@ -1 +1,2 @@
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obj-$(CONFIG_RESET_CONTROLLER) += core.o
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obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
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@ -0,0 +1,175 @@
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/*
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* Allwinner SoCs Reset Controller driver
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*
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* Copyright 2013 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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struct sunxi_reset_data {
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spinlock_t lock;
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void __iomem *membase;
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struct reset_controller_dev rcdev;
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};
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static int sunxi_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct sunxi_reset_data *data = container_of(rcdev,
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struct sunxi_reset_data,
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rcdev);
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int bank = id / BITS_PER_LONG;
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int offset = id % BITS_PER_LONG;
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unsigned long flags;
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u32 reg;
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spin_lock_irqsave(&data->lock, flags);
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reg = readl(data->membase + (bank * 4));
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writel(reg & ~BIT(offset), data->membase + (bank * 4));
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spin_unlock_irqrestore(&data->lock, flags);
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return 0;
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}
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static int sunxi_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct sunxi_reset_data *data = container_of(rcdev,
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struct sunxi_reset_data,
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rcdev);
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int bank = id / BITS_PER_LONG;
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int offset = id % BITS_PER_LONG;
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unsigned long flags;
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u32 reg;
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spin_lock_irqsave(&data->lock, flags);
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reg = readl(data->membase + (bank * 4));
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writel(reg | BIT(offset), data->membase + (bank * 4));
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spin_unlock_irqrestore(&data->lock, flags);
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return 0;
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}
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static struct reset_control_ops sunxi_reset_ops = {
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.assert = sunxi_reset_assert,
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.deassert = sunxi_reset_deassert,
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};
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static int sunxi_reset_init(struct device_node *np)
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{
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struct sunxi_reset_data *data;
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struct resource res;
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resource_size_t size;
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int ret;
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data = kzalloc(sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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ret = of_address_to_resource(np, 0, &res);
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if (ret)
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goto err_alloc;
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size = resource_size(&res);
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if (!request_mem_region(res.start, size, np->name)) {
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ret = -EBUSY;
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goto err_alloc;
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}
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data->membase = ioremap(res.start, size);
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if (!data->membase) {
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ret = -ENOMEM;
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goto err_alloc;
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}
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data->rcdev.owner = THIS_MODULE;
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data->rcdev.nr_resets = size * 32;
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data->rcdev.ops = &sunxi_reset_ops;
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data->rcdev.of_node = np;
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reset_controller_register(&data->rcdev);
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return 0;
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err_alloc:
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kfree(data);
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return ret;
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};
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/*
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* These are the reset controller we need to initialize early on in
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* our system, before we can even think of using a regular device
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* driver for it.
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*/
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static const struct of_device_id sunxi_early_reset_dt_ids[] __initdata = {
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{ .compatible = "allwinner,sun6i-a31-ahb1-reset", },
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{ /* sentinel */ },
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};
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void __init sun6i_reset_init(void)
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{
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struct device_node *np;
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for_each_matching_node(np, sunxi_early_reset_dt_ids)
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sunxi_reset_init(np);
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}
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/*
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* And these are the controllers we can register through the regular
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* device model.
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*/
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static const struct of_device_id sunxi_reset_dt_ids[] = {
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{ .compatible = "allwinner,sun6i-a31-clock-reset", },
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, sunxi_reset_dt_ids);
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static int sunxi_reset_probe(struct platform_device *pdev)
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{
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return sunxi_reset_init(pdev->dev.of_node);
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}
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static int sunxi_reset_remove(struct platform_device *pdev)
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{
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struct sunxi_reset_data *data = platform_get_drvdata(pdev);
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reset_controller_unregister(&data->rcdev);
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iounmap(data->membase);
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kfree(data);
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return 0;
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}
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static struct platform_driver sunxi_reset_driver = {
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.probe = sunxi_reset_probe,
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.remove = sunxi_reset_remove,
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.driver = {
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.name = "sunxi-reset",
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.owner = THIS_MODULE,
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.of_match_table = sunxi_reset_dt_ids,
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},
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};
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module_platform_driver(sunxi_reset_driver);
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MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
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MODULE_DESCRIPTION("Allwinner SoCs Reset Controller Driver");
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MODULE_LICENSE("GPL");
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@ -1104,6 +1104,13 @@ config RTC_DRV_SUN4V
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If you say Y here you will get support for the Hypervisor
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based RTC on SUN4V systems.
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config RTC_DRV_SUNXI
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tristate "Allwinner sun4i/sun7i RTC"
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depends on ARCH_SUNXI
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help
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If you say Y here you will get support for the RTC found on
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Allwinner A10/A20.
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config RTC_DRV_STARFIRE
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bool "Starfire RTC"
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depends on SPARC64
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@ -117,6 +117,7 @@ obj-$(CONFIG_RTC_DRV_STARFIRE) += rtc-starfire.o
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obj-$(CONFIG_RTC_DRV_STK17TA8) += rtc-stk17ta8.o
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obj-$(CONFIG_RTC_DRV_STMP) += rtc-stmp3xxx.o
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obj-$(CONFIG_RTC_DRV_SUN4V) += rtc-sun4v.o
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obj-$(CONFIG_RTC_DRV_SUNXI) += rtc-sunxi.o
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obj-$(CONFIG_RTC_DRV_TEGRA) += rtc-tegra.o
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obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o
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obj-$(CONFIG_RTC_DRV_TILE) += rtc-tile.o
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@ -0,0 +1,523 @@
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/*
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* An RTC driver for Allwinner A10/A20
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*
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* Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/rtc.h>
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#include <linux/types.h>
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#define SUNXI_LOSC_CTRL 0x0000
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#define SUNXI_LOSC_CTRL_RTC_HMS_ACC BIT(8)
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#define SUNXI_LOSC_CTRL_RTC_YMD_ACC BIT(7)
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#define SUNXI_RTC_YMD 0x0004
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#define SUNXI_RTC_HMS 0x0008
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#define SUNXI_ALRM_DHMS 0x000c
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#define SUNXI_ALRM_EN 0x0014
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#define SUNXI_ALRM_EN_CNT_EN BIT(8)
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#define SUNXI_ALRM_IRQ_EN 0x0018
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#define SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN BIT(0)
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#define SUNXI_ALRM_IRQ_STA 0x001c
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#define SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND BIT(0)
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#define SUNXI_MASK_DH 0x0000001f
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#define SUNXI_MASK_SM 0x0000003f
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#define SUNXI_MASK_M 0x0000000f
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#define SUNXI_MASK_LY 0x00000001
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#define SUNXI_MASK_D 0x00000ffe
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#define SUNXI_MASK_M 0x0000000f
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#define SUNXI_GET(x, mask, shift) (((x) & ((mask) << (shift))) \
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>> (shift))
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#define SUNXI_SET(x, mask, shift) (((x) & (mask)) << (shift))
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/*
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* Get date values
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*/
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#define SUNXI_DATE_GET_DAY_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 0)
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#define SUNXI_DATE_GET_MON_VALUE(x) SUNXI_GET(x, SUNXI_MASK_M, 8)
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#define SUNXI_DATE_GET_YEAR_VALUE(x, mask) SUNXI_GET(x, mask, 16)
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/*
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* Get time values
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*/
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#define SUNXI_TIME_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0)
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#define SUNXI_TIME_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8)
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#define SUNXI_TIME_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16)
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/*
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* Get alarm values
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*/
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#define SUNXI_ALRM_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0)
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#define SUNXI_ALRM_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8)
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#define SUNXI_ALRM_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16)
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/*
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* Set date values
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*/
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#define SUNXI_DATE_SET_DAY_VALUE(x) SUNXI_DATE_GET_DAY_VALUE(x)
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#define SUNXI_DATE_SET_MON_VALUE(x) SUNXI_SET(x, SUNXI_MASK_M, 8)
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#define SUNXI_DATE_SET_YEAR_VALUE(x, mask) SUNXI_SET(x, mask, 16)
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#define SUNXI_LEAP_SET_VALUE(x, shift) SUNXI_SET(x, SUNXI_MASK_LY, shift)
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/*
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* Set time values
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*/
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#define SUNXI_TIME_SET_SEC_VALUE(x) SUNXI_TIME_GET_SEC_VALUE(x)
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#define SUNXI_TIME_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8)
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#define SUNXI_TIME_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16)
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/*
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* Set alarm values
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*/
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#define SUNXI_ALRM_SET_SEC_VALUE(x) SUNXI_ALRM_GET_SEC_VALUE(x)
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#define SUNXI_ALRM_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8)
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#define SUNXI_ALRM_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16)
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#define SUNXI_ALRM_SET_DAY_VALUE(x) SUNXI_SET(x, SUNXI_MASK_D, 21)
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/*
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* Time unit conversions
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*/
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#define SEC_IN_MIN 60
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#define SEC_IN_HOUR (60 * SEC_IN_MIN)
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#define SEC_IN_DAY (24 * SEC_IN_HOUR)
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/*
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* The year parameter passed to the driver is usually an offset relative to
|
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* the year 1900. This macro is used to convert this offset to another one
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* relative to the minimum year allowed by the hardware.
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*/
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#define SUNXI_YEAR_OFF(x) ((x)->min - 1900)
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/*
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* min and max year are arbitrary set considering the limited range of the
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* hardware register field
|
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*/
|
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struct sunxi_rtc_data_year {
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unsigned int min; /* min year allowed */
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unsigned int max; /* max year allowed */
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unsigned int mask; /* mask for the year field */
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unsigned char leap_shift; /* bit shift to get the leap year */
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};
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static struct sunxi_rtc_data_year data_year_param[] = {
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[0] = {
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.min = 2010,
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.max = 2073,
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.mask = 0x3f,
|
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.leap_shift = 22,
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},
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[1] = {
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.min = 1970,
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.max = 2225,
|
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.mask = 0xff,
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.leap_shift = 24,
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},
|
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};
|
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|
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struct sunxi_rtc_dev {
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struct rtc_device *rtc;
|
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struct device *dev;
|
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struct sunxi_rtc_data_year *data_year;
|
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void __iomem *base;
|
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int irq;
|
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};
|
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|
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static irqreturn_t sunxi_rtc_alarmirq(int irq, void *id)
|
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{
|
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struct sunxi_rtc_dev *chip = (struct sunxi_rtc_dev *) id;
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u32 val;
|
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|
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val = readl(chip->base + SUNXI_ALRM_IRQ_STA);
|
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|
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if (val & SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND) {
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val |= SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND;
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writel(val, chip->base + SUNXI_ALRM_IRQ_STA);
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rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
|
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|
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return IRQ_HANDLED;
|
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}
|
||||
|
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return IRQ_NONE;
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||||
}
|
||||
|
||||
static void sunxi_rtc_setaie(int to, struct sunxi_rtc_dev *chip)
|
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{
|
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u32 alrm_val = 0;
|
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u32 alrm_irq_val = 0;
|
||||
|
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if (to) {
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alrm_val = readl(chip->base + SUNXI_ALRM_EN);
|
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alrm_val |= SUNXI_ALRM_EN_CNT_EN;
|
||||
|
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alrm_irq_val = readl(chip->base + SUNXI_ALRM_IRQ_EN);
|
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alrm_irq_val |= SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN;
|
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} else {
|
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writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND,
|
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chip->base + SUNXI_ALRM_IRQ_STA);
|
||||
}
|
||||
|
||||
writel(alrm_val, chip->base + SUNXI_ALRM_EN);
|
||||
writel(alrm_irq_val, chip->base + SUNXI_ALRM_IRQ_EN);
|
||||
}
|
||||
|
||||
static int sunxi_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
|
||||
{
|
||||
struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
|
||||
struct rtc_time *alrm_tm = &wkalrm->time;
|
||||
u32 alrm;
|
||||
u32 alrm_en;
|
||||
u32 date;
|
||||
|
||||
alrm = readl(chip->base + SUNXI_ALRM_DHMS);
|
||||
date = readl(chip->base + SUNXI_RTC_YMD);
|
||||
|
||||
alrm_tm->tm_sec = SUNXI_ALRM_GET_SEC_VALUE(alrm);
|
||||
alrm_tm->tm_min = SUNXI_ALRM_GET_MIN_VALUE(alrm);
|
||||
alrm_tm->tm_hour = SUNXI_ALRM_GET_HOUR_VALUE(alrm);
|
||||
|
||||
alrm_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
|
||||
alrm_tm->tm_mon = SUNXI_DATE_GET_MON_VALUE(date);
|
||||
alrm_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
|
||||
chip->data_year->mask);
|
||||
|
||||
alrm_tm->tm_mon -= 1;
|
||||
|
||||
/*
|
||||
* switch from (data_year->min)-relative offset to
|
||||
* a (1900)-relative one
|
||||
*/
|
||||
alrm_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
|
||||
|
||||
alrm_en = readl(chip->base + SUNXI_ALRM_IRQ_EN);
|
||||
if (alrm_en & SUNXI_ALRM_EN_CNT_EN)
|
||||
wkalrm->enabled = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sunxi_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
|
||||
{
|
||||
struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
|
||||
u32 date, time;
|
||||
|
||||
/*
|
||||
* read again in case it changes
|
||||
*/
|
||||
do {
|
||||
date = readl(chip->base + SUNXI_RTC_YMD);
|
||||
time = readl(chip->base + SUNXI_RTC_HMS);
|
||||
} while ((date != readl(chip->base + SUNXI_RTC_YMD)) ||
|
||||
(time != readl(chip->base + SUNXI_RTC_HMS)));
|
||||
|
||||
rtc_tm->tm_sec = SUNXI_TIME_GET_SEC_VALUE(time);
|
||||
rtc_tm->tm_min = SUNXI_TIME_GET_MIN_VALUE(time);
|
||||
rtc_tm->tm_hour = SUNXI_TIME_GET_HOUR_VALUE(time);
|
||||
|
||||
rtc_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
|
||||
rtc_tm->tm_mon = SUNXI_DATE_GET_MON_VALUE(date);
|
||||
rtc_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
|
||||
chip->data_year->mask);
|
||||
|
||||
rtc_tm->tm_mon -= 1;
|
||||
|
||||
/*
|
||||
* switch from (data_year->min)-relative offset to
|
||||
* a (1900)-relative one
|
||||
*/
|
||||
rtc_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
|
||||
|
||||
return rtc_valid_tm(rtc_tm);
|
||||
}
|
||||
|
||||
static int sunxi_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
|
||||
{
|
||||
struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
|
||||
struct rtc_time *alrm_tm = &wkalrm->time;
|
||||
struct rtc_time tm_now;
|
||||
u32 alrm = 0;
|
||||
unsigned long time_now = 0;
|
||||
unsigned long time_set = 0;
|
||||
unsigned long time_gap = 0;
|
||||
unsigned long time_gap_day = 0;
|
||||
unsigned long time_gap_hour = 0;
|
||||
unsigned long time_gap_min = 0;
|
||||
int ret = 0;
|
||||
|
||||
ret = sunxi_rtc_gettime(dev, &tm_now);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Error in getting time\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
rtc_tm_to_time(alrm_tm, &time_set);
|
||||
rtc_tm_to_time(&tm_now, &time_now);
|
||||
if (time_set <= time_now) {
|
||||
dev_err(dev, "Date to set in the past\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
time_gap = time_set - time_now;
|
||||
time_gap_day = time_gap / SEC_IN_DAY;
|
||||
time_gap -= time_gap_day * SEC_IN_DAY;
|
||||
time_gap_hour = time_gap / SEC_IN_HOUR;
|
||||
time_gap -= time_gap_hour * SEC_IN_HOUR;
|
||||
time_gap_min = time_gap / SEC_IN_MIN;
|
||||
time_gap -= time_gap_min * SEC_IN_MIN;
|
||||
|
||||
if (time_gap_day > 255) {
|
||||
dev_err(dev, "Day must be in the range 0 - 255\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
sunxi_rtc_setaie(0, chip);
|
||||
writel(0, chip->base + SUNXI_ALRM_DHMS);
|
||||
usleep_range(100, 300);
|
||||
|
||||
alrm = SUNXI_ALRM_SET_SEC_VALUE(time_gap) |
|
||||
SUNXI_ALRM_SET_MIN_VALUE(time_gap_min) |
|
||||
SUNXI_ALRM_SET_HOUR_VALUE(time_gap_hour) |
|
||||
SUNXI_ALRM_SET_DAY_VALUE(time_gap_day);
|
||||
writel(alrm, chip->base + SUNXI_ALRM_DHMS);
|
||||
|
||||
writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
|
||||
writel(SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN, chip->base + SUNXI_ALRM_IRQ_EN);
|
||||
|
||||
sunxi_rtc_setaie(wkalrm->enabled, chip);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sunxi_rtc_wait(struct sunxi_rtc_dev *chip, int offset,
|
||||
unsigned int mask, unsigned int ms_timeout)
|
||||
{
|
||||
const unsigned long timeout = jiffies + msecs_to_jiffies(ms_timeout);
|
||||
u32 reg;
|
||||
|
||||
do {
|
||||
reg = readl(chip->base + offset);
|
||||
reg &= mask;
|
||||
|
||||
if (reg == mask)
|
||||
return 0;
|
||||
|
||||
} while (time_before(jiffies, timeout));
|
||||
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
static int sunxi_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
|
||||
{
|
||||
struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
|
||||
u32 date = 0;
|
||||
u32 time = 0;
|
||||
int year;
|
||||
|
||||
/*
|
||||
* the input rtc_tm->tm_year is the offset relative to 1900. We use
|
||||
* the SUNXI_YEAR_OFF macro to rebase it with respect to the min year
|
||||
* allowed by the hardware
|
||||
*/
|
||||
|
||||
year = rtc_tm->tm_year + 1900;
|
||||
if (year < chip->data_year->min || year > chip->data_year->max) {
|
||||
dev_err(dev, "rtc only supports year in range %d - %d\n",
|
||||
chip->data_year->min, chip->data_year->max);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
rtc_tm->tm_year -= SUNXI_YEAR_OFF(chip->data_year);
|
||||
rtc_tm->tm_mon += 1;
|
||||
|
||||
date = SUNXI_DATE_SET_DAY_VALUE(rtc_tm->tm_mday) |
|
||||
SUNXI_DATE_SET_MON_VALUE(rtc_tm->tm_mon) |
|
||||
SUNXI_DATE_SET_YEAR_VALUE(rtc_tm->tm_year,
|
||||
chip->data_year->mask);
|
||||
|
||||
if (is_leap_year(year))
|
||||
date |= SUNXI_LEAP_SET_VALUE(1, chip->data_year->leap_shift);
|
||||
|
||||
time = SUNXI_TIME_SET_SEC_VALUE(rtc_tm->tm_sec) |
|
||||
SUNXI_TIME_SET_MIN_VALUE(rtc_tm->tm_min) |
|
||||
SUNXI_TIME_SET_HOUR_VALUE(rtc_tm->tm_hour);
|
||||
|
||||
writel(0, chip->base + SUNXI_RTC_HMS);
|
||||
writel(0, chip->base + SUNXI_RTC_YMD);
|
||||
|
||||
writel(time, chip->base + SUNXI_RTC_HMS);
|
||||
|
||||
/*
|
||||
* After writing the RTC HH-MM-SS register, the
|
||||
* SUNXI_LOSC_CTRL_RTC_HMS_ACC bit is set and it will not
|
||||
* be cleared until the real writing operation is finished
|
||||
*/
|
||||
|
||||
if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
|
||||
SUNXI_LOSC_CTRL_RTC_HMS_ACC, 50)) {
|
||||
dev_err(dev, "Failed to set rtc time.\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
writel(date, chip->base + SUNXI_RTC_YMD);
|
||||
|
||||
/*
|
||||
* After writing the RTC YY-MM-DD register, the
|
||||
* SUNXI_LOSC_CTRL_RTC_YMD_ACC bit is set and it will not
|
||||
* be cleared until the real writing operation is finished
|
||||
*/
|
||||
|
||||
if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
|
||||
SUNXI_LOSC_CTRL_RTC_YMD_ACC, 50)) {
|
||||
dev_err(dev, "Failed to set rtc time.\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sunxi_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
|
||||
{
|
||||
struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
|
||||
|
||||
if (!enabled)
|
||||
sunxi_rtc_setaie(enabled, chip);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct rtc_class_ops sunxi_rtc_ops = {
|
||||
.read_time = sunxi_rtc_gettime,
|
||||
.set_time = sunxi_rtc_settime,
|
||||
.read_alarm = sunxi_rtc_getalarm,
|
||||
.set_alarm = sunxi_rtc_setalarm,
|
||||
.alarm_irq_enable = sunxi_rtc_alarm_irq_enable
|
||||
};
|
||||
|
||||
static const struct of_device_id sunxi_rtc_dt_ids[] = {
|
||||
{ .compatible = "allwinner,sun4i-rtc", .data = &data_year_param[0] },
|
||||
{ .compatible = "allwinner,sun7i-a20-rtc", .data = &data_year_param[1] },
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, sunxi_rtc_dt_ids);
|
||||
|
||||
static int sunxi_rtc_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct sunxi_rtc_dev *chip;
|
||||
struct resource *res;
|
||||
const struct of_device_id *of_id;
|
||||
int ret;
|
||||
|
||||
chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
|
||||
if (!chip)
|
||||
return -ENOMEM;
|
||||
|
||||
platform_set_drvdata(pdev, chip);
|
||||
chip->dev = &pdev->dev;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
chip->base = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(chip->base))
|
||||
return PTR_ERR(chip->base);
|
||||
|
||||
chip->irq = platform_get_irq(pdev, 0);
|
||||
if (chip->irq < 0) {
|
||||
dev_err(&pdev->dev, "No IRQ resource\n");
|
||||
return chip->irq;
|
||||
}
|
||||
ret = devm_request_irq(&pdev->dev, chip->irq, sunxi_rtc_alarmirq,
|
||||
0, dev_name(&pdev->dev), chip);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Could not request IRQ\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
of_id = of_match_device(sunxi_rtc_dt_ids, &pdev->dev);
|
||||
if (!of_id) {
|
||||
dev_err(&pdev->dev, "Unable to setup RTC data\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
chip->data_year = (struct sunxi_rtc_data_year *) of_id->data;
|
||||
|
||||
/* clear the alarm count value */
|
||||
writel(0, chip->base + SUNXI_ALRM_DHMS);
|
||||
|
||||
/* disable alarm, not generate irq pending */
|
||||
writel(0, chip->base + SUNXI_ALRM_EN);
|
||||
|
||||
/* disable alarm week/cnt irq, unset to cpu */
|
||||
writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
|
||||
|
||||
/* clear alarm week/cnt irq pending */
|
||||
writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND, chip->base +
|
||||
SUNXI_ALRM_IRQ_STA);
|
||||
|
||||
chip->rtc = rtc_device_register("rtc-sunxi", &pdev->dev,
|
||||
&sunxi_rtc_ops, THIS_MODULE);
|
||||
if (IS_ERR(chip->rtc)) {
|
||||
dev_err(&pdev->dev, "unable to register device\n");
|
||||
return PTR_ERR(chip->rtc);
|
||||
}
|
||||
|
||||
dev_info(&pdev->dev, "RTC enabled\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sunxi_rtc_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct sunxi_rtc_dev *chip = platform_get_drvdata(pdev);
|
||||
|
||||
rtc_device_unregister(chip->rtc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver sunxi_rtc_driver = {
|
||||
.probe = sunxi_rtc_probe,
|
||||
.remove = sunxi_rtc_remove,
|
||||
.driver = {
|
||||
.name = "sunxi-rtc",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = sunxi_rtc_dt_ids,
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(sunxi_rtc_driver);
|
||||
|
||||
MODULE_DESCRIPTION("sunxi RTC driver");
|
||||
MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
|
||||
MODULE_LICENSE("GPL");
|
||||
Загрузка…
Ссылка в новой задаче