drm/i915: Wedge the GPU if command parser setup fails
Commit311a50e76a
("drm/i915: Add support for mandatory cmdparsing") introduced mandatory command parsing but setup failures were not translated into wedging the GPU which was probably the intent. Possible errors come in two categories. Either the sanity check on internal tables has failed, which should be caught in CI unless an affected platform would be missed in testing; or memory allocation failure happened during driver load, which should be extremely unlikely but for correctness should still be handled. v2: * Tidy coding style. (Chris) [airlied: cherry-picked to avoid rc1 base] Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Fixes:311a50e76a
("drm/i915: Add support for mandatory cmdparsing") Cc: Jon Bloomfield <jon.bloomfield@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Chris Wilson <chris.p.wilson@intel.com> Reviewed-by: Chris Wilson <chris.p.wilson@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210302114213.1102223-1-tvrtko.ursulin@linux.intel.com (cherry picked from commit 5a1a659762d35a6dc51047c9127c011303c77b7f) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -713,9 +713,12 @@ static int engine_setup_common(struct intel_engine_cs *engine)
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goto err_status;
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}
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err = intel_engine_init_cmd_parser(engine);
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if (err)
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goto err_cmd_parser;
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intel_engine_init_active(engine, ENGINE_PHYSICAL);
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intel_engine_init_execlists(engine);
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intel_engine_init_cmd_parser(engine);
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intel_engine_init__pm(engine);
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intel_engine_init_retire(engine);
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@ -732,6 +735,8 @@ static int engine_setup_common(struct intel_engine_cs *engine)
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return 0;
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err_cmd_parser:
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intel_breadcrumbs_free(engine->breadcrumbs);
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err_status:
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cleanup_status_page(engine);
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return err;
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@ -940,7 +940,7 @@ static void fini_hash_table(struct intel_engine_cs *engine)
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* struct intel_engine_cs based on whether the platform requires software
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* command parsing.
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*/
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void intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
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int intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
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{
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const struct drm_i915_cmd_table *cmd_tables;
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int cmd_table_count;
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@ -948,7 +948,7 @@ void intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
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if (!IS_GEN(engine->i915, 7) && !(IS_GEN(engine->i915, 9) &&
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engine->class == COPY_ENGINE_CLASS))
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return;
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return 0;
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switch (engine->class) {
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case RENDER_CLASS:
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@ -1013,19 +1013,19 @@ void intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
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break;
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default:
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MISSING_CASE(engine->class);
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return;
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goto out;
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}
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if (!validate_cmds_sorted(engine, cmd_tables, cmd_table_count)) {
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drm_err(&engine->i915->drm,
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"%s: command descriptions are not sorted\n",
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engine->name);
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return;
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goto out;
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}
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if (!validate_regs_sorted(engine)) {
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drm_err(&engine->i915->drm,
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"%s: registers are not sorted\n", engine->name);
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return;
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goto out;
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}
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ret = init_hash_table(engine, cmd_tables, cmd_table_count);
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@ -1033,10 +1033,17 @@ void intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
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drm_err(&engine->i915->drm,
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"%s: initialised failed!\n", engine->name);
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fini_hash_table(engine);
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return;
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goto out;
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}
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engine->flags |= I915_ENGINE_USING_CMD_PARSER;
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out:
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if (intel_engine_requires_cmd_parser(engine) &&
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!intel_engine_using_cmd_parser(engine))
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return -EINVAL;
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return 0;
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}
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/**
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@ -1952,7 +1952,7 @@ const char *i915_cache_level_str(struct drm_i915_private *i915, int type);
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/* i915_cmd_parser.c */
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int i915_cmd_parser_get_version(struct drm_i915_private *dev_priv);
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void intel_engine_init_cmd_parser(struct intel_engine_cs *engine);
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int intel_engine_init_cmd_parser(struct intel_engine_cs *engine);
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void intel_engine_cleanup_cmd_parser(struct intel_engine_cs *engine);
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int intel_engine_cmd_parser(struct intel_engine_cs *engine,
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struct i915_vma *batch,
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