i2c: at91: remove old polling driver
It will get replaced by a superior one. Safe to remove since this one depends on BROKEN anyhow. Signed-off-by: Nikolaus Voss <n.voss@weinmann.de> Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com> Reviewed-by: Nicolas Ferre <nicolas.ferre@atmel.com> [wsa: added commit message] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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a879e9c34b
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@ -1,68 +0,0 @@
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/*
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* arch/arm/mach-at91/include/mach/at91_twi.h
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*
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* Copyright (C) 2005 Ivan Kokshaysky
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* Copyright (C) SAN People
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*
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* Two-wire Interface (TWI) registers.
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* Based on AT91RM9200 datasheet revision E.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef AT91_TWI_H
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#define AT91_TWI_H
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#define AT91_TWI_CR 0x00 /* Control Register */
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#define AT91_TWI_START (1 << 0) /* Send a Start Condition */
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#define AT91_TWI_STOP (1 << 1) /* Send a Stop Condition */
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#define AT91_TWI_MSEN (1 << 2) /* Master Transfer Enable */
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#define AT91_TWI_MSDIS (1 << 3) /* Master Transfer Disable */
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#define AT91_TWI_SVEN (1 << 4) /* Slave Transfer Enable [SAM9260 only] */
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#define AT91_TWI_SVDIS (1 << 5) /* Slave Transfer Disable [SAM9260 only] */
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#define AT91_TWI_SWRST (1 << 7) /* Software Reset */
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#define AT91_TWI_MMR 0x04 /* Master Mode Register */
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#define AT91_TWI_IADRSZ (3 << 8) /* Internal Device Address Size */
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#define AT91_TWI_IADRSZ_NO (0 << 8)
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#define AT91_TWI_IADRSZ_1 (1 << 8)
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#define AT91_TWI_IADRSZ_2 (2 << 8)
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#define AT91_TWI_IADRSZ_3 (3 << 8)
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#define AT91_TWI_MREAD (1 << 12) /* Master Read Direction */
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#define AT91_TWI_DADR (0x7f << 16) /* Device Address */
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#define AT91_TWI_SMR 0x08 /* Slave Mode Register [SAM9260 only] */
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#define AT91_TWI_SADR (0x7f << 16) /* Slave Address */
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#define AT91_TWI_IADR 0x0c /* Internal Address Register */
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#define AT91_TWI_CWGR 0x10 /* Clock Waveform Generator Register */
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#define AT91_TWI_CLDIV (0xff << 0) /* Clock Low Divisor */
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#define AT91_TWI_CHDIV (0xff << 8) /* Clock High Divisor */
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#define AT91_TWI_CKDIV (7 << 16) /* Clock Divider */
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#define AT91_TWI_SR 0x20 /* Status Register */
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#define AT91_TWI_TXCOMP (1 << 0) /* Transmission Complete */
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#define AT91_TWI_RXRDY (1 << 1) /* Receive Holding Register Ready */
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#define AT91_TWI_TXRDY (1 << 2) /* Transmit Holding Register Ready */
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#define AT91_TWI_SVREAD (1 << 3) /* Slave Read [SAM9260 only] */
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#define AT91_TWI_SVACC (1 << 4) /* Slave Access [SAM9260 only] */
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#define AT91_TWI_GACC (1 << 5) /* General Call Access [SAM9260 only] */
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#define AT91_TWI_OVRE (1 << 6) /* Overrun Error [AT91RM9200 only] */
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#define AT91_TWI_UNRE (1 << 7) /* Underrun Error [AT91RM9200 only] */
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#define AT91_TWI_NACK (1 << 8) /* Not Acknowledged */
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#define AT91_TWI_ARBLST (1 << 9) /* Arbitration Lost [SAM9260 only] */
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#define AT91_TWI_SCLWS (1 << 10) /* Clock Wait State [SAM9260 only] */
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#define AT91_TWI_EOSACC (1 << 11) /* End of Slave Address [SAM9260 only] */
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#define AT91_TWI_IER 0x24 /* Interrupt Enable Register */
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#define AT91_TWI_IDR 0x28 /* Interrupt Disable Register */
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#define AT91_TWI_IMR 0x2c /* Interrupt Mask Register */
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#define AT91_TWI_RHR 0x30 /* Receive Holding Register */
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#define AT91_TWI_THR 0x34 /* Transmit Holding Register */
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#endif
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@ -28,7 +28,6 @@ obj-$(CONFIG_I2C_HYDRA) += i2c-hydra.o
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obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o
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# Embedded system I2C/SMBus host controller drivers
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obj-$(CONFIG_I2C_AT91) += i2c-at91.o
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obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o
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obj-$(CONFIG_I2C_BLACKFIN_TWI) += i2c-bfin-twi.o
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obj-$(CONFIG_I2C_CPM) += i2c-cpm.o
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@ -1,315 +0,0 @@
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/*
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i2c Support for Atmel's AT91 Two-Wire Interface (TWI)
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Copyright (C) 2004 Rick Bronson
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Converted to 2.6 by Andrew Victor <andrew@sanpeople.com>
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Borrowed heavily from original work by:
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Copyright (C) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <mach/at91_twi.h>
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#include <mach/board.h>
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#include <mach/cpu.h>
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#define TWI_CLOCK 100000 /* Hz. max 400 Kbits/sec */
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static struct clk *twi_clk;
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static void __iomem *twi_base;
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#define at91_twi_read(reg) __raw_readl(twi_base + (reg))
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#define at91_twi_write(reg, val) __raw_writel((val), twi_base + (reg))
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/*
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* Initialize the TWI hardware registers.
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*/
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static void __devinit at91_twi_hwinit(void)
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{
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unsigned long cdiv, ckdiv;
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at91_twi_write(AT91_TWI_IDR, 0xffffffff); /* Disable all interrupts */
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at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST); /* Reset peripheral */
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at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN); /* Set Master mode */
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/* Calcuate clock dividers */
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cdiv = (clk_get_rate(twi_clk) / (2 * TWI_CLOCK)) - 3;
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cdiv = cdiv + 1; /* round up */
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ckdiv = 0;
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while (cdiv > 255) {
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ckdiv++;
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cdiv = cdiv >> 1;
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}
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if (cpu_is_at91rm9200()) { /* AT91RM9200 Errata #22 */
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if (ckdiv > 5) {
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printk(KERN_ERR "AT91 I2C: Invalid TWI_CLOCK value!\n");
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ckdiv = 5;
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}
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}
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at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv);
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}
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/*
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* Poll the i2c status register until the specified bit is set.
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* Returns 0 if timed out (100 msec).
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*/
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static short at91_poll_status(unsigned long bit)
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{
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int loop_cntr = 10000;
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do {
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udelay(10);
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} while (!(at91_twi_read(AT91_TWI_SR) & bit) && (--loop_cntr > 0));
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return (loop_cntr > 0);
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}
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static int xfer_read(struct i2c_adapter *adap, unsigned char *buf, int length)
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{
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/* Send Start */
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at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
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/* Read data */
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while (length--) {
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if (!length) /* need to send Stop before reading last byte */
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at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
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if (!at91_poll_status(AT91_TWI_RXRDY)) {
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dev_dbg(&adap->dev, "RXRDY timeout\n");
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return -ETIMEDOUT;
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}
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*buf++ = (at91_twi_read(AT91_TWI_RHR) & 0xff);
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}
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return 0;
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}
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static int xfer_write(struct i2c_adapter *adap, unsigned char *buf, int length)
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{
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/* Load first byte into transmitter */
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at91_twi_write(AT91_TWI_THR, *buf++);
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/* Send Start */
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at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
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do {
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if (!at91_poll_status(AT91_TWI_TXRDY)) {
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dev_dbg(&adap->dev, "TXRDY timeout\n");
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return -ETIMEDOUT;
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}
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length--; /* byte was transmitted */
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if (length > 0) /* more data to send? */
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at91_twi_write(AT91_TWI_THR, *buf++);
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} while (length);
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/* Send Stop */
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at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
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return 0;
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}
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/*
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* Generic i2c master transfer entrypoint.
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*
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* Note: We do not use Atmel's feature of storing the "internal device address".
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* Instead the "internal device address" has to be written using a separate
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* i2c message.
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* http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2004-September/024411.html
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*/
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static int at91_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
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{
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int i, ret;
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dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num);
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for (i = 0; i < num; i++) {
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dev_dbg(&adap->dev, " #%d: %sing %d byte%s %s 0x%02x\n", i,
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pmsg->flags & I2C_M_RD ? "read" : "writ",
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pmsg->len, pmsg->len > 1 ? "s" : "",
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pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
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at91_twi_write(AT91_TWI_MMR, (pmsg->addr << 16)
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| ((pmsg->flags & I2C_M_RD) ? AT91_TWI_MREAD : 0));
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if (pmsg->len && pmsg->buf) { /* sanity check */
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if (pmsg->flags & I2C_M_RD)
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ret = xfer_read(adap, pmsg->buf, pmsg->len);
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else
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ret = xfer_write(adap, pmsg->buf, pmsg->len);
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if (ret)
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return ret;
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/* Wait until transfer is finished */
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if (!at91_poll_status(AT91_TWI_TXCOMP)) {
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dev_dbg(&adap->dev, "TXCOMP timeout\n");
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return -ETIMEDOUT;
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}
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}
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dev_dbg(&adap->dev, "transfer complete\n");
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pmsg++; /* next message */
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}
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return i;
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}
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/*
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* Return list of supported functionality.
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*/
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static u32 at91_func(struct i2c_adapter *adapter)
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{
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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}
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static struct i2c_algorithm at91_algorithm = {
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.master_xfer = at91_xfer,
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.functionality = at91_func,
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};
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/*
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* Main initialization routine.
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*/
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static int __devinit at91_i2c_probe(struct platform_device *pdev)
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{
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struct i2c_adapter *adapter;
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struct resource *res;
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int rc;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENXIO;
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if (!request_mem_region(res->start, resource_size(res), "at91_i2c"))
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return -EBUSY;
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twi_base = ioremap(res->start, resource_size(res));
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if (!twi_base) {
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rc = -ENOMEM;
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goto fail0;
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}
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twi_clk = clk_get(NULL, "twi_clk");
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if (IS_ERR(twi_clk)) {
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dev_err(&pdev->dev, "no clock defined\n");
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rc = -ENODEV;
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goto fail1;
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}
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adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
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if (adapter == NULL) {
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dev_err(&pdev->dev, "can't allocate inteface!\n");
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rc = -ENOMEM;
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goto fail2;
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}
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snprintf(adapter->name, sizeof(adapter->name), "AT91");
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adapter->algo = &at91_algorithm;
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adapter->class = I2C_CLASS_HWMON;
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adapter->dev.parent = &pdev->dev;
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/* adapter->id == 0 ... only one TWI controller for now */
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platform_set_drvdata(pdev, adapter);
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clk_enable(twi_clk); /* enable peripheral clock */
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at91_twi_hwinit(); /* initialize TWI controller */
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rc = i2c_add_numbered_adapter(adapter);
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if (rc) {
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dev_err(&pdev->dev, "Adapter %s registration failed\n",
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adapter->name);
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goto fail3;
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}
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dev_info(&pdev->dev, "AT91 i2c bus driver.\n");
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return 0;
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fail3:
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platform_set_drvdata(pdev, NULL);
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kfree(adapter);
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clk_disable(twi_clk);
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fail2:
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clk_put(twi_clk);
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fail1:
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iounmap(twi_base);
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fail0:
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release_mem_region(res->start, resource_size(res));
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return rc;
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}
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static int __devexit at91_i2c_remove(struct platform_device *pdev)
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{
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struct i2c_adapter *adapter = platform_get_drvdata(pdev);
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struct resource *res;
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int rc;
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rc = i2c_del_adapter(adapter);
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platform_set_drvdata(pdev, NULL);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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iounmap(twi_base);
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release_mem_region(res->start, resource_size(res));
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clk_disable(twi_clk); /* disable peripheral clock */
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clk_put(twi_clk);
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return rc;
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}
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#ifdef CONFIG_PM
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/* NOTE: could save a few mA by keeping clock off outside of at91_xfer... */
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static int at91_i2c_suspend(struct device *dev)
|
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{
|
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clk_disable(twi_clk);
|
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return 0;
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}
|
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|
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static int at91_i2c_resume(struct device *dev)
|
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{
|
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return clk_enable(twi_clk);
|
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}
|
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|
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static SIMPLE_DEV_PM_OPS(at91_i2c_pm, at91_i2c_suspend, at91_i2c_resume);
|
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#define AT91_I2C_PM (&at91_i2c_pm)
|
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|
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#else
|
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#define AT91_I2C_PM NULL
|
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#endif
|
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|
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static struct platform_driver at91_i2c_driver = {
|
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.probe = at91_i2c_probe,
|
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.remove = __devexit_p(at91_i2c_remove),
|
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.driver = {
|
||||
.name = "at91_i2c",
|
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.owner = THIS_MODULE,
|
||||
.pm = AT91_I2C_PM,
|
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},
|
||||
};
|
||||
|
||||
module_platform_driver(at91_i2c_driver);
|
||||
|
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MODULE_AUTHOR("Rick Bronson");
|
||||
MODULE_DESCRIPTION("I2C (TWI) driver for Atmel AT91");
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MODULE_LICENSE("GPL");
|
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MODULE_ALIAS("platform:at91_i2c");
|
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