ARM: shmobile: Consolidate the pm code for R-Car Gen2
The pm code for R-Car Gen2 is scatterd in each SoC. These files (pm-r8a7790.c/pm-r8a7791.c) have some overlap code. This change consolidate the pm code for R-Car Gen2 into one. Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Gaku Inami
Simon Horman
Родитель
78420b5dca
Коммит
a8caad6690
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@ -12,8 +12,8 @@ obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o
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obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o pm-r8a7740.o
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obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o
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obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o
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obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o pm-r8a7790.o
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obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o pm-r8a7791.o
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obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o
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obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o
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obj-$(CONFIG_ARCH_R8A7794) += setup-r8a7794.o
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obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
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obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o
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@ -50,6 +50,7 @@ obj-$(CONFIG_CPU_IDLE) += cpuidle.o
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obj-$(CONFIG_CPU_FREQ) += cpufreq.o
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obj-$(CONFIG_PM_RCAR) += pm-rcar.o
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obj-$(CONFIG_PM_RMOBILE) += pm-rmobile.o
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obj-$(CONFIG_ARCH_RCAR_GEN2) += pm-rcar-gen2.o
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# special sh7372 handling for IRQ objects and low level sleep code
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obj-$(CONFIG_ARCH_SH7372) += entry-intc.o sleep-sh7372.o
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@ -1,82 +0,0 @@
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/*
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* r8a7790 Power management support
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*
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* Copyright (C) 2013 Renesas Electronics Corporation
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* Copyright (C) 2011 Renesas Solutions Corp.
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* Copyright (C) 2011 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/smp.h>
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#include <asm/io.h>
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#include "common.h"
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#include "pm-rcar.h"
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#include "r8a7790.h"
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/* RST */
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#define RST 0xe6160000
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#define CA15BAR 0x0020
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#define CA7BAR 0x0030
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#define CA15RESCNT 0x0040
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#define CA7RESCNT 0x0044
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/* On-chip RAM */
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#define MERAM 0xe8080000
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/* SYSC */
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#define SYSCIER 0x0c
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#define SYSCIMR 0x10
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#if defined(CONFIG_SMP)
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static void __init r8a7790_sysc_init(void)
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{
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void __iomem *base = rcar_sysc_init(0xe6180000);
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/* enable all interrupt sources, but do not use interrupt handler */
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iowrite32(0x013111ef, base + SYSCIER);
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iowrite32(0, base + SYSCIMR);
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}
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#else /* CONFIG_SMP */
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static inline void r8a7790_sysc_init(void) {}
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#endif /* CONFIG_SMP */
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void __init r8a7790_pm_init(void)
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{
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void __iomem *p;
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u32 bar;
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static int once;
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if (once++)
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return;
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/* MERAM for jump stub, because BAR requires 256KB aligned address */
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p = ioremap_nocache(MERAM, shmobile_boot_size);
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memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
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iounmap(p);
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/* setup reset vectors */
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p = ioremap_nocache(RST, 0x63);
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bar = (MERAM >> 8) & 0xfffffc00;
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writel_relaxed(bar, p + CA15BAR);
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writel_relaxed(bar, p + CA7BAR);
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writel_relaxed(bar | 0x10, p + CA15BAR);
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writel_relaxed(bar | 0x10, p + CA7BAR);
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/* de-assert reset for all CPUs */
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writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
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p + CA15RESCNT);
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writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
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p + CA7RESCNT);
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iounmap(p);
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r8a7790_sysc_init();
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shmobile_smp_apmu_suspend_init();
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}
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@ -1,73 +0,0 @@
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/*
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* r8a7791 Power management support
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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* Copyright (C) 2011 Renesas Solutions Corp.
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* Copyright (C) 2011 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/smp.h>
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#include <asm/io.h>
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#include "common.h"
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#include "pm-rcar.h"
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#include "r8a7791.h"
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#define RST 0xe6160000
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#define CA15BAR 0x0020
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#define CA15RESCNT 0x0040
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#define RAM 0xe6300000
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/* SYSC */
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#define SYSCIER 0x0c
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#define SYSCIMR 0x10
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#if defined(CONFIG_SMP)
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static void __init r8a7791_sysc_init(void)
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{
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void __iomem *base = rcar_sysc_init(0xe6180000);
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/* enable all interrupt sources, but do not use interrupt handler */
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iowrite32(0x00111003, base + SYSCIER);
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iowrite32(0, base + SYSCIMR);
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}
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#else /* CONFIG_SMP */
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static inline void r8a7791_sysc_init(void) {}
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#endif /* CONFIG_SMP */
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void __init r8a7791_pm_init(void)
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{
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void __iomem *p;
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u32 bar;
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static int once;
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if (once++)
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return;
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/* RAM for jump stub, because BAR requires 256KB aligned address */
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p = ioremap_nocache(RAM, shmobile_boot_size);
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memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
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iounmap(p);
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/* setup reset vectors */
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p = ioremap_nocache(RST, 0x63);
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bar = (RAM >> 8) & 0xfffffc00;
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writel_relaxed(bar, p + CA15BAR);
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writel_relaxed(bar | 0x10, p + CA15BAR);
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/* enable clocks to all CPUs */
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writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
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p + CA15RESCNT);
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iounmap(p);
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r8a7791_sysc_init();
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shmobile_smp_apmu_suspend_init();
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}
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@ -0,0 +1,115 @@
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/*
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* R-Car Generation 2 Power management support
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*
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* Copyright (C) 2013 - 2015 Renesas Electronics Corporation
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* Copyright (C) 2011 Renesas Solutions Corp.
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* Copyright (C) 2011 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/smp.h>
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#include <asm/io.h>
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#include "common.h"
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#include "pm-rcar.h"
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#include "rcar-gen2.h"
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/* RST */
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#define RST 0xe6160000
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#define CA15BAR 0x0020
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#define CA7BAR 0x0030
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#define CA15RESCNT 0x0040
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#define CA7RESCNT 0x0044
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/* On-chip RAM */
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#define MERAM 0xe8080000
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#define RAM 0xe6300000
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/* SYSC */
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#define SYSCIER 0x0c
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#define SYSCIMR 0x10
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#if defined(CONFIG_SMP)
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static void __init rcar_gen2_sysc_init(u32 syscier)
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{
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void __iomem *base = rcar_sysc_init(0xe6180000);
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/* enable all interrupt sources, but do not use interrupt handler */
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iowrite32(syscier, base + SYSCIER);
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iowrite32(0, base + SYSCIMR);
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}
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#else /* CONFIG_SMP */
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static inline void rcar_gen2_sysc_init(u32 syscier) {}
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#endif /* CONFIG_SMP */
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void __init rcar_gen2_pm_init(void)
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{
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void __iomem *p;
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u32 bar;
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static int once;
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struct device_node *np, *cpus;
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bool has_a7 = false;
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bool has_a15 = false;
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phys_addr_t boot_vector_addr = 0;
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u32 syscier = 0;
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if (once++)
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return;
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cpus = of_find_node_by_path("/cpus");
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if (!cpus)
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return;
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for_each_child_of_node(cpus, np) {
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if (of_device_is_compatible(np, "arm,cortex-a15"))
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has_a15 = true;
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else if (of_device_is_compatible(np, "arm,cortex-a7"))
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has_a7 = true;
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}
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if (of_machine_is_compatible("renesas,r8a7790")) {
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boot_vector_addr = MERAM;
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syscier = 0x013111ef;
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} else if (of_machine_is_compatible("renesas,r8a7791")) {
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boot_vector_addr = RAM;
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syscier = 0x00111003;
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}
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/* RAM for jump stub, because BAR requires 256KB aligned address */
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p = ioremap_nocache(boot_vector_addr, shmobile_boot_size);
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memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
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iounmap(p);
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/* setup reset vectors */
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p = ioremap_nocache(RST, 0x63);
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bar = (boot_vector_addr >> 8) & 0xfffffc00;
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if (has_a15) {
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writel_relaxed(bar, p + CA15BAR);
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writel_relaxed(bar | 0x10, p + CA15BAR);
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/* de-assert reset for CA15 CPUs */
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writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) |
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0xa5a50000, p + CA15RESCNT);
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}
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if (has_a7) {
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writel_relaxed(bar, p + CA7BAR);
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writel_relaxed(bar | 0x10, p + CA7BAR);
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/* de-assert reset for CA7 CPUs */
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writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) |
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0x5a5a0000, p + CA7RESCNT);
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}
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iounmap(p);
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rcar_gen2_sysc_init(syscier);
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shmobile_smp_apmu_suspend_init();
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}
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@ -1,7 +1,6 @@
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#ifndef __ASM_R8A7790_H__
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#define __ASM_R8A7790_H__
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void r8a7790_pm_init(void);
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extern struct smp_operations r8a7790_smp_ops;
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#endif /* __ASM_R8A7790_H__ */
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@ -1,7 +1,6 @@
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#ifndef __ASM_R8A7791_H__
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#define __ASM_R8A7791_H__
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void r8a7791_pm_init(void);
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extern struct smp_operations r8a7791_smp_ops;
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#endif /* __ASM_R8A7791_H__ */
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@ -5,5 +5,6 @@ void rcar_gen2_timer_init(void);
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#define MD(nr) BIT(nr)
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u32 rcar_gen2_read_mode_pins(void);
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void rcar_gen2_reserve(void);
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void rcar_gen2_pm_init(void);
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#endif /* __ASM_RCAR_GEN2_H__ */
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@ -23,6 +23,7 @@
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#include "common.h"
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#include "platsmp-apmu.h"
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#include "pm-rcar.h"
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#include "rcar-gen2.h"
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#include "r8a7790.h"
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static struct rcar_sysc_ch r8a7790_ca15_scu = {
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@ -54,7 +55,7 @@ static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
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ARRAY_SIZE(r8a7790_apmu_config));
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/* turn on power to SCU */
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r8a7790_pm_init();
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rcar_gen2_pm_init();
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rcar_sysc_power_up(&r8a7790_ca15_scu);
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rcar_sysc_power_up(&r8a7790_ca7_scu);
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}
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@ -39,7 +39,7 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
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r8a7791_apmu_config,
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ARRAY_SIZE(r8a7791_apmu_config));
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r8a7791_pm_init();
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rcar_gen2_pm_init();
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}
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static int r8a7791_smp_boot_secondary(unsigned int cpu,
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