including various development for samsung for v3.10
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJRZDATAAoJEA0Cl+kVi2xqWoYQALCp4Pg0OkedFNijPU4w7DOT twK/ckrsNr/JM3Kh6ZXqyTRtIMp9rjU9GIzNUiO/rIIUUAwrf+M9TvUdgmIe7Izc S+MYDny4cm+tCsuxsrcAIQXCknHYiw1ffmDSn6XB71BSRJJ3IrF6YbWDmBRwAl11 CY1+g+q7FLyriS3kw4FGyPvks0kQhk3U63wFhR5+s3i8y1VVMEp5hU6U9p6pCgBR 4oeTy2vzQAmoKs7Ngo38QgRVlv6m4HPx7SiXYBgoD/I09itUh+V8C3rv4gdqH6DT +Klf2xzd6PSYYyA0dryKM+gZTSzXeChHNh49gOza5p8z5GI5EpGPFpKdPcmXWLFQ nIRcJzf2talieO8WvD4nlYy0Wa3Fyn6U3GJewV/tKgzmY3hxMyVSOGA6WwO/3iil Z0jPOF3ZfOPWRhjMNDmO7yYltawin86tItfCmdspFxtLVsjfc/K0n52QzFQMKG7b /sgC9JZCTgAQsF/WASZ7xkMEQAbysDcXqxyiXJYrmkrgwUoH8PUWR2YhEMf6BLwK 6BSfyXZ4UiPYo7zKgxtIOcWCXll0DpunAFmVHBIiMjzD7LGKHrpXg8z7SdqFomYK wKP8EgCfg34gCnFOFfke+8xa72osz6EQ/yf2YLoibl/9vA+Ym02Mt5gU81h1xRNA f7xTUKayXrp4rSlf+ZRS =X1N2 -----END PGP SIGNATURE----- Merge tag 'devel-samsung-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc From Kukjin Kim <kgene.kim@samsung.com>: including various development for samsung for v3.10 * tag 'devel-samsung-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: replace cpumask by the corresponding macro ARM: EXYNOS: handle properly the return values ARM: EXYNOS: factor out the idle states ARM: SAMSUNG: check processor type before cache restoration in resume ARM: S3C64XX: Slow down mic detection rate for wm5102 ARM: S3C64XX: Clear DMA flags on channel request ARM: EXYNOS: Clear ENABLE_WAKEUP_SW bit when entering suspend ARM: EXYNOS: Remove hardcode wakeup unmask for EINT_0 ARM: EXYNOS: Add support for rtc wakeup ARM: SAMSUNG: Export MIPI CSIS/DSIM PHY control functions Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Коммит
a93216c921
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@ -463,6 +463,8 @@ void __init exynos4_init_irq(void)
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* uses GIC instead of VIC.
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*/
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s5p_init_irq(NULL, 0);
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gic_arch_extn.irq_set_wake = s3c_irq_wake;
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}
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void __init exynos5_init_irq(void)
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@ -41,24 +41,25 @@ static int exynos4_enter_lowpower(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index);
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static struct cpuidle_state exynos4_cpuidle_set[] __initdata = {
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[0] = ARM_CPUIDLE_WFI_STATE,
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[1] = {
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.enter = exynos4_enter_lowpower,
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.exit_latency = 300,
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.target_residency = 100000,
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.flags = CPUIDLE_FLAG_TIME_VALID,
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.name = "C1",
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.desc = "ARM power down",
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},
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};
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static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);
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static struct cpuidle_driver exynos4_idle_driver = {
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.name = "exynos4_idle",
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.owner = THIS_MODULE,
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.en_core_tk_irqen = 1,
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.states = {
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[0] = ARM_CPUIDLE_WFI_STATE,
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[1] = {
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.enter = exynos4_enter_lowpower,
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.exit_latency = 300,
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.target_residency = 100000,
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.flags = CPUIDLE_FLAG_TIME_VALID,
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.name = "C1",
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.desc = "ARM power down",
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},
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},
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.state_count = 2,
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.safe_state_index = 0,
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};
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/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
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@ -193,37 +194,30 @@ static void __init exynos5_core_down_clk(void)
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static int __init exynos4_init_cpuidle(void)
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{
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int i, max_cpuidle_state, cpu_id;
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int cpu_id, ret;
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struct cpuidle_device *device;
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struct cpuidle_driver *drv = &exynos4_idle_driver;
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if (soc_is_exynos5250())
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exynos5_core_down_clk();
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/* Setup cpuidle driver */
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drv->state_count = (sizeof(exynos4_cpuidle_set) /
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sizeof(struct cpuidle_state));
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max_cpuidle_state = drv->state_count;
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for (i = 0; i < max_cpuidle_state; i++) {
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memcpy(&drv->states[i], &exynos4_cpuidle_set[i],
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sizeof(struct cpuidle_state));
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ret = cpuidle_register_driver(&exynos4_idle_driver);
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if (ret) {
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printk(KERN_ERR "CPUidle failed to register driver\n");
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return ret;
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}
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drv->safe_state_index = 0;
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cpuidle_register_driver(&exynos4_idle_driver);
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for_each_cpu(cpu_id, cpu_online_mask) {
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for_each_online_cpu(cpu_id) {
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device = &per_cpu(exynos4_cpuidle_device, cpu_id);
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device->cpu = cpu_id;
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if (cpu_id == 0)
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device->state_count = (sizeof(exynos4_cpuidle_set) /
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sizeof(struct cpuidle_state));
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else
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device->state_count = 1; /* Support IDLE only */
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/* Support IDLE only */
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if (cpu_id != 0)
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device->state_count = 1;
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if (cpuidle_register_device(device)) {
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printk(KERN_ERR "CPUidle register device failed\n,");
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return -EIO;
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ret = cpuidle_register_device(device);
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if (ret) {
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printk(KERN_ERR "CPUidle register device failed\n");
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return ret;
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}
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}
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@ -27,13 +27,8 @@ static inline void s3c_pm_debug_init_uart(void)
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static inline void s3c_pm_arch_prepare_irqs(void)
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{
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unsigned int tmp;
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tmp = __raw_readl(S5P_WAKEUP_MASK);
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tmp &= ~(1 << 31);
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__raw_writel(tmp, S5P_WAKEUP_MASK);
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__raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK);
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__raw_writel(s3c_irqwake_eintmask & 0xFFFFFFFE, S5P_EINT_WAKEUP_MASK);
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__raw_writel(s3c_irqwake_eintmask, S5P_EINT_WAKEUP_MASK);
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__raw_writel(s3c_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
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}
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static inline void s3c_pm_arch_stop_clocks(void)
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@ -509,6 +509,7 @@ int s3c2410_dma_request(enum dma_ch channel,
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chan->client = client;
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chan->in_use = 1;
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chan->peripheral = channel;
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chan->flags = 0;
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local_irq_restore(flags);
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@ -210,6 +210,7 @@ static struct arizona_pdata wm5102_reva_pdata = {
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.gpio_base = CODEC_GPIO_BASE,
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.irq_active_high = true,
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.micd_pol_gpio = CODEC_GPIO_BASE + 4,
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.micd_rate = 6,
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.gpio_defaults = {
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[2] = 0x10000, /* AIF3TXLRCLK */
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[3] = 0x4, /* OPCLK */
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@ -25,6 +25,9 @@
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#include <asm/asm-offsets.h>
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#include <asm/hardware/cache-l2x0.h>
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#define CPU_MASK 0xff0ffff0
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#define CPU_CORTEX_A9 0x410fc090
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/*
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* The following code is located into the .data section. This is to
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* allow l2x0_regs_phys to be accessed with a relative load while we
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@ -51,6 +54,12 @@
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ENTRY(s3c_cpu_resume)
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#ifdef CONFIG_CACHE_L2X0
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mrc p15, 0, r0, c0, c0, 0
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ldr r1, =CPU_MASK
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and r0, r0, r1
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ldr r1, =CPU_CORTEX_A9
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cmp r0, r1
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bne resume_l2on
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adr r0, l2x0_regs_phys
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ldr r0, [r0]
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ldr r1, [r0, #L2X0_R_PHY_BASE]
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@ -8,6 +8,7 @@
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* published by the Free Software Foundation.
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*/
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#include <linux/export.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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@ -50,8 +51,10 @@ int s5p_csis_phy_enable(int id, bool on)
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{
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return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN);
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}
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EXPORT_SYMBOL(s5p_csis_phy_enable);
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int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
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{
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return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN);
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}
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EXPORT_SYMBOL(s5p_dsim_phy_enable);
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