pinctrl: qcom: Properly clear "intr_ack_high" interrupts when unmasking
In commit4b7618fdc7
("pinctrl: qcom: Add irq_enable callback for msm gpio") we tried to Ack interrupts during unmask. However, that patch forgot to check "intr_ack_high" so, presumably, it only worked for a certain subset of SoCs. Let's add a small accessor so we don't need to open-code the logic in both places. This was found by code inspection. I don't have any access to the hardware in question nor software that needs the Ack during unmask. Fixes:4b7618fdc7
("pinctrl: qcom: Add irq_enable callback for msm gpio") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Maulik Shah <mkshah@codeaurora.org> Tested-by: Maulik Shah <mkshah@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210114191601.v7.3.I32d0f4e174d45363b49ab611a13c3da8f1e87d0f@changeid Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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4079d35fa4
Коммит
a95881d6aa
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@ -96,6 +96,14 @@ MSM_ACCESSOR(intr_cfg)
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MSM_ACCESSOR(intr_status)
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MSM_ACCESSOR(intr_target)
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static void msm_ack_intr_status(struct msm_pinctrl *pctrl,
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const struct msm_pingroup *g)
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{
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u32 val = g->intr_ack_high ? BIT(g->intr_status_bit) : 0;
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msm_writel_intr_status(val, pctrl, g);
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}
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static int msm_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
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@ -797,7 +805,7 @@ static void msm_gpio_irq_clear_unmask(struct irq_data *d, bool status_clear)
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* when the interrupt is not in use.
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*/
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if (status_clear)
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msm_writel_intr_status(0, pctrl, g);
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msm_ack_intr_status(pctrl, g);
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val = msm_readl_intr_cfg(pctrl, g);
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val |= BIT(g->intr_raw_status_bit);
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@ -890,7 +898,6 @@ static void msm_gpio_irq_ack(struct irq_data *d)
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struct msm_pinctrl *pctrl = gpiochip_get_data(gc);
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const struct msm_pingroup *g;
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unsigned long flags;
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u32 val;
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if (test_bit(d->hwirq, pctrl->skip_wake_irqs)) {
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if (test_bit(d->hwirq, pctrl->dual_edge_irqs))
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@ -902,8 +909,7 @@ static void msm_gpio_irq_ack(struct irq_data *d)
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raw_spin_lock_irqsave(&pctrl->lock, flags);
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val = g->intr_ack_high ? BIT(g->intr_status_bit) : 0;
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msm_writel_intr_status(val, pctrl, g);
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msm_ack_intr_status(pctrl, g);
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if (test_bit(d->hwirq, pctrl->dual_edge_irqs))
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msm_gpio_update_dual_edge_pos(pctrl, g, d);
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