rtw89: add chip_info::h2c_desc_size/fill_txdesc_fwcmd to support new chips
8852A and 8852C use different H2C header and size, so add h2c_desc_size to allocate different header size and fill content by fill_txdesc_fwcmd. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220318023214.32411-8-pkshih@realtek.com
This commit is contained in:
Родитель
1e6f0d2a67
Коммит
a95bd62ec0
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@ -18,7 +18,7 @@ rtw89_cam_get_sec_key_cmd(struct rtw89_dev *rtwdev,
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u8 *cmd;
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int i, j;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(cmd_len);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, cmd_len);
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if (!skb)
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return NULL;
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@ -977,6 +977,26 @@ void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev,
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}
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EXPORT_SYMBOL(rtw89_core_fill_txdesc);
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static __le32 rtw89_build_txwd_fwcmd0_v1(struct rtw89_tx_desc_info *desc_info)
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{
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u32 dword = FIELD_PREP(AX_RXD_RPKT_LEN_MASK, desc_info->pkt_size) |
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FIELD_PREP(AX_RXD_RPKT_TYPE_MASK, desc_info->fw_dl ?
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RTW89_CORE_RX_TYPE_FWDL :
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RTW89_CORE_RX_TYPE_H2C);
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return cpu_to_le32(dword);
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}
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void rtw89_core_fill_txdesc_fwcmd_v1(struct rtw89_dev *rtwdev,
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struct rtw89_tx_desc_info *desc_info,
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void *txdesc)
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{
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struct rtw89_rxdesc_short *txwd_v1 = (struct rtw89_rxdesc_short *)txdesc;
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txwd_v1->dword0 = rtw89_build_txwd_fwcmd0_v1(desc_info);
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}
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EXPORT_SYMBOL(rtw89_core_fill_txdesc_fwcmd_v1);
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static int rtw89_core_rx_process_mac_ppdu(struct rtw89_dev *rtwdev,
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struct sk_buff *skb,
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struct rtw89_rx_phy_ppdu *phy_ppdu)
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@ -117,6 +117,8 @@ enum rtw89_core_rx_type {
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RTW89_CORE_RX_TYPE_C2H = 10,
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RTW89_CORE_RX_TYPE_CSI = 11,
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RTW89_CORE_RX_TYPE_CQI = 12,
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RTW89_CORE_RX_TYPE_H2C = 13,
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RTW89_CORE_RX_TYPE_FWDL = 14,
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};
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enum rtw89_txq_flags {
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@ -2076,6 +2078,9 @@ struct rtw89_chip_ops {
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s8 pw_ofst, enum rtw89_mac_idx mac_idx);
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int (*pwr_on_func)(struct rtw89_dev *rtwdev);
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int (*pwr_off_func)(struct rtw89_dev *rtwdev);
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void (*fill_txdesc_fwcmd)(struct rtw89_dev *rtwdev,
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struct rtw89_tx_desc_info *desc_info,
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void *txdesc);
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int (*cfg_ctrl_path)(struct rtw89_dev *rtwdev, bool wl);
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int (*mac_cfg_gnt)(struct rtw89_dev *rtwdev,
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const struct rtw89_mac_ax_coex_gnt *gnt_cfg);
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@ -2344,6 +2349,7 @@ struct rtw89_chip_info {
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u8 ps_mode_supported;
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u32 hci_func_en_addr;
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u32 h2c_desc_size;
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u32 h2c_ctrl_reg;
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const u32 *h2c_regs;
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u32 c2h_ctrl_reg;
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@ -3507,6 +3513,16 @@ static inline void rtw89_ctrl_btg(struct rtw89_dev *rtwdev, bool btg)
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chip->ops->ctrl_btg(rtwdev, btg);
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}
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static inline
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void rtw89_chip_fill_txdesc_fwcmd(struct rtw89_dev *rtwdev,
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struct rtw89_tx_desc_info *desc_info,
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void *txdesc)
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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chip->ops->fill_txdesc_fwcmd(rtwdev, desc_info, txdesc);
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}
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static inline
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void rtw89_chip_mac_cfg_gnt(struct rtw89_dev *rtwdev,
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const struct rtw89_mac_ax_coex_gnt *gnt_cfg)
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@ -3580,6 +3596,9 @@ void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel);
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void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev,
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struct rtw89_tx_desc_info *desc_info,
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void *txdesc);
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void rtw89_core_fill_txdesc_fwcmd_v1(struct rtw89_dev *rtwdev,
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struct rtw89_tx_desc_info *desc_info,
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void *txdesc);
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void rtw89_core_rx(struct rtw89_dev *rtwdev,
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struct rtw89_rx_desc_info *desc_info,
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struct sk_buff *skb);
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@ -10,31 +10,33 @@
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#include "phy.h"
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#include "reg.h"
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static struct sk_buff *rtw89_fw_h2c_alloc_skb(u32 len, bool header)
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static struct sk_buff *rtw89_fw_h2c_alloc_skb(struct rtw89_dev *rtwdev, u32 len,
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bool header)
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{
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struct sk_buff *skb;
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u32 header_len = 0;
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u32 h2c_desc_size = rtwdev->chip->h2c_desc_size;
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if (header)
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header_len = H2C_HEADER_LEN;
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skb = dev_alloc_skb(len + header_len + 24);
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skb = dev_alloc_skb(len + header_len + h2c_desc_size);
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if (!skb)
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return NULL;
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skb_reserve(skb, header_len + 24);
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skb_reserve(skb, header_len + h2c_desc_size);
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memset(skb->data, 0, len);
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return skb;
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}
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struct sk_buff *rtw89_fw_h2c_alloc_skb_with_hdr(u32 len)
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struct sk_buff *rtw89_fw_h2c_alloc_skb_with_hdr(struct rtw89_dev *rtwdev, u32 len)
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{
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return rtw89_fw_h2c_alloc_skb(len, true);
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return rtw89_fw_h2c_alloc_skb(rtwdev, len, true);
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}
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struct sk_buff *rtw89_fw_h2c_alloc_skb_no_hdr(u32 len)
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struct sk_buff *rtw89_fw_h2c_alloc_skb_no_hdr(struct rtw89_dev *rtwdev, u32 len)
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{
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return rtw89_fw_h2c_alloc_skb(len, false);
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return rtw89_fw_h2c_alloc_skb(rtwdev, len, false);
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}
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static u8 _fw_get_rdy(struct rtw89_dev *rtwdev)
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@ -309,7 +311,7 @@ static int __rtw89_fw_download_hdr(struct rtw89_dev *rtwdev, const u8 *fw, u32 l
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struct sk_buff *skb;
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u32 ret = 0;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(len);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for fw hdr dl\n");
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return -ENOMEM;
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@ -375,7 +377,7 @@ static int __rtw89_fw_download_main(struct rtw89_dev *rtwdev,
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else
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pkt_len = residue_len;
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skb = rtw89_fw_h2c_alloc_skb_no_hdr(pkt_len);
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skb = rtw89_fw_h2c_alloc_skb_no_hdr(rtwdev, pkt_len);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
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return -ENOMEM;
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@ -570,7 +572,7 @@ int rtw89_fw_h2c_cam(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
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{
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struct sk_buff *skb;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CAM_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_CAM_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
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return -ENOMEM;
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@ -619,7 +621,7 @@ int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta,
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return 0;
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}
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_BA_CAM_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_BA_CAM_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for h2c ba cam\n");
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return -ENOMEM;
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@ -665,7 +667,7 @@ int rtw89_fw_h2c_fw_log(struct rtw89_dev *rtwdev, bool enable)
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u32 comp = enable ? BIT(RTW89_FW_LOG_COMP_INIT) | BIT(RTW89_FW_LOG_COMP_TASK) |
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BIT(RTW89_FW_LOG_COMP_PS) | BIT(RTW89_FW_LOG_COMP_ERROR) : 0;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LOG_CFG_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LOG_CFG_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for fw log cfg\n");
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return -ENOMEM;
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@ -701,7 +703,7 @@ int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, u8 macid)
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{
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struct sk_buff *skb;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_GENERAL_PKT_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_GENERAL_PKT_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
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return -ENOMEM;
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@ -738,7 +740,7 @@ int rtw89_fw_h2c_lps_parm(struct rtw89_dev *rtwdev,
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{
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struct sk_buff *skb;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LPS_PARM_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LPS_PARM_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
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return -ENOMEM;
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@ -784,7 +786,7 @@ int rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev *rtwdev,
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u8 map_b = hal->antenna_tx == RF_AB ? 1 : 0;
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u8 macid = rtwvif->mac_id;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CMC_TBL_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_CMC_TBL_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
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return -ENOMEM;
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@ -894,7 +896,7 @@ int rtw89_fw_h2c_assoc_cmac_tbl(struct rtw89_dev *rtwdev,
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if (sta)
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__get_sta_he_pkt_padding(rtwdev, sta, pads);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CMC_TBL_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_CMC_TBL_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
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return -ENOMEM;
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@ -945,7 +947,7 @@ int rtw89_fw_h2c_txtime_cmac_tbl(struct rtw89_dev *rtwdev,
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{
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struct sk_buff *skb;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CMC_TBL_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_CMC_TBL_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
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return -ENOMEM;
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@ -997,7 +999,7 @@ int rtw89_fw_h2c_update_beacon(struct rtw89_dev *rtwdev,
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}
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bcn_total_len = H2C_BCN_BASE_LEN + skb_beacon->len;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(bcn_total_len);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, bcn_total_len);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
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dev_kfree_skb_any(skb_beacon);
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@ -1051,7 +1053,7 @@ int rtw89_fw_h2c_role_maintain(struct rtw89_dev *rtwdev,
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self_role = rtwvif->self_role;
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}
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_ROLE_MAINTAIN_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_ROLE_MAINTAIN_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for h2c join\n");
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return -ENOMEM;
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@ -1093,7 +1095,7 @@ int rtw89_fw_h2c_join_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
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net_type = dis_conn ? RTW89_NET_TYPE_NO_LINK : net_type;
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}
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_JOIN_INFO_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_JOIN_INFO_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for h2c join\n");
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return -ENOMEM;
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@ -1137,7 +1139,7 @@ int rtw89_fw_h2c_macid_pause(struct rtw89_dev *rtwdev, u8 sh, u8 grp,
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u8 len = sizeof(struct rtw89_fw_macid_pause_grp);
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struct sk_buff *skb;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_JOIN_INFO_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_JOIN_INFO_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for h2c join\n");
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return -ENOMEM;
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@ -1170,7 +1172,7 @@ int rtw89_fw_h2c_set_edca(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
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{
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struct sk_buff *skb;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_EDCA_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_EDCA_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for h2c edca\n");
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return -ENOMEM;
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@ -1205,7 +1207,7 @@ int rtw89_fw_h2c_set_ofld_cfg(struct rtw89_dev *rtwdev)
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static const u8 cfg[] = {0x09, 0x00, 0x00, 0x00, 0x5e, 0x00, 0x00, 0x00};
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struct sk_buff *skb;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_OFLD_CFG_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_OFLD_CFG_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for h2c ofld\n");
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return -ENOMEM;
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@ -1235,7 +1237,7 @@ int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi
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struct sk_buff *skb;
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u8 *cmd;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_RA_LEN);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_RA_LEN);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for h2c join\n");
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return -ENOMEM;
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@ -1306,7 +1308,7 @@ int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev)
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struct sk_buff *skb;
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u8 *cmd;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_CXDRVINFO_INIT);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_INIT);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_init\n");
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return -ENOMEM;
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@ -1365,7 +1367,7 @@ int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev)
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u8 *cmd;
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int i;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_CXDRVINFO_ROLE);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_ROLE);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_role\n");
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return -ENOMEM;
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@ -1433,7 +1435,7 @@ int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev)
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struct sk_buff *skb;
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u8 *cmd;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_CXDRVINFO_CTRL);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_CTRL);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n");
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return -ENOMEM;
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@ -1475,7 +1477,7 @@ int rtw89_fw_h2c_cxdrv_rfk(struct rtw89_dev *rtwdev)
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struct sk_buff *skb;
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u8 *cmd;
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_CXDRVINFO_RFK);
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skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_RFK);
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if (!skb) {
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rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n");
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return -ENOMEM;
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||||
|
@ -1515,7 +1517,7 @@ int rtw89_fw_h2c_del_pkt_offload(struct rtw89_dev *rtwdev, u8 id)
|
|||
struct sk_buff *skb;
|
||||
u8 *cmd;
|
||||
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_PKT_OFLD);
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_PKT_OFLD);
|
||||
if (!skb) {
|
||||
rtw89_err(rtwdev, "failed to alloc skb for h2c pkt offload\n");
|
||||
return -ENOMEM;
|
||||
|
@ -1557,7 +1559,7 @@ int rtw89_fw_h2c_add_pkt_offload(struct rtw89_dev *rtwdev, u8 *id,
|
|||
|
||||
*id = alloc_id;
|
||||
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_PKT_OFLD + skb_ofld->len);
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_PKT_OFLD + skb_ofld->len);
|
||||
if (!skb) {
|
||||
rtw89_err(rtwdev, "failed to alloc skb for h2c pkt offload\n");
|
||||
return -ENOMEM;
|
||||
|
@ -1596,7 +1598,7 @@ int rtw89_fw_h2c_scan_list_offload(struct rtw89_dev *rtwdev, int len,
|
|||
int skb_len = H2C_LEN_SCAN_LIST_OFFLOAD + len * RTW89_MAC_CHINFO_SIZE;
|
||||
u8 *cmd;
|
||||
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(skb_len);
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, skb_len);
|
||||
if (!skb) {
|
||||
rtw89_err(rtwdev, "failed to alloc skb for h2c scan list\n");
|
||||
return -ENOMEM;
|
||||
|
@ -1660,7 +1662,7 @@ int rtw89_fw_h2c_scan_offload(struct rtw89_dev *rtwdev,
|
|||
struct sk_buff *skb;
|
||||
u8 *cmd;
|
||||
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_SCAN_OFFLOAD);
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_SCAN_OFFLOAD);
|
||||
if (!skb) {
|
||||
rtw89_err(rtwdev, "failed to alloc skb for h2c scan offload\n");
|
||||
return -ENOMEM;
|
||||
|
@ -1709,7 +1711,7 @@ int rtw89_fw_h2c_rf_reg(struct rtw89_dev *rtwdev,
|
|||
u8 class = info->rf_path == RF_PATH_A ?
|
||||
H2C_CL_OUTSRC_RF_REG_A : H2C_CL_OUTSRC_RF_REG_B;
|
||||
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(len);
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
|
||||
if (!skb) {
|
||||
rtw89_err(rtwdev, "failed to alloc skb for h2c rf reg\n");
|
||||
return -ENOMEM;
|
||||
|
@ -1738,7 +1740,7 @@ int rtw89_fw_h2c_raw_with_hdr(struct rtw89_dev *rtwdev,
|
|||
{
|
||||
struct sk_buff *skb;
|
||||
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(len);
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
|
||||
if (!skb) {
|
||||
rtw89_err(rtwdev, "failed to alloc skb for raw with hdr\n");
|
||||
return -ENOMEM;
|
||||
|
@ -1765,7 +1767,7 @@ int rtw89_fw_h2c_raw(struct rtw89_dev *rtwdev, const u8 *buf, u16 len)
|
|||
{
|
||||
struct sk_buff *skb;
|
||||
|
||||
skb = rtw89_fw_h2c_alloc_skb_no_hdr(len);
|
||||
skb = rtw89_fw_h2c_alloc_skb_no_hdr(rtwdev, len);
|
||||
if (!skb) {
|
||||
rtw89_err(rtwdev, "failed to alloc skb for h2c raw\n");
|
||||
return -ENOMEM;
|
||||
|
@ -2295,7 +2297,7 @@ int rtw89_fw_h2c_trigger_cpu_exception(struct rtw89_dev *rtwdev)
|
|||
{
|
||||
struct sk_buff *skb;
|
||||
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_FW_CPU_EXCEPTION_LEN);
|
||||
skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_FW_CPU_EXCEPTION_LEN);
|
||||
if (!skb) {
|
||||
rtw89_err(rtwdev,
|
||||
"failed to alloc skb for fw cpu exception\n");
|
||||
|
|
|
@ -2277,8 +2277,8 @@ int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta,
|
|||
|
||||
int rtw89_fw_h2c_lps_parm(struct rtw89_dev *rtwdev,
|
||||
struct rtw89_lps_parm *lps_param);
|
||||
struct sk_buff *rtw89_fw_h2c_alloc_skb_with_hdr(u32 len);
|
||||
struct sk_buff *rtw89_fw_h2c_alloc_skb_no_hdr(u32 len);
|
||||
struct sk_buff *rtw89_fw_h2c_alloc_skb_with_hdr(struct rtw89_dev *rtwdev, u32 len);
|
||||
struct sk_buff *rtw89_fw_h2c_alloc_skb_no_hdr(struct rtw89_dev *rtwdev, u32 len);
|
||||
int rtw89_fw_msg_reg(struct rtw89_dev *rtwdev,
|
||||
struct rtw89_mac_h2c_info *h2c_info,
|
||||
struct rtw89_mac_c2h_info *c2h_info);
|
||||
|
|
|
@ -1043,16 +1043,18 @@ static int rtw89_pci_fwcmd_submit(struct rtw89_dev *rtwdev,
|
|||
struct rtw89_core_tx_request *tx_req)
|
||||
{
|
||||
struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv;
|
||||
const struct rtw89_chip_info *chip = rtwdev->chip;
|
||||
struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
|
||||
struct rtw89_txwd_body *txwd_body;
|
||||
void *txdesc;
|
||||
int txdesc_size = chip->h2c_desc_size;
|
||||
struct pci_dev *pdev = rtwpci->pdev;
|
||||
struct sk_buff *skb = tx_req->skb;
|
||||
struct rtw89_pci_tx_data *tx_data = RTW89_PCI_TX_SKB_CB(skb);
|
||||
dma_addr_t dma;
|
||||
|
||||
txwd_body = (struct rtw89_txwd_body *)skb_push(skb, sizeof(*txwd_body));
|
||||
memset(txwd_body, 0, sizeof(*txwd_body));
|
||||
rtw89_core_fill_txdesc(rtwdev, desc_info, txwd_body);
|
||||
txdesc = skb_push(skb, txdesc_size);
|
||||
memset(txdesc, 0, txdesc_size);
|
||||
rtw89_chip_fill_txdesc_fwcmd(rtwdev, desc_info, txdesc);
|
||||
|
||||
dma = dma_map_single(&pdev->dev, skb->data, skb->len, DMA_TO_DEVICE);
|
||||
if (dma_mapping_error(&pdev->dev, dma)) {
|
||||
|
|
|
@ -2021,6 +2021,7 @@ static const struct rtw89_chip_ops rtw8852a_chip_ops = {
|
|||
.set_txpwr_ul_tb_offset = rtw8852a_set_txpwr_ul_tb_offset,
|
||||
.pwr_on_func = NULL,
|
||||
.pwr_off_func = NULL,
|
||||
.fill_txdesc_fwcmd = rtw89_core_fill_txdesc,
|
||||
.cfg_ctrl_path = rtw89_mac_cfg_ctrl_path,
|
||||
.mac_cfg_gnt = rtw89_mac_cfg_gnt,
|
||||
.stop_sch_tx = rtw89_mac_stop_sch_tx,
|
||||
|
@ -2097,6 +2098,7 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
|
|||
BIT(RTW89_PS_MODE_CLK_GATED) |
|
||||
BIT(RTW89_PS_MODE_PWR_GATED),
|
||||
.hci_func_en_addr = R_AX_HCI_FUNC_EN,
|
||||
.h2c_desc_size = sizeof(struct rtw89_txwd_body),
|
||||
.h2c_ctrl_reg = R_AX_H2CREG_CTRL,
|
||||
.h2c_regs = rtw8852a_h2c_regs,
|
||||
.c2h_ctrl_reg = R_AX_C2HREG_CTRL,
|
||||
|
|
|
@ -492,6 +492,7 @@ static const struct rtw89_chip_ops rtw8852c_chip_ops = {
|
|||
.set_txpwr_ul_tb_offset = rtw8852c_set_txpwr_ul_tb_offset,
|
||||
.pwr_on_func = rtw8852c_pwr_on_func,
|
||||
.pwr_off_func = rtw8852c_pwr_off_func,
|
||||
.fill_txdesc_fwcmd = rtw89_core_fill_txdesc_fwcmd_v1,
|
||||
.cfg_ctrl_path = rtw89_mac_cfg_ctrl_path_v1,
|
||||
.mac_cfg_gnt = rtw89_mac_cfg_gnt_v1,
|
||||
.stop_sch_tx = rtw89_mac_stop_sch_tx_v1,
|
||||
|
@ -515,6 +516,7 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
|
|||
.phycap_addr = 0x590,
|
||||
.phycap_size = 0x60,
|
||||
.hci_func_en_addr = R_AX_HCI_FUNC_EN_V1,
|
||||
.h2c_desc_size = sizeof(struct rtw89_rxdesc_short),
|
||||
.h2c_ctrl_reg = R_AX_H2CREG_CTRL_V1,
|
||||
.h2c_regs = rtw8852c_h2c_regs,
|
||||
.c2h_ctrl_reg = R_AX_C2HREG_CTRL_V1,
|
||||
|
|
|
@ -79,6 +79,92 @@
|
|||
|
||||
/* TX WD INFO DWORD 5 */
|
||||
|
||||
/* RX WD dword0 */
|
||||
#define AX_RXD_RPKT_LEN_MASK GENMASK(13, 0)
|
||||
#define AX_RXD_SHIFT_MASK GENMASK(15, 14)
|
||||
#define AX_RXD_WL_HD_IV_LEN_MASK GENMASK(21, 16)
|
||||
#define AX_RXD_BB_SEL BIT(22)
|
||||
#define AX_RXD_MAC_INFO_VLD BIT(23)
|
||||
#define AX_RXD_RPKT_TYPE_MASK GENMASK(27, 24)
|
||||
#define AX_RXD_DRV_INFO_SIZE_MASK GENMASK(30, 28)
|
||||
#define AX_RXD_LONG_RXD BIT(31)
|
||||
|
||||
/* RX WD dword1 */
|
||||
#define AX_RXD_PPDU_TYPE_MASK GENMASK(3, 0)
|
||||
#define AX_RXD_PPDU_CNT_MASK GENMASK(6, 4)
|
||||
#define AX_RXD_SR_EN BIT(7)
|
||||
#define AX_RXD_USER_ID_MASK GENMASK(15, 8)
|
||||
#define AX_RXD_USER_ID_v1_MASK GENMASK(13, 8)
|
||||
#define AX_RXD_RX_DATARATE_MASK GENMASK(24, 16)
|
||||
#define AX_RXD_RX_GI_LTF_MASK GENMASK(27, 25)
|
||||
#define AX_RXD_NON_SRG_PPDU BIT(28)
|
||||
#define AX_RXD_INTER_PPDU BIT(29)
|
||||
#define AX_RXD_NON_SRG_PPDU_v1 BIT(14)
|
||||
#define AX_RXD_INTER_PPDU_v1 BIT(15)
|
||||
#define AX_RXD_BW_MASK GENMASK(31, 30)
|
||||
#define AX_RXD_BW_v1_MASK GENMASK(31, 29)
|
||||
|
||||
/* RX WD dword2 */
|
||||
#define AX_RXD_FREERUN_CNT_MASK GENMASK(31, 0)
|
||||
|
||||
/* RX WD dword3 */
|
||||
#define AX_RXD_A1_MATCH BIT(0)
|
||||
#define AX_RXD_SW_DEC BIT(1)
|
||||
#define AX_RXD_HW_DEC BIT(2)
|
||||
#define AX_RXD_AMPDU BIT(3)
|
||||
#define AX_RXD_AMPDU_END_PKT BIT(4)
|
||||
#define AX_RXD_AMSDU BIT(5)
|
||||
#define AX_RXD_AMSDU_CUT BIT(6)
|
||||
#define AX_RXD_LAST_MSDU BIT(7)
|
||||
#define AX_RXD_BYPASS BIT(8)
|
||||
#define AX_RXD_CRC32_ERR BIT(9)
|
||||
#define AX_RXD_ICV_ERR BIT(10)
|
||||
#define AX_RXD_MAGIC_WAKE BIT(11)
|
||||
#define AX_RXD_UNICAST_WAKE BIT(12)
|
||||
#define AX_RXD_PATTERN_WAKE BIT(13)
|
||||
#define AX_RXD_GET_CH_INFO_MASK GENMASK(15, 14)
|
||||
#define AX_RXD_PATTERN_IDX_MASK GENMASK(20, 16)
|
||||
#define AX_RXD_TARGET_IDC_MASK GENMASK(23, 21)
|
||||
#define AX_RXD_CHKSUM_OFFLOAD_EN BIT(24)
|
||||
#define AX_RXD_WITH_LLC BIT(25)
|
||||
#define AX_RXD_RX_STATISTICS BIT(26)
|
||||
|
||||
/* RX WD dword4 */
|
||||
#define AX_RXD_TYPE_MASK GENMASK(1, 0)
|
||||
#define AX_RXD_MC BIT(2)
|
||||
#define AX_RXD_BC BIT(3)
|
||||
#define AX_RXD_MD BIT(4)
|
||||
#define AX_RXD_MF BIT(5)
|
||||
#define AX_RXD_PWR BIT(6)
|
||||
#define AX_RXD_QOS BIT(7)
|
||||
#define AX_RXD_TID_MASK GENMASK(11, 8)
|
||||
#define AX_RXD_EOSP BIT(12)
|
||||
#define AX_RXD_HTC BIT(13)
|
||||
#define AX_RXD_QNULL BIT(14)
|
||||
#define AX_RXD_SEQ_MASK GENMASK(27, 16)
|
||||
#define AX_RXD_FRAG_MASK GENMASK(31, 28)
|
||||
|
||||
/* RX WD dword5 */
|
||||
#define AX_RXD_SEC_CAM_IDX_MASK GENMASK(7, 0)
|
||||
#define AX_RXD_ADDR_CAM_MASK GENMASK(15, 8)
|
||||
#define AX_RXD_MAC_ID_MASK GENMASK(23, 16)
|
||||
#define AX_RXD_RX_PL_ID_MASK GENMASK(27, 24)
|
||||
#define AX_RXD_ADDR_CAM_VLD BIT(28)
|
||||
#define AX_RXD_ADDR_FWD_EN BIT(29)
|
||||
#define AX_RXD_RX_PL_MATCH BIT(30)
|
||||
|
||||
/* RX WD dword6 */
|
||||
#define AX_RXD_MAC_ADDR_MASK GENMASK(31, 0)
|
||||
|
||||
/* RX WD dword7 */
|
||||
#define AX_RXD_MAC_ADDR_H_MASK GENMASK(15, 0)
|
||||
#define AX_RXD_SMART_ANT BIT(16)
|
||||
#define AX_RXD_SEC_TYPE_MASK GENMASK(20, 17)
|
||||
#define AX_RXD_HDR_CNV BIT(21)
|
||||
#define AX_RXD_HDR_OFFSET_MASK GENMASK(26, 22)
|
||||
#define AX_RXD_BIP_KEYID BIT(27)
|
||||
#define AX_RXD_BIP_ENC BIT(28)
|
||||
|
||||
/* RX DESC helpers */
|
||||
/* Short Descriptor */
|
||||
#define RTW89_GET_RXWD_LONG_RXD(rxdesc) \
|
||||
|
|
Загрузка…
Ссылка в новой задаче