[ARM] pxa/balloon3: PCMCIA Support
This driver adds support for the on-board CF socket. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
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Коммит
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@ -88,6 +88,18 @@ static unsigned long balloon3_pin_config[] __initdata = {
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/* USB Host */
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GPIO88_USBH1_PWR,
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GPIO89_USBH1_PEN,
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/* PC Card */
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GPIO48_nPOE,
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GPIO49_nPWE,
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GPIO50_nPIOR,
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GPIO51_nPIOW,
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GPIO85_nPCE_1,
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GPIO54_nPCE_2,
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GPIO79_PSKTSEL,
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GPIO55_nPREG,
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GPIO56_nPWAIT,
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GPIO57_nIOIS16,
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};
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/******************************************************************************
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@ -405,7 +417,6 @@ static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
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{
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unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) &
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balloon3_irq_enabled;
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do {
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/* clear useless edge notification */
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if (desc->chip->ack)
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@ -26,10 +26,12 @@ enum balloon3_features {
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#define BALLOON3_FPGA_VIRT (0xf1000000) /* as per balloon2 */
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#define BALLOON3_FPGA_LENGTH 0x01000000
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/* FPGA/CPLD registers */
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#define BALLOON3_PCMCIA0_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
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/* fixme - same for now */
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#define BALLOON3_PCMCIA1_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
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/* FPGA / CPLD registers for CF socket */
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#define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
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#define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
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/* FPGA / CPLD version register */
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#define BALLOON3_FPGA_VER (BALLOON3_FPGA_VIRT + 0x00e0001c)
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#define BALLOON3_NANDIO_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000)
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/* fpga/cpld interrupt control register */
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#define BALLOON3_INT_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e0000C)
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@ -41,6 +43,19 @@ enum balloon3_features {
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#define BALLOON3_SAMOSA_DATA_REG (BALLOON3_FPGA_VIRT + 0x00c00004)
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#define BALLOON3_SAMOSA_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00c0001c)
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/* CF Status Register bits (read-only) bits */
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#define BALLOON3_CF_nIRQ (1 << 0)
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#define BALLOON3_CF_nSTSCHG_BVD1 (1 << 1)
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/* CF Control Set Register bits / CF Control Clear Register bits (write-only) */
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#define BALLOON3_CF_RESET (1 << 0)
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#define BALLOON3_CF_ENABLE (1 << 1)
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#define BALLOON3_CF_ADD_ENABLE (1 << 2)
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/* CF Interrupt sources */
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#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0)
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#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1)
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/* GPIOs for irqs */
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#define BALLOON3_GPIO_AUX_NIRQ (94)
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#define BALLOON3_GPIO_CODEC_IRQ (95)
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@ -58,16 +73,6 @@ enum balloon3_features {
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#define BALLOON3_INT_S0_IRQ (1 << 0) /* PCMCIA 0 IRQ */
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#define BALLOON3_INT_S0_STSCHG (1 << 1) /* PCMCIA 0 status changed */
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/* CF Status Register */
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#define BALLOON3_PCMCIA_nIRQ (1 << 0) /* IRQ / ready signal */
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#define BALLOON3_PCMCIA_nSTSCHG_BVD1 (1 << 1)
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/* VDD sense / card status changed */
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/* CF control register (write) */
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#define BALLOON3_PCMCIA_RESET (1 << 0) /* Card reset signal */
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#define BALLOON3_PCMCIA_ENABLE (1 << 1)
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#define BALLOON3_PCMCIA_ADD_ENABLE (1 << 2)
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/* CPLD (and FPGA) interface definitions */
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#define CPLD_LCD0_DATA_SET 0x00
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#define CPLD_LCD0_DATA_CLR 0x10
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@ -132,9 +137,6 @@ enum balloon3_features {
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/* Balloon3 Interrupts */
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#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x))
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#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0)
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#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1)
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#define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
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#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
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#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD)
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@ -215,7 +215,7 @@ config PCMCIA_PXA2XX
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depends on (ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL \
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|| MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \
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|| ARCOM_PCMCIA || ARCH_PXA_ESERIES || MACH_STARGATE2 \
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|| MACH_VPAC270)
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|| MACH_VPAC270 || MACH_BALLOON3)
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select PCMCIA_SOC_COMMON
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help
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Say Y here to include support for the PXA2xx PCMCIA controller
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@ -70,6 +70,7 @@ pxa2xx-obj-$(CONFIG_MACH_PALMLD) += pxa2xx_palmld.o
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pxa2xx-obj-$(CONFIG_MACH_E740) += pxa2xx_e740.o
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pxa2xx-obj-$(CONFIG_MACH_STARGATE2) += pxa2xx_stargate2.o
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pxa2xx-obj-$(CONFIG_MACH_VPAC270) += pxa2xx_vpac270.o
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pxa2xx-obj-$(CONFIG_MACH_BALLOON3) += pxa2xx_balloon3.o
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obj-$(CONFIG_PCMCIA_PXA2XX) += pxa2xx_base.o $(pxa2xx-obj-y)
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@ -0,0 +1,158 @@
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/*
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* linux/drivers/pcmcia/pxa2xx_balloon3.c
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*
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* Balloon3 PCMCIA specific routines.
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*
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* Author: Nick Bane
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* Created: June, 2006
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* Copyright: Toby Churchill Ltd
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* Derived from pxa2xx_mainstone.c, by Nico Pitre
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*
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* Various modification by Marek Vasut <marek.vasut@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/gpio.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <mach/balloon3.h>
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#include "soc_common.h"
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/*
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* These are a list of interrupt sources that provokes a polled
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* check of status
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*/
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static struct pcmcia_irqs irqs[] = {
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{ 0, BALLOON3_S0_CD_IRQ, "PCMCIA0 CD" },
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{ 0, BALLOON3_BP_NSTSCHG_IRQ, "PCMCIA0 STSCHG" },
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};
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static int balloon3_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
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{
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uint16_t ver;
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int ret;
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static void __iomem *fpga_ver;
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ver = __raw_readw(BALLOON3_FPGA_VER);
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if (ver > 0x0201)
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pr_warn("The FPGA code, version 0x%04x, is newer than rel-0.3. "
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"PCMCIA/CF support might be broken in this version!",
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ver);
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skt->socket.pci_irq = BALLOON3_BP_CF_NRDY_IRQ;
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return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
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}
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static void balloon3_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
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{
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soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
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}
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static unsigned long balloon3_pcmcia_status[2] = {
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BALLOON3_CF_nSTSCHG_BVD1,
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BALLOON3_CF_nSTSCHG_BVD1
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};
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static void balloon3_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
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struct pcmcia_state *state)
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{
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uint16_t status;
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int flip;
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/* This actually reads the STATUS register */
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status = __raw_readw(BALLOON3_CF_STATUS_REG);
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flip = (status ^ balloon3_pcmcia_status[skt->nr])
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& BALLOON3_CF_nSTSCHG_BVD1;
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/*
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* Workaround for STSCHG which can't be deasserted:
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* We therefore disable/enable corresponding IRQs
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* as needed to avoid IRQ locks.
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*/
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if (flip) {
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balloon3_pcmcia_status[skt->nr] = status;
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if (status & BALLOON3_CF_nSTSCHG_BVD1)
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enable_irq(BALLOON3_BP_NSTSCHG_IRQ);
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else
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disable_irq(BALLOON3_BP_NSTSCHG_IRQ);
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}
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state->detect = !gpio_get_value(BALLOON3_GPIO_S0_CD);
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state->ready = !!(status & BALLOON3_CF_nIRQ);
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state->bvd1 = !!(status & BALLOON3_CF_nSTSCHG_BVD1);
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state->bvd2 = 0; /* not available */
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state->vs_3v = 1; /* Always true its a CF card */
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state->vs_Xv = 0; /* not available */
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state->wrprot = 0; /* not available */
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}
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static int balloon3_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
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const socket_state_t *state)
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{
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__raw_writew((state->flags & SS_RESET) ? BALLOON3_CF_RESET : 0,
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BALLOON3_CF_CONTROL_REG);
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return 0;
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}
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static void balloon3_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
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{
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}
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static void balloon3_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
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{
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}
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static struct pcmcia_low_level balloon3_pcmcia_ops = {
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.owner = THIS_MODULE,
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.hw_init = balloon3_pcmcia_hw_init,
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.hw_shutdown = balloon3_pcmcia_hw_shutdown,
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.socket_state = balloon3_pcmcia_socket_state,
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.configure_socket = balloon3_pcmcia_configure_socket,
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.socket_init = balloon3_pcmcia_socket_init,
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.socket_suspend = balloon3_pcmcia_socket_suspend,
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.first = 0,
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.nr = 1,
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};
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static struct platform_device *balloon3_pcmcia_device;
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static int __init balloon3_pcmcia_init(void)
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{
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int ret;
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balloon3_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
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if (!balloon3_pcmcia_device)
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return -ENOMEM;
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ret = platform_device_add_data(balloon3_pcmcia_device,
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&balloon3_pcmcia_ops, sizeof(balloon3_pcmcia_ops));
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if (!ret)
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ret = platform_device_add(balloon3_pcmcia_device);
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if (ret)
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platform_device_put(balloon3_pcmcia_device);
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return ret;
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}
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static void __exit balloon3_pcmcia_exit(void)
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{
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platform_device_unregister(balloon3_pcmcia_device);
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}
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module_init(balloon3_pcmcia_init);
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module_exit(balloon3_pcmcia_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Nick Bane <nick@cecomputing.co.uk>");
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MODULE_ALIAS("platform:pxa2xx-pcmcia");
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MODULE_DESCRIPTION("Balloon3 board CF/PCMCIA driver");
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