[ARM] 3151/1: make various assembly local labels actually local (io-*.S)
Patch from Nicolas Pitre For assembly labels to actually be local they must start with ".L" and not only "." otherwise they still remain visible in the final link and clutter kallsyms needlessly, and possibly make for unclear symbolic backtrace. This patch simply inserts a"L" where appropriate. The code itself is unchanged. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Родитель
7ba11a9c15
Коммит
a9c4814d8d
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@ -17,7 +17,7 @@
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.text
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.align
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.iosl_warning:
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.Liosl_warning:
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.ascii "<4>insl/outsl not implemented, called from %08lX\0"
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.align
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@ -27,6 +27,6 @@
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*/
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ENTRY(insl)
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ENTRY(outsl)
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adr r0, .iosl_warning
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adr r0, .Liosl_warning
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mov r1, lr
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b printk
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@ -10,7 +10,7 @@
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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.insb_align: rsb ip, ip, #4
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.Linsb_align: rsb ip, ip, #4
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cmp ip, r2
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movgt ip, r2
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cmp ip, #2
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@ -21,20 +21,20 @@
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ldrgtb r3, [r0]
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strgtb r3, [r1], #1
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subs r2, r2, ip
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bne .insb_aligned
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bne .Linsb_aligned
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ENTRY(__raw_readsb)
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teq r2, #0 @ do we have to check for the zero len?
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moveq pc, lr
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ands ip, r1, #3
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bne .insb_align
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bne .Linsb_align
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.insb_aligned: stmfd sp!, {r4 - r6, lr}
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.Linsb_aligned: stmfd sp!, {r4 - r6, lr}
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subs r2, r2, #16
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bmi .insb_no_16
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bmi .Linsb_no_16
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.insb_16_lp: ldrb r3, [r0]
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.Linsb_16_lp: ldrb r3, [r0]
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ldrb r4, [r0]
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ldrb r5, [r0]
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mov r3, r3, put_byte_0
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@ -69,13 +69,13 @@ ENTRY(__raw_readsb)
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stmia r1!, {r3 - r6}
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subs r2, r2, #16
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bpl .insb_16_lp
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bpl .Linsb_16_lp
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tst r2, #15
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LOADREGS(eqfd, sp!, {r4 - r6, pc})
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.insb_no_16: tst r2, #8
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beq .insb_no_8
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.Linsb_no_16: tst r2, #8
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beq .Linsb_no_8
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ldrb r3, [r0]
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ldrb r4, [r0]
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@ -95,8 +95,8 @@ ENTRY(__raw_readsb)
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orr r4, r4, ip, put_byte_3
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stmia r1!, {r3, r4}
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.insb_no_8: tst r2, #4
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beq .insb_no_4
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.Linsb_no_8: tst r2, #4
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beq .Linsb_no_4
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ldrb r3, [r0]
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ldrb r4, [r0]
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@ -108,7 +108,7 @@ ENTRY(__raw_readsb)
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orr r3, r3, r6, put_byte_3
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str r3, [r1], #4
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.insb_no_4: ands r2, r2, #3
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.Linsb_no_4: ands r2, r2, #3
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LOADREGS(eqfd, sp!, {r4 - r6, pc})
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cmp r2, #2
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@ -11,16 +11,16 @@
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#include <asm/assembler.h>
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#include <asm/hardware.h>
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.insw_bad_alignment:
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adr r0, .insw_bad_align_msg
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.Linsw_bad_alignment:
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adr r0, .Linsw_bad_align_msg
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mov r2, lr
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b panic
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.insw_bad_align_msg:
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.Linsw_bad_align_msg:
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.asciz "insw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
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.align
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.insw_align: tst r1, #1
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bne .insw_bad_alignment
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.Linsw_align: tst r1, #1
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bne .Linsw_bad_alignment
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ldr r3, [r0]
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strb r3, [r1], #1
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@ -34,16 +34,16 @@ ENTRY(__raw_readsw)
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teq r2, #0 @ do we have to check for the zero len?
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moveq pc, lr
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tst r1, #3
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bne .insw_align
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bne .Linsw_align
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.insw_aligned: mov ip, #0xff
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.Linsw_aligned: mov ip, #0xff
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orr ip, ip, ip, lsl #8
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stmfd sp!, {r4, r5, r6, lr}
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subs r2, r2, #8
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bmi .no_insw_8
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bmi .Lno_insw_8
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.insw_8_lp: ldr r3, [r0]
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.Linsw_8_lp: ldr r3, [r0]
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and r3, r3, ip
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ldr r4, [r0]
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orr r3, r3, r4, lsl #16
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@ -66,13 +66,13 @@ ENTRY(__raw_readsw)
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stmia r1!, {r3 - r6}
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subs r2, r2, #8
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bpl .insw_8_lp
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bpl .Linsw_8_lp
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tst r2, #7
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LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
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.no_insw_8: tst r2, #4
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beq .no_insw_4
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.Lno_insw_8: tst r2, #4
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beq .Lno_insw_4
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ldr r3, [r0]
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and r3, r3, ip
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@ -86,8 +86,8 @@ ENTRY(__raw_readsw)
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stmia r1!, {r3, r4}
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.no_insw_4: tst r2, #2
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beq .no_insw_2
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.Lno_insw_4: tst r2, #2
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beq .Lno_insw_2
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ldr r3, [r0]
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and r3, r3, ip
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@ -96,7 +96,7 @@ ENTRY(__raw_readsw)
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str r3, [r1], #4
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.no_insw_2: tst r2, #1
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.Lno_insw_2: tst r2, #1
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ldrne r3, [r0]
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strneb r3, [r1], #1
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movne r3, r3, lsr #8
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@ -18,8 +18,8 @@
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#endif
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.endm
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.insw_align: movs ip, r1, lsl #31
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bne .insw_noalign
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.Linsw_align: movs ip, r1, lsl #31
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bne .Linsw_noalign
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ldrh ip, [r0]
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sub r2, r2, #1
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strh ip, [r1], #2
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@ -28,14 +28,14 @@ ENTRY(__raw_readsw)
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teq r2, #0
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moveq pc, lr
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tst r1, #3
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bne .insw_align
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bne .Linsw_align
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stmfd sp!, {r4, r5, lr}
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subs r2, r2, #8
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bmi .no_insw_8
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bmi .Lno_insw_8
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.insw_8_lp: ldrh r3, [r0]
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.Linsw_8_lp: ldrh r3, [r0]
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ldrh r4, [r0]
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pack r3, r3, r4
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@ -53,10 +53,10 @@ ENTRY(__raw_readsw)
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subs r2, r2, #8
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stmia r1!, {r3 - r5, ip}
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bpl .insw_8_lp
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bpl .Linsw_8_lp
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.no_insw_8: tst r2, #4
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beq .no_insw_4
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.Lno_insw_8: tst r2, #4
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beq .Lno_insw_4
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ldrh r3, [r0]
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ldrh r4, [r0]
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@ -68,15 +68,15 @@ ENTRY(__raw_readsw)
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stmia r1!, {r3, r4}
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.no_insw_4: movs r2, r2, lsl #31
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bcc .no_insw_2
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.Lno_insw_4: movs r2, r2, lsl #31
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bcc .Lno_insw_2
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ldrh r3, [r0]
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ldrh ip, [r0]
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pack r3, r3, ip
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str r3, [r1], #4
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.no_insw_2: ldrneh r3, [r0]
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.Lno_insw_2: ldrneh r3, [r0]
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strneh r3, [r1]
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ldmfd sp!, {r4, r5, pc}
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@ -93,7 +93,7 @@ ENTRY(__raw_readsw)
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#define pull_hbyte1 lsr #8
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#endif
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.insw_noalign: stmfd sp!, {r4, lr}
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.Linsw_noalign: stmfd sp!, {r4, lr}
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ldrccb ip, [r1, #-1]!
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bcc 1f
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@ -30,7 +30,7 @@
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#endif
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.endm
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.outsb_align: rsb ip, ip, #4
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.Loutsb_align: rsb ip, ip, #4
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cmp ip, r2
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movgt ip, r2
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cmp ip, #2
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@ -41,44 +41,45 @@
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ldrgtb r3, [r1], #1
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strgtb r3, [r0]
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subs r2, r2, ip
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bne .outsb_aligned
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bne .Loutsb_aligned
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ENTRY(__raw_writesb)
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teq r2, #0 @ do we have to check for the zero len?
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moveq pc, lr
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ands ip, r1, #3
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bne .outsb_align
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bne .Loutsb_align
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.outsb_aligned: stmfd sp!, {r4, r5, lr}
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.Loutsb_aligned:
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stmfd sp!, {r4, r5, lr}
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subs r2, r2, #16
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bmi .outsb_no_16
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bmi .Loutsb_no_16
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.outsb_16_lp: ldmia r1!, {r3, r4, r5, ip}
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.Loutsb_16_lp: ldmia r1!, {r3, r4, r5, ip}
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outword r3
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outword r4
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outword r5
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outword ip
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subs r2, r2, #16
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bpl .outsb_16_lp
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bpl .Loutsb_16_lp
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tst r2, #15
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LOADREGS(eqfd, sp!, {r4, r5, pc})
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.outsb_no_16: tst r2, #8
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beq .outsb_no_8
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.Loutsb_no_16: tst r2, #8
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beq .Loutsb_no_8
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ldmia r1!, {r3, r4}
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outword r3
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outword r4
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.outsb_no_8: tst r2, #4
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beq .outsb_no_4
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.Loutsb_no_8: tst r2, #4
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beq .Loutsb_no_4
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ldr r3, [r1], #4
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outword r3
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.outsb_no_4: ands r2, r2, #3
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.Loutsb_no_4: ands r2, r2, #3
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LOADREGS(eqfd, sp!, {r4, r5, pc})
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cmp r2, #2
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@ -11,16 +11,16 @@
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#include <asm/assembler.h>
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#include <asm/hardware.h>
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.outsw_bad_alignment:
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adr r0, .outsw_bad_align_msg
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.Loutsw_bad_alignment:
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adr r0, .Loutsw_bad_align_msg
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mov r2, lr
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b panic
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.outsw_bad_align_msg:
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.Loutsw_bad_align_msg:
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.asciz "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
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.align
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.outsw_align: tst r1, #1
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bne .outsw_bad_alignment
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.Loutsw_align: tst r1, #1
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bne .Loutsw_bad_alignment
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add r1, r1, #2
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@ -35,14 +35,14 @@ ENTRY(__raw_writesw)
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teq r2, #0 @ do we have to check for the zero len?
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moveq pc, lr
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tst r1, #3
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bne .outsw_align
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bne .Loutsw_align
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.outsw_aligned: stmfd sp!, {r4, r5, r6, lr}
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stmfd sp!, {r4, r5, r6, lr}
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subs r2, r2, #8
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bmi .no_outsw_8
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bmi .Lno_outsw_8
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.outsw_8_lp: ldmia r1!, {r3, r4, r5, r6}
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.Loutsw_8_lp: ldmia r1!, {r3, r4, r5, r6}
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mov ip, r3, lsl #16
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orr ip, ip, ip, lsr #16
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@ -77,13 +77,13 @@ ENTRY(__raw_writesw)
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str ip, [r0]
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subs r2, r2, #8
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bpl .outsw_8_lp
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bpl .Loutsw_8_lp
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tst r2, #7
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LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
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.no_outsw_8: tst r2, #4
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beq .no_outsw_4
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.Lno_outsw_8: tst r2, #4
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beq .Lno_outsw_4
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ldmia r1!, {r3, r4}
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@ -103,8 +103,8 @@ ENTRY(__raw_writesw)
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orr ip, ip, ip, lsl #16
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str ip, [r0]
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.no_outsw_4: tst r2, #2
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beq .no_outsw_2
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.Lno_outsw_4: tst r2, #2
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beq .Lno_outsw_2
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ldr r3, [r1], #4
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@ -116,7 +116,7 @@ ENTRY(__raw_writesw)
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orr ip, ip, ip, lsl #16
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str ip, [r0]
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.no_outsw_2: tst r2, #1
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.Lno_outsw_2: tst r2, #1
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ldrne r3, [r1]
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@ -22,8 +22,8 @@
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#endif
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.endm
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.outsw_align: movs ip, r1, lsl #31
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bne .outsw_noalign
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.Loutsw_align: movs ip, r1, lsl #31
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bne .Loutsw_noalign
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ldrh r3, [r1], #2
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sub r2, r2, #1
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@ -33,35 +33,35 @@ ENTRY(__raw_writesw)
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teq r2, #0
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moveq pc, lr
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ands r3, r1, #3
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bne .outsw_align
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bne .Loutsw_align
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stmfd sp!, {r4, r5, lr}
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subs r2, r2, #8
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bmi .no_outsw_8
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bmi .Lno_outsw_8
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.outsw_8_lp: ldmia r1!, {r3, r4, r5, ip}
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.Loutsw_8_lp: ldmia r1!, {r3, r4, r5, ip}
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subs r2, r2, #8
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outword r3
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outword r4
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outword r5
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outword ip
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bpl .outsw_8_lp
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bpl .Loutsw_8_lp
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.no_outsw_8: tst r2, #4
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beq .no_outsw_4
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.Lno_outsw_8: tst r2, #4
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beq .Lno_outsw_4
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ldmia r1!, {r3, ip}
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outword r3
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outword ip
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.no_outsw_4: movs r2, r2, lsl #31
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bcc .no_outsw_2
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.Lno_outsw_4: movs r2, r2, lsl #31
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bcc .Lno_outsw_2
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ldr r3, [r1], #4
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outword r3
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.no_outsw_2: ldrneh r3, [r1]
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.Lno_outsw_2: ldrneh r3, [r1]
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strneh r3, [r0]
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ldmfd sp!, {r4, r5, pc}
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@ -74,7 +74,8 @@ ENTRY(__raw_writesw)
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#define push_hbyte1 lsl #8
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#endif
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.outsw_noalign: ldr r3, [r1, -r3]!
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.Loutsw_noalign:
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ldr r3, [r1, -r3]!
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subcs r2, r2, #1
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bcs 2f
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subs r2, r2, #2
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