Intel IOMMU: clflush_cache_range now takes size param
Introduce the size param for clflush_cache_range(). Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Muli Ben-Yehuda <muli@il.ibm.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Ashok Raj <ashok.raj@intel.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Christoph Lameter <clameter@sgi.com> Cc: Greg KH <greg@kroah.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -61,10 +61,10 @@ static struct page *split_large_page(unsigned long address, pgprot_t prot,
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return base;
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}
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static void cache_flush_page(void *adr)
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void clflush_cache_range(void *adr, int size)
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{
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int i;
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for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
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for (i = 0; i < size; i += boot_cpu_data.x86_clflush_size)
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clflush(adr+i);
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}
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@ -80,7 +80,7 @@ static void flush_kernel_map(void *arg)
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asm volatile("wbinvd" ::: "memory");
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else list_for_each_entry(pg, l, lru) {
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void *adr = page_address(pg);
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cache_flush_page(adr);
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clflush_cache_range(adr, PAGE_SIZE);
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}
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__flush_tlb_all();
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}
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@ -27,6 +27,7 @@
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void global_flush_tlb(void);
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int change_page_attr(struct page *page, int numpages, pgprot_t prot);
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int change_page_attr_addr(unsigned long addr, int numpages, pgprot_t prot);
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void clflush_cache_range(void *addr, int size);
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#ifdef CONFIG_DEBUG_PAGEALLOC
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/* internal debugging function */
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