ARM: tegra: Device tree changes for v5.15-rc1

The majority of this is temperature sensor additions for various devices
 and fixes to the trigger type of the thermal interrupts.
 
 Other than that there are various minor fixes across the board.
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Merge tag 'tegra-for-5.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

ARM: tegra: Device tree changes for v5.15-rc1

The majority of this is temperature sensor additions for various devices
and fixes to the trigger type of the thermal interrupts.

Other than that there are various minor fixes across the board.

* tag 'tegra-for-5.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: tamonten: Fix UART pad setting
  ARM: tegra: nexus7: Improve thermal zones
  ARM: tegra: acer-a500: Improve thermal zones
  ARM: tegra: acer-a500: Use verbose variant of atmel,wakeup-method value
  ARM: tegra: acer-a500: Add power supplies to accelerometer
  ARM: tegra: acer-a500: Remove bogus USB VBUS regulators
  ARM: tegra: jetson-tk1: Correct interrupt trigger type of temperature sensor
  ARM: tegra: dalmore: Correct interrupt trigger type of temperature sensor
  ARM: tegra: cardhu: Correct interrupt trigger type of temperature sensor
  ARM: tegra: apalis: Correct interrupt trigger type of temperature sensor
  ARM: tegra: nyan: Correct interrupt trigger type of temperature sensor
  ARM: tegra: acer-a500: Add interrupt to temperature sensor node
  ARM: tegra: nexus7: Add interrupt to temperature sensor node
  ARM: tegra: paz00: Add interrupt to temperature sensor node
  ARM: tegra: ouya: Add interrupt to temperature sensor node
  ARM: tegra: Add SoC thermal sensor to Tegra30 device-trees

Link: https://lore.kernel.org/r/20210813162157.2820913-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-08-16 22:58:39 +02:00
Родитель b05cff9f4d 2270ad2f4e
Коммит aadf2b3857
12 изменённых файлов: 219 добавлений и 63 удалений

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@ -788,7 +788,7 @@
reg = <0x4c>;
vcc-supply = <&palmas_ldo6_reg>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_LOW>;
interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_EDGE_FALLING>;
};
};

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@ -1751,7 +1751,7 @@
compatible = "ti,tmp451";
reg = <0x4c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_EDGE_FALLING>;
#thermal-sensor-cells = <1>;
vcc-supply = <&reg_module_3v3>;
};

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@ -1744,7 +1744,7 @@
compatible = "ti,tmp451";
reg = <0x4c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_EDGE_FALLING>;
#thermal-sensor-cells = <1>;
vcc-supply = <&reg_module_3v3>;
};

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@ -1427,7 +1427,7 @@
compatible = "ti,tmp451";
reg = <0x4c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_EDGE_FALLING>;
};
eeprom@56 {

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@ -91,7 +91,7 @@
compatible = "ti,tmp451";
reg = <0x4c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_EDGE_FALLING>;
#thermal-sensor-cells = <1>;
};

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@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/input/atmel-maxtouch.h>
#include <dt-bindings/input/gpio-keys.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/thermal/thermal.h>
@ -454,7 +455,7 @@
vdda-supply = <&vdd_3v3_sys>;
vdd-supply = <&vdd_3v3_sys>;
atmel,wakeup-method = <1>;
atmel,wakeup-method = <ATMEL_MXT_WAKEUP_I2C_SCL>;
};
gyroscope@68 {
@ -482,6 +483,9 @@
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(S, 7) IRQ_TYPE_EDGE_RISING>;
vdd-supply = <&vdd_1v8_sys>;
vddio-supply = <&vdd_1v8_sys>;
mount-matrix = "0", "1", "0",
"1", "0", "0",
"0", "0", "-1";
@ -693,6 +697,10 @@
compatible = "onnn,nct1008";
reg = <0x4c>;
vcc-supply = <&vdd_3v3_sys>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
#thermal-sensor-cells = <1>;
};
};
@ -719,7 +727,6 @@
nvidia,xcvr-setup-use-fuses;
nvidia,xcvr-lsfslew = <2>;
nvidia,xcvr-lsrslew = <2>;
vbus-supply = <&vdd_vbus1>;
};
usb@c5008000 {
@ -731,7 +738,7 @@
nvidia,xcvr-setup-use-fuses;
nvidia,xcvr-lsfslew = <2>;
nvidia,xcvr-lsrslew = <2>;
vbus-supply = <&vdd_vbus3>;
vbus-supply = <&vdd_5v0_sys>;
};
brcm_wifi_pwrseq: wifi-pwrseq {
@ -991,28 +998,6 @@
vin-supply = <&vdd_5v0_sys>;
};
vdd_vbus1: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "vdd_usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_vbus3: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "vdd_usb3_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
gpio = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
sound {
compatible = "nvidia,tegra-audio-wm8903-picasso",
"nvidia,tegra-audio-wm8903";
@ -1044,28 +1029,34 @@
};
thermal-zones {
/*
* NCT1008 has two sensors:
*
* 0: internal that monitors ambient/skin temperature
* 1: external that is connected to the CPU's diode
*
* Ideally we should use userspace thermal governor,
* but it's a much more complex solution. The "skin"
* zone is a simpler solution which prevents A500 from
* getting too hot from a user's tactile perspective.
* The CPU zone is intended to protect silicon from damage.
*/
skin-thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <0>; /* milliseconds */
thermal-sensors = <&nct1008 0>;
};
cpu-thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
thermal-sensors = <&nct1008 1>;
thermal-sensors = <&nct1008 0>;
trips {
trip0: cpu-alert0 {
trip0: skin-alert {
/* start throttling at 60C */
temperature = <60000>;
hysteresis = <200>;
type = "passive";
};
trip1: cpu-crit {
trip1: skin-crit {
/* shut down at 70C */
temperature = <70000>;
hysteresis = <2000>;
@ -1081,6 +1072,37 @@
};
};
};
cpu-thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
thermal-sensors = <&nct1008 1>;
trips {
trip2: cpu-alert {
/* throttle at 85C until temperature drops to 84.8C */
temperature = <85000>;
hysteresis = <200>;
type = "passive";
};
trip3: cpu-crit {
/* shut down at 90C */
temperature = <90000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map1 {
trip = <&trip2>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
memory-controller@7000f400 {

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@ -503,6 +503,10 @@
adt7461: temperature-sensor@4c {
compatible = "adi,adt7461";
reg = <0x4c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
#thermal-sensor-cells = <1>;
};
};

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@ -185,8 +185,9 @@
nvidia,pins = "ata", "atb", "atc", "atd", "ate",
"cdev1", "cdev2", "dap1", "dtb", "gma",
"gmb", "gmc", "gmd", "gme", "gpu7",
"gpv", "i2cp", "pta", "rm", "slxa",
"slxk", "spia", "spib", "uac";
"gpv", "i2cp", "irrx", "irtx", "pta",
"rm", "slxa", "slxk", "spia", "spib",
"uac";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
@ -211,7 +212,7 @@
conf_ddc {
nvidia,pins = "ddc", "dta", "dtd", "kbca",
"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
"sdc";
"sdc", "uad", "uca";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
@ -221,10 +222,9 @@
"lvp0", "owc", "sdb";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
conf_irrx {
nvidia,pins = "irrx", "irtx", "sdd", "spic",
"spie", "spih", "uaa", "uab", "uad",
"uca", "ucb";
conf_sdd {
nvidia,pins = "sdd", "spic", "spie", "spih",
"uaa", "uab", "ucb";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};

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@ -920,6 +920,10 @@
compatible = "onnn,nct1008";
reg = <0x4c>;
vcc-supply = <&vdd_3v3_sys>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(S, 3) IRQ_TYPE_EDGE_FALLING>;
#thermal-sensor-cells = <1>;
};
@ -1251,21 +1255,34 @@
};
thermal-zones {
cpu-thermal {
/*
* NCT72 has two sensors:
*
* 0: internal that monitors ambient/skin temperature
* 1: external that is connected to the CPU's diode
*
* Ideally we should use userspace thermal governor,
* but it's a much more complex solution. The "skin"
* zone is a simpler solution which prevents Nexus 7
* from getting too hot from a user's tactile perspective.
* The CPU zone is intended to protect silicon from damage.
*/
skin-thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
thermal-sensors = <&nct72 1>;
thermal-sensors = <&nct72 0>;
trips {
trip0: cpu-alert0 {
trip0: skin-alert {
/* throttle at 57C until temperature drops to 56.8C */
temperature = <57000>;
hysteresis = <200>;
type = "passive";
};
trip1: cpu-crit {
trip1: skin-crit {
/* shut down at 65C */
temperature = <65000>;
hysteresis = <2000>;
@ -1285,5 +1302,40 @@
};
};
};
cpu-thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
thermal-sensors = <&nct72 1>;
trips {
trip2: cpu-alert {
/* throttle at 85C until temperature drops to 84.8C */
temperature = <85000>;
hysteresis = <200>;
type = "passive";
};
trip3: cpu-crit {
/* shut down at 90C */
temperature = <90000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map1 {
trip = <&trip2>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&actmon THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
};

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@ -348,7 +348,7 @@
reg = <0x4c>;
vcc-supply = <&sys_3v3_reg>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>;
#thermal-sensor-cells = <1>;
};

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@ -124,12 +124,11 @@
compatible = "onnn,nct1008";
reg = <0x4c>;
vcc-supply = <&sys_3v3_reg>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>;
#thermal-sensor-cells = <1>;
/*
* The interrupt is bugged, once triggered it never clears.
* interrupt-parent = <&gpio>;
* interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
*/
};
pmic: pmic@2d {
@ -4376,8 +4375,8 @@
nvidia,pins = "pcc2";
nvidia,function = "i2s4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
sdmmc4_rst_n_pcc3 {
nvidia,pins = "sdmmc4_rst_n_pcc3";

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@ -5,6 +5,7 @@
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/tegra-pmc.h>
#include <dt-bindings/thermal/thermal.h>
#include "tegra30-peripherals-opp.dtsi"
@ -800,6 +801,20 @@
reset-names = "fuse";
};
tsensor: tsensor@70014000 {
compatible = "nvidia,tegra30-tsensor";
reg = <0x70014000 0x500>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_TSENSOR>;
resets = <&tegra_car TEGRA30_CLK_TSENSOR>;
assigned-clocks = <&tegra_car TEGRA30_CLK_TSENSOR>;
assigned-clock-parents = <&tegra_car TEGRA30_CLK_CLK_M>;
assigned-clock-rates = <500000>;
#thermal-sensor-cells = <1>;
};
hda@70030000 {
compatible = "nvidia,tegra30-hda";
reg = <0x70030000 0x10000>;
@ -1062,32 +1077,36 @@
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
clocks = <&tegra_car TEGRA30_CLK_CCLK_G>;
#cooling-cells = <2>;
};
cpu@1 {
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
clocks = <&tegra_car TEGRA30_CLK_CCLK_G>;
#cooling-cells = <2>;
};
cpu@2 {
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <2>;
clocks = <&tegra_car TEGRA30_CLK_CCLK_G>;
#cooling-cells = <2>;
};
cpu@3 {
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <3>;
clocks = <&tegra_car TEGRA30_CLK_CCLK_G>;
#cooling-cells = <2>;
};
};
@ -1102,4 +1121,64 @@
<&{/cpus/cpu@2}>,
<&{/cpus/cpu@3}>;
};
thermal-zones {
tsensor0-thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
thermal-sensors = <&tsensor 0>;
trips {
level1_trip: dvfs-alert {
/* throttle at 80C until temperature drops to 79.8C */
temperature = <80000>;
hysteresis = <200>;
type = "passive";
};
level2_trip: cpu-div2-throttle {
/* hardware CPU x2 freq throttle at 85C */
temperature = <85000>;
hysteresis = <200>;
type = "hot";
};
level3_trip: soc-critical {
/* hardware shut down at 90C */
temperature = <90000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&level1_trip>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&actmon THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
tsensor1-thermal {
status = "disabled";
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <0>; /* milliseconds */
thermal-sensors = <&tsensor 1>;
trips {
dvfs-alert {
temperature = <80000>;
hysteresis = <200>;
type = "passive";
};
};
};
};
};