ARM: zynq: Allow UART1 to be used as DEBUG_LL console.
The main UART on the Xilinx ZC702 board is UART1, located at address e0001000. Add a Kconfig option to select this device as the low-level debugging port. This allows the really early boot printouts to reach the USB serial adaptor on this board. For consistency's sake, add a choice entry for UART0 even though it is the the default if UART1 is not selected. Signed-off-by: Nick Bowler <nbowler@elliptictech.com> Tested-by: Josh Cartwright <josh.cartwright@ni.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
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@ -132,6 +132,23 @@ choice
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their output to UART1 serial port on DaVinci TNETV107X
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devices.
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config DEBUG_ZYNQ_UART0
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bool "Kernel low-level debugging on Xilinx Zynq using UART0"
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depends on ARCH_ZYNQ
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help
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Say Y here if you want the debug print routines to direct
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their output to UART0 on the Zynq platform.
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config DEBUG_ZYNQ_UART1
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bool "Kernel low-level debugging on Xilinx Zynq using UART1"
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depends on ARCH_ZYNQ
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help
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Say Y here if you want the debug print routines to direct
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their output to UART1 on the Zynq platform.
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If you have a ZC702 board and want early boot messages to
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appear on the USB serial adaptor, select this option.
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config DEBUG_DC21285_PORT
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bool "Kernel low-level debugging messages via footbridge serial port"
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depends on FOOTBRIDGE
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@ -85,9 +85,9 @@ static struct map_desc io_desc[] __initdata = {
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#ifdef CONFIG_DEBUG_LL
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{
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.virtual = UART0_VIRT,
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.pfn = __phys_to_pfn(UART0_PHYS),
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.length = UART0_SIZE,
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.virtual = LL_UART_VADDR,
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.pfn = __phys_to_pfn(LL_UART_PADDR),
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.length = UART_SIZE,
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.type = MT_DEVICE,
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},
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#endif
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@ -25,8 +25,9 @@
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* address that is known to work.
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*/
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#define UART0_PHYS 0xE0000000
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#define UART0_SIZE SZ_4K
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#define UART0_VIRT 0xF0001000
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#define UART1_PHYS 0xE0001000
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#define UART_SIZE SZ_4K
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#define UART_VIRT 0xF0001000
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#define TTC0_PHYS 0xF8001000
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#define TTC0_SIZE SZ_4K
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@ -36,12 +37,17 @@
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#define SCU_PERIPH_SIZE SZ_8K
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#define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE)
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#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1)
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# define LL_UART_PADDR UART1_PHYS
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#else
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# define LL_UART_PADDR UART0_PHYS
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#endif
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#define LL_UART_VADDR UART_VIRT
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/* The following are intended for the devices that are mapped early */
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#define TTC0_BASE IOMEM(TTC0_VIRT)
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#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
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#define LL_UART_PADDR UART0_PHYS
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#define LL_UART_VADDR UART0_VIRT
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#endif
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