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[TG3]: remove sparse warnings 

Removed sparse warnings from tg3 driver.  The new logic seems fine (I
don't immediately see where we are running over values for any of the
variables that need to be saved).

This patch compiles fine and I'm currently using a tg3 with the patched
driver to post this patch as a basic proof of concept.

Signed-off-by: Andy Gospodarek <andy@greyhouse.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Andy Gospodarek 2007-09-06 20:42:14 +01:00 коммит произвёл David S. Miller
Родитель 50f17787e9
Коммит ab0049b4a2
1 изменённых файлов: 5 добавлений и 8 удалений
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13
drivers/net/tg3.c
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@ -4870,7 +4870,6 @@ static void tg3_restore_pci_state(struct tg3 *tp)
pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val); pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val);
if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) { if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) {
u32 val;
/* Chip reset on 5780 will reset MSI enable bit, /* Chip reset on 5780 will reset MSI enable bit,
* so need to restore it. * so need to restore it.
@ -5027,7 +5026,7 @@ static int tg3_chip_reset(struct tg3 *tp)
tw32(GRC_MODE, tp->grc_mode); tw32(GRC_MODE, tp->grc_mode);
if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) { if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) {
u32 val = tr32(0xc4); val = tr32(0xc4);
tw32(0xc4, val | (1 << 15)); tw32(0xc4, val | (1 << 15));
} }
@ -5056,7 +5055,7 @@ static int tg3_chip_reset(struct tg3 *tp)
if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) && if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) { tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) {
u32 val = tr32(0x7c00); val = tr32(0x7c00);
tw32(0x7c00, val | (1 << 25)); tw32(0x7c00, val | (1 << 25));
} }
@ -7991,7 +7990,7 @@ static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
buf = data; buf = data;
if (b_offset || odd_len) { if (b_offset || odd_len) {
buf = kmalloc(len, GFP_KERNEL); buf = kmalloc(len, GFP_KERNEL);
if (buf == 0) if (!buf)
return -ENOMEM; return -ENOMEM;
if (b_offset) if (b_offset)
memcpy(buf, &start, 4); memcpy(buf, &start, 4);
@ -8420,7 +8419,7 @@ static void tg3_get_ethtool_stats (struct net_device *dev,
static int tg3_test_nvram(struct tg3 *tp) static int tg3_test_nvram(struct tg3 *tp)
{ {
u32 *buf, csum, magic; u32 *buf, csum, magic;
int i, j, err = 0, size; int i, j, k, err = 0, size;
if (tg3_nvram_read_swab(tp, 0, &magic) != 0) if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
return -EIO; return -EIO;
@ -8474,7 +8473,6 @@ static int tg3_test_nvram(struct tg3 *tp)
u8 data[NVRAM_SELFBOOT_DATA_SIZE]; u8 data[NVRAM_SELFBOOT_DATA_SIZE];
u8 parity[NVRAM_SELFBOOT_DATA_SIZE]; u8 parity[NVRAM_SELFBOOT_DATA_SIZE];
u8 *buf8 = (u8 *) buf; u8 *buf8 = (u8 *) buf;
int j, k;
/* Separate the parity bits and the data bytes. */ /* Separate the parity bits and the data bytes. */
for (i = 0, j = 0, k = 0; i < NVRAM_SELFBOOT_HW_SIZE; i++) { for (i = 0, j = 0, k = 0; i < NVRAM_SELFBOOT_HW_SIZE; i++) {
@ -10730,7 +10728,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
*/ */
if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX) { if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX) {
u32 pm_reg; u32 pm_reg;
u16 pci_cmd;
tp->tg3_flags |= TG3_FLAG_PCIX_TARGET_HWBUG; tp->tg3_flags |= TG3_FLAG_PCIX_TARGET_HWBUG;
@ -11876,7 +11873,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
INIT_WORK(&tp->reset_task, tg3_reset_task); INIT_WORK(&tp->reset_task, tg3_reset_task);
tp->regs = ioremap_nocache(tg3reg_base, tg3reg_len); tp->regs = ioremap_nocache(tg3reg_base, tg3reg_len);
if (tp->regs == 0UL) { if (!tp->regs) {
printk(KERN_ERR PFX "Cannot map device registers, " printk(KERN_ERR PFX "Cannot map device registers, "
"aborting.\n"); "aborting.\n");
err = -ENOMEM; err = -ENOMEM;