LoongArch: Jump to the link address before enable PG
The kernel entry points of both boot CPU (i.e., kernel_entry) and non- boot CPUs (i.e., smpboot_entry) may be physical address from BootLoader (in DA mode or identity-mapping PG mode). So we should jump to the link address before PG enabled (because DA is disabled at the same time) and just after DMW configured. Specifically: With some older firmwares, non-boot CPUs started with PG enabled, but this need firmware cooperation in the form of a temporary page table, which is deemed unnecessary. OTOH, latest firmware versions configure the non-boot CPUs to start in DA mode, so kernel-side changes are needed. Reviewed-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
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@ -21,6 +21,12 @@ SYM_CODE_START(kernel_entry) # kernel entry point
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csrwr t0, LOONGARCH_CSR_DMWIN0
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li.d t0, CSR_DMW1_INIT # CA, PLV0, 0x9000 xxxx xxxx xxxx
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csrwr t0, LOONGARCH_CSR_DMWIN1
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/* We might not get launched at the address the kernel is linked to,
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so we jump there. */
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la.abs t0, 0f
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jr t0
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0:
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/* Enable PG */
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li.w t0, 0xb0 # PLV=0, IE=0, PG=1
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csrwr t0, LOONGARCH_CSR_CRMD
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@ -29,11 +35,6 @@ SYM_CODE_START(kernel_entry) # kernel entry point
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li.w t0, 0x00 # FPE=0, SXE=0, ASXE=0, BTE=0
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csrwr t0, LOONGARCH_CSR_EUEN
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/* We might not get launched at the address the kernel is linked to,
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so we jump there. */
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la.abs t0, 0f
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jr t0
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0:
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la t0, __bss_start # clear .bss
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st.d zero, t0, 0
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la t1, __bss_stop - LONGSIZE
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@ -74,6 +75,11 @@ SYM_CODE_START(smpboot_entry)
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csrwr t0, LOONGARCH_CSR_DMWIN0
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li.d t0, CSR_DMW1_INIT # CA, PLV0
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csrwr t0, LOONGARCH_CSR_DMWIN1
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la.abs t0, 0f
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jr t0
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0:
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/* Enable PG */
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li.w t0, 0xb0 # PLV=0, IE=0, PG=1
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csrwr t0, LOONGARCH_CSR_CRMD
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li.w t0, 0x04 # PLV=0, PIE=1, PWE=0
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@ -85,9 +91,6 @@ SYM_CODE_START(smpboot_entry)
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ld.d sp, t0, CPU_BOOT_STACK
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ld.d tp, t0, CPU_BOOT_TINFO
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la.abs t0, 0f
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jr t0
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0:
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bl start_secondary
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SYM_CODE_END(smpboot_entry)
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