clk: st: Support for A9 MUX clocks
The patch supports the A9-mux clocks used by ClockGenA9 A9-mux clock : Multiplexer inside ClockGenA9. A9 clock can be driven by either PLL or External clock (with an optional divide-by-2). This is implemented as 3-parent clock : PLL, Ext-clk OR Ext-clk/2 Signed-off-by: Pankaj Dev <pankaj.dev@st.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -570,6 +570,17 @@ static struct clkgen_mux_data clkgen_mux_c_vcc_sd_416 = {
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.lock = &clkgenf_lock,
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};
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static struct clkgen_mux_data stih415_a9_mux_data = {
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.offset = 0,
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.shift = 1,
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.width = 2,
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};
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static struct clkgen_mux_data stih416_a9_mux_data = {
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.offset = 0,
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.shift = 0,
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.width = 2,
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};
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static struct of_device_id mux_of_match[] = {
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{
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.compatible = "st,stih416-clkgenc-vcc-hd",
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@ -591,6 +602,14 @@ static struct of_device_id mux_of_match[] = {
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.compatible = "st,stih416-clkgenf-vcc-sd",
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.data = &clkgen_mux_c_vcc_sd_416,
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},
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{
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.compatible = "st,stih415-clkgen-a9-mux",
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.data = &stih415_a9_mux_data,
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},
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{
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.compatible = "st,stih416-clkgen-a9-mux",
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.data = &stih416_a9_mux_data,
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},
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{}
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};
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