OMAP: DSS2: DSI: use BTA to end the frame transfer
Previously a work was started on FRAMEDONE interrupt, and this work either sent a BTA synchronously or looped until TE_SIZE was zero, to wait for the end of the transfer. This patch changes a BTA to be sent asynchronously from FRAMEDONE interrupt, and when a BTA interrupt is received, the transfer is finished. This way we do the whole process asynchronously, and also inside interrupt context. This will give us much better latency to handle the end of the frame than with the previous work based solution. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
This commit is contained in:
Tomi Valkeinen
Родитель
9ecd96842b
Коммит
ab83b14c82
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@ -31,6 +31,7 @@
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#include <linux/seq_file.h>
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#include <linux/delay.h>
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#include <linux/workqueue.h>
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#include <linux/hardirq.h>
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#include <plat/sram.h>
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#include <plat/clock.h>
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@ -3028,7 +3029,7 @@ void dispc_fake_vsync_irq(void)
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u32 irqstatus = DISPC_IRQ_VSYNC;
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int i;
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local_irq_disable();
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WARN_ON(!in_interrupt());
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for (i = 0; i < DISPC_MAX_NR_ISRS; i++) {
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struct omap_dispc_isr_data *isr_data;
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@ -3040,8 +3041,6 @@ void dispc_fake_vsync_irq(void)
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if (isr_data->mask & irqstatus)
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isr_data->isr(isr_data->arg, irqstatus);
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}
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local_irq_enable();
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}
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#endif
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@ -232,6 +232,7 @@ static struct
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unsigned pll_locked;
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struct completion bta_completion;
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void (*bta_callback)(void);
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int update_channel;
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struct dsi_update_region update_region;
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@ -240,7 +241,6 @@ static struct
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struct workqueue_struct *workqueue;
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struct work_struct framedone_work;
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void (*framedone_callback)(int, void *);
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void *framedone_data;
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@ -511,9 +511,13 @@ void dsi_irq_handler(void)
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dss_collect_irq_stats(vcstatus, dsi.irq_stats.vc_irqs[i]);
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#endif
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if (vcstatus & DSI_VC_IRQ_BTA)
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if (vcstatus & DSI_VC_IRQ_BTA) {
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complete(&dsi.bta_completion);
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if (dsi.bta_callback)
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dsi.bta_callback();
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}
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if (vcstatus & DSI_VC_IRQ_ERROR_MASK) {
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DSSERR("DSI VC(%d) error, vc irqstatus %x\n",
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i, vcstatus);
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@ -2756,110 +2760,103 @@ static void dsi_te_timeout(unsigned long arg)
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}
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#endif
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static void dsi_framedone_timeout_work_callback(struct work_struct *work)
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static void dsi_handle_framedone(int error)
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{
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int r;
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const int channel = dsi.update_channel;
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DSSERR("Framedone not received for 250ms!\n");
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cancel_delayed_work(&dsi.framedone_timeout_work);
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dsi_vc_disable_bta_irq(channel);
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/* SIDLEMODE back to smart-idle */
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dispc_enable_sidle();
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dsi.bta_callback = NULL;
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if (dsi.te_enabled) {
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/* enable LP_RX_TO again after the TE */
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REG_FLD_MOD(DSI_TIMING2, 1, 15, 15); /* LP_RX_TO */
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}
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/* RX_FIFO_NOT_EMPTY */
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if (REG_GET(DSI_VC_CTRL(channel), 20, 20)) {
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DSSERR("Received error during frame transfer:\n");
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dsi_vc_flush_receive_data(channel);
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if (!error)
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error = -EIO;
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}
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dsi.framedone_callback(error, dsi.framedone_data);
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if (!error)
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dsi_perf_show("DISPC");
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}
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static void dsi_framedone_timeout_work_callback(struct work_struct *work)
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{
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/* XXX While extremely unlikely, we could get FRAMEDONE interrupt after
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* 250ms which would conflict with this timeout work. What should be
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* done is first cancel the transfer on the HW, and then cancel the
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* possibly scheduled framedone work */
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* possibly scheduled framedone work. However, cancelling the transfer
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* on the HW is buggy, and would probably require resetting the whole
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* DSI */
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/* SIDLEMODE back to smart-idle */
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dispc_enable_sidle();
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DSSERR("Framedone not received for 250ms!\n");
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if (dsi.te_enabled) {
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/* enable LP_RX_TO again after the TE */
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REG_FLD_MOD(DSI_TIMING2, 1, 15, 15); /* LP_RX_TO */
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}
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/* Send BTA after the frame. We need this for the TE to work, as TE
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* trigger is only sent for BTAs without preceding packet. Thus we need
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* to BTA after the pixel packets so that next BTA will cause TE
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* trigger.
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*
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* This is not needed when TE is not in use, but we do it anyway to
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* make sure that the transfer has been completed. It would be more
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* optimal, but more complex, to wait only just before starting next
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* transfer. */
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r = dsi_vc_send_bta_sync(channel);
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if (r)
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DSSERR("BTA after framedone failed\n");
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/* RX_FIFO_NOT_EMPTY */
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if (REG_GET(DSI_VC_CTRL(channel), 20, 20)) {
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DSSERR("Received error during frame transfer:\n");
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dsi_vc_flush_receive_data(channel);
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}
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dsi.framedone_callback(-ETIMEDOUT, dsi.framedone_data);
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dsi_handle_framedone(-ETIMEDOUT);
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}
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static void dsi_framedone_irq_callback(void *data, u32 mask)
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static void dsi_framedone_bta_callback(void)
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{
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int r;
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/* Note: We get FRAMEDONE when DISPC has finished sending pixels and
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* turns itself off. However, DSI still has the pixels in its buffers,
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* and is sending the data.
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*/
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/* SIDLEMODE back to smart-idle */
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dispc_enable_sidle();
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r = queue_work(dsi.workqueue, &dsi.framedone_work);
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BUG_ON(r == 0);
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}
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static void dsi_handle_framedone(void)
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{
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int r;
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const int channel = dsi.update_channel;
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DSSDBG("FRAMEDONE\n");
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if (dsi.te_enabled) {
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/* enable LP_RX_TO again after the TE */
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REG_FLD_MOD(DSI_TIMING2, 1, 15, 15); /* LP_RX_TO */
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}
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/* Send BTA after the frame. We need this for the TE to work, as TE
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* trigger is only sent for BTAs without preceding packet. Thus we need
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* to BTA after the pixel packets so that next BTA will cause TE
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* trigger.
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*
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* This is not needed when TE is not in use, but we do it anyway to
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* make sure that the transfer has been completed. It would be more
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* optimal, but more complex, to wait only just before starting next
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* transfer. */
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r = dsi_vc_send_bta_sync(channel);
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if (r)
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DSSERR("BTA after framedone failed\n");
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/* RX_FIFO_NOT_EMPTY */
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if (REG_GET(DSI_VC_CTRL(channel), 20, 20)) {
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DSSERR("Received error during frame transfer:\n");
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dsi_vc_flush_receive_data(channel);
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}
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dsi_handle_framedone(0);
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#ifdef CONFIG_OMAP2_DSS_FAKE_VSYNC
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dispc_fake_vsync_irq();
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#endif
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}
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static void dsi_framedone_work_callback(struct work_struct *work)
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static void dsi_framedone_irq_callback(void *data, u32 mask)
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{
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DSSDBGF();
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const int channel = dsi.update_channel;
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int r;
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cancel_delayed_work_sync(&dsi.framedone_timeout_work);
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/* Note: We get FRAMEDONE when DISPC has finished sending pixels and
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* turns itself off. However, DSI still has the pixels in its buffers,
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* and is sending the data.
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*/
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dsi_handle_framedone();
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if (dsi.te_enabled) {
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/* enable LP_RX_TO again after the TE */
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REG_FLD_MOD(DSI_TIMING2, 1, 15, 15); /* LP_RX_TO */
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}
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dsi_perf_show("DISPC");
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/* Send BTA after the frame. We need this for the TE to work, as TE
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* trigger is only sent for BTAs without preceding packet. Thus we need
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* to BTA after the pixel packets so that next BTA will cause TE
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* trigger.
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*
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* This is not needed when TE is not in use, but we do it anyway to
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* make sure that the transfer has been completed. It would be more
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* optimal, but more complex, to wait only just before starting next
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* transfer.
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*
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* Also, as there's no interrupt telling when the transfer has been
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* done and the channel could be reconfigured, the only way is to
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* busyloop until TE_SIZE is zero. With BTA we can do this
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* asynchronously.
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* */
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dsi.framedone_callback(0, dsi.framedone_data);
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dsi.bta_callback = dsi_framedone_bta_callback;
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barrier();
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dsi_vc_enable_bta_irq(channel);
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r = dsi_vc_send_bta(channel);
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if (r) {
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DSSERR("BTA after framedone failed\n");
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dsi_handle_framedone(-EIO);
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}
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}
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int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
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@ -3246,7 +3243,6 @@ int dsi_init(struct platform_device *pdev)
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if (dsi.workqueue == NULL)
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return -ENOMEM;
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INIT_WORK(&dsi.framedone_work, dsi_framedone_work_callback);
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INIT_DELAYED_WORK_DEFERRABLE(&dsi.framedone_timeout_work,
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dsi_framedone_timeout_work_callback);
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