[S390] smp: rename and add lowcore defines
Rename __LC_RESTART_PSW to __LC_RST_NEW_PSW, add a define for the missing 32 bit variant and the missing old PSWs. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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Коммит
abd1ecf209
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@ -36,6 +36,8 @@
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#define __LC_DUMP_REIPL 0x0e00
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#ifndef __s390x__
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#define __LC_RST_NEW_PSW 0x0000
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#define __LC_RST_OLD_PSW 0x0008
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#define __LC_EXT_OLD_PSW 0x0018
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#define __LC_SVC_OLD_PSW 0x0020
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#define __LC_PGM_OLD_PSW 0x0028
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@ -81,12 +83,13 @@
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#define __LC_CREGS_SAVE_AREA 0x01c0
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#else /* __s390x__ */
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#define __LC_LAST_BREAK 0x0110
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#define __LC_RST_OLD_PSW 0x0120
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#define __LC_EXT_OLD_PSW 0x0130
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#define __LC_SVC_OLD_PSW 0x0140
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#define __LC_PGM_OLD_PSW 0x0150
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#define __LC_MCK_OLD_PSW 0x0160
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#define __LC_IO_OLD_PSW 0x0170
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#define __LC_RESTART_PSW 0x01a0
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#define __LC_RST_NEW_PSW 0x01a0
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#define __LC_EXT_NEW_PSW 0x01b0
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#define __LC_SVC_NEW_PSW 0x01c0
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#define __LC_PGM_NEW_PSW 0x01d0
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@ -176,7 +176,7 @@ pgm_check_entry:
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cgr %r1,%r2
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je restore_registers /* r1 = r2 -> nothing to do */
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larl %r4,.Lrestart_suspend_psw /* Set new restart PSW */
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mvc __LC_RESTART_PSW(16,%r0),0(%r4)
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mvc __LC_RST_NEW_PSW(16,%r0),0(%r4)
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3:
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sigp %r9,%r1,__SIGP_INITIAL_CPU_RESET
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brc 8,4f /* accepted */
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