KVM: arm64: vgic-v3: Enable trapping of Group-0 system registers
In order to be able to trap Group-0 GICv3 system registers, we need to set ICH_HCR_EL2.TALL0 begore entering the guest. This is conditionnaly done after having restored the guest's state, and cleared on exit. Tested-by: Alexander Graf <agraf@suse.de> Acked-by: David Daney <david.daney@cavium.com> Acked-by: Christoffer Dall <cdall@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <cdall@linaro.org>
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@ -417,6 +417,7 @@
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#define ICH_HCR_EN (1 << 0)
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#define ICH_HCR_EN (1 << 0)
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#define ICH_HCR_UIE (1 << 1)
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#define ICH_HCR_UIE (1 << 1)
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#define ICH_HCR_TALL0 (1 << 11)
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#define ICH_HCR_TALL1 (1 << 12)
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#define ICH_HCR_TALL1 (1 << 12)
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#define ICH_HCR_EOIcount_SHIFT 27
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#define ICH_HCR_EOIcount_SHIFT 27
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#define ICH_HCR_EOIcount_MASK (0x1f << ICH_HCR_EOIcount_SHIFT)
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#define ICH_HCR_EOIcount_MASK (0x1f << ICH_HCR_EOIcount_SHIFT)
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@ -21,6 +21,7 @@
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#include "vgic.h"
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#include "vgic.h"
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static bool group0_trap;
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static bool group1_trap;
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static bool group1_trap;
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void vgic_v3_set_underflow(struct kvm_vcpu *vcpu)
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void vgic_v3_set_underflow(struct kvm_vcpu *vcpu)
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@ -260,6 +261,8 @@ void vgic_v3_enable(struct kvm_vcpu *vcpu)
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/* Get the show on the road... */
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/* Get the show on the road... */
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vgic_v3->vgic_hcr = ICH_HCR_EN;
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vgic_v3->vgic_hcr = ICH_HCR_EN;
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if (group0_trap)
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vgic_v3->vgic_hcr |= ICH_HCR_TALL0;
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if (group1_trap)
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if (group1_trap)
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vgic_v3->vgic_hcr |= ICH_HCR_TALL1;
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vgic_v3->vgic_hcr |= ICH_HCR_TALL1;
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}
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}
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@ -492,7 +495,7 @@ int vgic_v3_probe(const struct gic_kvm_info *info)
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if (kvm_vgic_global_state.vcpu_base == 0)
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if (kvm_vgic_global_state.vcpu_base == 0)
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kvm_info("disabling GICv2 emulation\n");
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kvm_info("disabling GICv2 emulation\n");
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if (group1_trap) {
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if (group0_trap || group1_trap) {
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kvm_info("GICv3 sysreg trapping enabled (reduced performance)\n");
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kvm_info("GICv3 sysreg trapping enabled (reduced performance)\n");
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static_branch_enable(&vgic_v3_cpuif_trap);
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static_branch_enable(&vgic_v3_cpuif_trap);
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}
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}
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