[PATCH] ppc32: Re-order cputable for 750CXe DD2.4 entry
"745/755" (pvr_value:0x00083000) is a catch-all entry. Since arch/ppc/kernel/misc.S:identify_cpu() returns on first match, move this lower in the table so 750CXe DD2.4 (pvr_value:0x00083214) may be correctly enumerated. Signed-off-by: Arthur Othieno <a.othieno@bluewin.ch> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -198,20 +198,6 @@ struct cpu_spec cpu_specs[] = {
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.num_pmcs = 4,
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.num_pmcs = 4,
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.cpu_setup = __setup_cpu_750
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.cpu_setup = __setup_cpu_750
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},
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},
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{ /* 745/755 */
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.pvr_mask = 0xfffff000,
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.pvr_value = 0x00083000,
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.cpu_name = "745/755",
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.cpu_features = CPU_FTR_COMMON |
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CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
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CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
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CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
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.cpu_user_features = COMMON_PPC,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.cpu_setup = __setup_cpu_750
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},
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{ /* 750CX (80100 and 8010x?) */
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{ /* 750CX (80100 and 8010x?) */
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.pvr_mask = 0xfffffff0,
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.pvr_mask = 0xfffffff0,
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.pvr_value = 0x00080100,
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.pvr_value = 0x00080100,
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@ -254,6 +240,20 @@ struct cpu_spec cpu_specs[] = {
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.num_pmcs = 4,
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.num_pmcs = 4,
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.cpu_setup = __setup_cpu_750cx
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.cpu_setup = __setup_cpu_750cx
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},
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},
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{ /* 745/755 */
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.pvr_mask = 0xfffff000,
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.pvr_value = 0x00083000,
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.cpu_name = "745/755",
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.cpu_features = CPU_FTR_COMMON |
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CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
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CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
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CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
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.cpu_user_features = COMMON_PPC,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.cpu_setup = __setup_cpu_750
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},
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{ /* 750FX rev 1.x */
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{ /* 750FX rev 1.x */
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.pvr_mask = 0xffffff00,
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.pvr_mask = 0xffffff00,
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.pvr_value = 0x70000100,
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.pvr_value = 0x70000100,
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